1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2017 SiFive 4 */ 5 6 #include <linux/cacheinfo.h> 7 #include <linux/cpu.h> 8 #include <linux/of.h> 9 #include <linux/of_device.h> 10 #include <asm/cacheinfo.h> 11 12 static struct riscv_cacheinfo_ops *rv_cache_ops; 13 14 void riscv_set_cacheinfo_ops(struct riscv_cacheinfo_ops *ops) 15 { 16 rv_cache_ops = ops; 17 } 18 EXPORT_SYMBOL_GPL(riscv_set_cacheinfo_ops); 19 20 const struct attribute_group * 21 cache_get_priv_group(struct cacheinfo *this_leaf) 22 { 23 if (rv_cache_ops && rv_cache_ops->get_priv_group) 24 return rv_cache_ops->get_priv_group(this_leaf); 25 return NULL; 26 } 27 28 static void ci_leaf_init(struct cacheinfo *this_leaf, 29 struct device_node *node, 30 enum cache_type type, unsigned int level) 31 { 32 this_leaf->level = level; 33 this_leaf->type = type; 34 } 35 36 static int __init_cache_level(unsigned int cpu) 37 { 38 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); 39 struct device_node *np = of_cpu_device_node_get(cpu); 40 struct device_node *prev = NULL; 41 int levels = 0, leaves = 0, level; 42 43 if (of_property_read_bool(np, "cache-size")) 44 ++leaves; 45 if (of_property_read_bool(np, "i-cache-size")) 46 ++leaves; 47 if (of_property_read_bool(np, "d-cache-size")) 48 ++leaves; 49 if (leaves > 0) 50 levels = 1; 51 52 prev = np; 53 while ((np = of_find_next_cache_node(np))) { 54 of_node_put(prev); 55 prev = np; 56 if (!of_device_is_compatible(np, "cache")) 57 break; 58 if (of_property_read_u32(np, "cache-level", &level)) 59 break; 60 if (level <= levels) 61 break; 62 if (of_property_read_bool(np, "cache-size")) 63 ++leaves; 64 if (of_property_read_bool(np, "i-cache-size")) 65 ++leaves; 66 if (of_property_read_bool(np, "d-cache-size")) 67 ++leaves; 68 levels = level; 69 } 70 71 of_node_put(np); 72 this_cpu_ci->num_levels = levels; 73 this_cpu_ci->num_leaves = leaves; 74 75 return 0; 76 } 77 78 static int __populate_cache_leaves(unsigned int cpu) 79 { 80 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); 81 struct cacheinfo *this_leaf = this_cpu_ci->info_list; 82 struct device_node *np = of_cpu_device_node_get(cpu); 83 struct device_node *prev = NULL; 84 int levels = 1, level = 1; 85 86 if (of_property_read_bool(np, "cache-size")) 87 ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level); 88 if (of_property_read_bool(np, "i-cache-size")) 89 ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level); 90 if (of_property_read_bool(np, "d-cache-size")) 91 ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level); 92 93 prev = np; 94 while ((np = of_find_next_cache_node(np))) { 95 of_node_put(prev); 96 prev = np; 97 if (!of_device_is_compatible(np, "cache")) 98 break; 99 if (of_property_read_u32(np, "cache-level", &level)) 100 break; 101 if (level <= levels) 102 break; 103 if (of_property_read_bool(np, "cache-size")) 104 ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level); 105 if (of_property_read_bool(np, "i-cache-size")) 106 ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level); 107 if (of_property_read_bool(np, "d-cache-size")) 108 ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level); 109 levels = level; 110 } 111 of_node_put(np); 112 113 return 0; 114 } 115 116 DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level) 117 DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves) 118