127f8899dSDavid Abdurachmanov /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 227f8899dSDavid Abdurachmanov /* 327f8899dSDavid Abdurachmanov * Copyright (C) 2018 David Abdurachmanov <david.abdurachmanov@gmail.com> 427f8899dSDavid Abdurachmanov * 527f8899dSDavid Abdurachmanov * This program is free software; you can redistribute it and/or modify 627f8899dSDavid Abdurachmanov * it under the terms of the GNU General Public License version 2 as 727f8899dSDavid Abdurachmanov * published by the Free Software Foundation. 827f8899dSDavid Abdurachmanov * 927f8899dSDavid Abdurachmanov * This program is distributed in the hope that it will be useful, 1027f8899dSDavid Abdurachmanov * but WITHOUT ANY WARRANTY; without even the implied warranty of 1127f8899dSDavid Abdurachmanov * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1227f8899dSDavid Abdurachmanov * GNU General Public License for more details. 1327f8899dSDavid Abdurachmanov * 1427f8899dSDavid Abdurachmanov * You should have received a copy of the GNU General Public License 158e0c02f2SAlexander A. Klimov * along with this program. If not, see <https://www.gnu.org/licenses/>. 1627f8899dSDavid Abdurachmanov */ 1727f8899dSDavid Abdurachmanov 1859c10c52SGuo Ren #if defined(__LP64__) && !defined(__SYSCALL_COMPAT) 1927f8899dSDavid Abdurachmanov #define __ARCH_WANT_NEW_STAT 2080d7da1cSYury Norov #define __ARCH_WANT_SET_GET_RLIMIT 21d4c08b97SArnd Bergmann #endif /* __LP64__ */ 2227f8899dSDavid Abdurachmanov 2359a4e0d5SPalmer Dabbelt #define __ARCH_WANT_SYS_CLONE3 2402d88b40STobias Klauser #define __ARCH_WANT_MEMFD_SECRET 2559a4e0d5SPalmer Dabbelt 2627f8899dSDavid Abdurachmanov #include <asm-generic/unistd.h> 2727f8899dSDavid Abdurachmanov 2827f8899dSDavid Abdurachmanov /* 2927f8899dSDavid Abdurachmanov * Allows the instruction cache to be flushed from userspace. Despite RISC-V 3027f8899dSDavid Abdurachmanov * having a direct 'fence.i' instruction available to userspace (which we 3127f8899dSDavid Abdurachmanov * can't trap!), that's not actually viable when running on Linux because the 3227f8899dSDavid Abdurachmanov * kernel might schedule a process on another hart. There is no way for 3327f8899dSDavid Abdurachmanov * userspace to handle this without invoking the kernel (as it doesn't know the 3427f8899dSDavid Abdurachmanov * thread->hart mappings), so we've defined a RISC-V specific system call to 3527f8899dSDavid Abdurachmanov * flush the instruction cache. 3627f8899dSDavid Abdurachmanov * 3727f8899dSDavid Abdurachmanov * __NR_riscv_flush_icache is defined to flush the instruction cache over an 3827f8899dSDavid Abdurachmanov * address range, with the flush applying to either all threads or just the 3927f8899dSDavid Abdurachmanov * caller. We don't currently do anything with the address range, that's just 4027f8899dSDavid Abdurachmanov * in there for forwards compatibility. 4127f8899dSDavid Abdurachmanov */ 4227f8899dSDavid Abdurachmanov #ifndef __NR_riscv_flush_icache 4327f8899dSDavid Abdurachmanov #define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15) 4427f8899dSDavid Abdurachmanov #endif 4527f8899dSDavid Abdurachmanov __SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache) 46*ea3de9ceSEvan Green 47*ea3de9ceSEvan Green /* 48*ea3de9ceSEvan Green * Allows userspace to query the kernel for CPU architecture and 49*ea3de9ceSEvan Green * microarchitecture details across a given set of CPUs. 50*ea3de9ceSEvan Green */ 51*ea3de9ceSEvan Green #ifndef __NR_riscv_hwprobe 52*ea3de9ceSEvan Green #define __NR_riscv_hwprobe (__NR_arch_specific_syscall + 14) 53*ea3de9ceSEvan Green #endif 54*ea3de9ceSEvan Green __SYSCALL(__NR_riscv_hwprobe, sys_riscv_hwprobe) 55