1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6 #ifndef _UAPI_ASM_RISCV_PTRACE_H 7 #define _UAPI_ASM_RISCV_PTRACE_H 8 9 #ifndef __ASSEMBLY__ 10 11 #include <linux/types.h> 12 13 /* 14 * User-mode register state for core dumps, ptrace, sigcontext 15 * 16 * This decouples struct pt_regs from the userspace ABI. 17 * struct user_regs_struct must form a prefix of struct pt_regs. 18 */ 19 struct user_regs_struct { 20 unsigned long pc; 21 unsigned long ra; 22 unsigned long sp; 23 unsigned long gp; 24 unsigned long tp; 25 unsigned long t0; 26 unsigned long t1; 27 unsigned long t2; 28 unsigned long s0; 29 unsigned long s1; 30 unsigned long a0; 31 unsigned long a1; 32 unsigned long a2; 33 unsigned long a3; 34 unsigned long a4; 35 unsigned long a5; 36 unsigned long a6; 37 unsigned long a7; 38 unsigned long s2; 39 unsigned long s3; 40 unsigned long s4; 41 unsigned long s5; 42 unsigned long s6; 43 unsigned long s7; 44 unsigned long s8; 45 unsigned long s9; 46 unsigned long s10; 47 unsigned long s11; 48 unsigned long t3; 49 unsigned long t4; 50 unsigned long t5; 51 unsigned long t6; 52 }; 53 54 struct __riscv_f_ext_state { 55 __u32 f[32]; 56 __u32 fcsr; 57 }; 58 59 struct __riscv_d_ext_state { 60 __u64 f[32]; 61 __u32 fcsr; 62 }; 63 64 struct __riscv_q_ext_state { 65 __u64 f[64] __attribute__((aligned(16))); 66 __u32 fcsr; 67 /* 68 * Reserved for expansion of sigcontext structure. Currently zeroed 69 * upon signal, and must be zero upon sigreturn. 70 */ 71 __u32 reserved[3]; 72 }; 73 74 struct __riscv_ctx_hdr { 75 __u32 magic; 76 __u32 size; 77 }; 78 79 struct __riscv_extra_ext_header { 80 __u32 __padding[129] __attribute__((aligned(16))); 81 /* 82 * Reserved for expansion of sigcontext structure. Currently zeroed 83 * upon signal, and must be zero upon sigreturn. 84 */ 85 __u32 reserved; 86 struct __riscv_ctx_hdr hdr; 87 }; 88 89 union __riscv_fp_state { 90 struct __riscv_f_ext_state f; 91 struct __riscv_d_ext_state d; 92 struct __riscv_q_ext_state q; 93 }; 94 95 struct __riscv_v_ext_state { 96 unsigned long vstart; 97 unsigned long vl; 98 unsigned long vtype; 99 unsigned long vcsr; 100 void *datap; 101 /* 102 * In signal handler, datap will be set a correct user stack offset 103 * and vector registers will be copied to the address of datap 104 * pointer. 105 * 106 * In ptrace syscall, datap will be set to zero and the vector 107 * registers will be copied to the address right after this 108 * structure. 109 */ 110 }; 111 112 /* 113 * According to spec: The number of bits in a single vector register, 114 * VLEN >= ELEN, which must be a power of 2, and must be no greater than 115 * 2^16 = 65536bits = 8192bytes 116 */ 117 #define RISCV_MAX_VLENB (8192) 118 119 #endif /* __ASSEMBLY__ */ 120 121 #endif /* _UAPI_ASM_RISCV_PTRACE_H */ 122