1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2019 SiFive 4 */ 5 6 #ifndef _ASM_RISCV_SET_MEMORY_H 7 #define _ASM_RISCV_SET_MEMORY_H 8 9 #ifndef __ASSEMBLY__ 10 /* 11 * Functions to change memory attributes. 12 */ 13 #ifdef CONFIG_MMU 14 int set_memory_ro(unsigned long addr, int numpages); 15 int set_memory_rw(unsigned long addr, int numpages); 16 int set_memory_x(unsigned long addr, int numpages); 17 int set_memory_nx(unsigned long addr, int numpages); 18 #else 19 static inline int set_memory_ro(unsigned long addr, int numpages) { return 0; } 20 static inline int set_memory_rw(unsigned long addr, int numpages) { return 0; } 21 static inline int set_memory_x(unsigned long addr, int numpages) { return 0; } 22 static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; } 23 #endif 24 25 int set_direct_map_invalid_noflush(struct page *page); 26 int set_direct_map_default_noflush(struct page *page); 27 bool kernel_page_present(struct page *page); 28 29 #endif /* __ASSEMBLY__ */ 30 31 #ifdef CONFIG_ARCH_HAS_STRICT_KERNEL_RWX 32 #ifdef CONFIG_64BIT 33 #define SECTION_ALIGN (1 << 21) 34 #else 35 #define SECTION_ALIGN (1 << 22) 36 #endif 37 #else /* !CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */ 38 #define SECTION_ALIGN L1_CACHE_BYTES 39 #endif /* CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */ 40 41 #endif /* _ASM_RISCV_SET_MEMORY_H */ 42