1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2019 SiFive 4 */ 5 6 #ifndef _ASM_RISCV_SET_MEMORY_H 7 #define _ASM_RISCV_SET_MEMORY_H 8 9 #ifndef __ASSEMBLY__ 10 /* 11 * Functions to change memory attributes. 12 */ 13 #ifdef CONFIG_MMU 14 int set_memory_ro(unsigned long addr, int numpages); 15 int set_memory_rw(unsigned long addr, int numpages); 16 int set_memory_x(unsigned long addr, int numpages); 17 int set_memory_nx(unsigned long addr, int numpages); 18 #else 19 static inline int set_memory_ro(unsigned long addr, int numpages) { return 0; } 20 static inline int set_memory_rw(unsigned long addr, int numpages) { return 0; } 21 static inline int set_memory_x(unsigned long addr, int numpages) { return 0; } 22 static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; } 23 #endif 24 25 #ifdef CONFIG_STRICT_KERNEL_RWX 26 void set_kernel_text_ro(void); 27 void set_kernel_text_rw(void); 28 #else 29 static inline void set_kernel_text_ro(void) { } 30 static inline void set_kernel_text_rw(void) { } 31 #endif 32 33 int set_direct_map_invalid_noflush(struct page *page); 34 int set_direct_map_default_noflush(struct page *page); 35 36 #endif /* __ASSEMBLY__ */ 37 38 #ifdef CONFIG_ARCH_HAS_STRICT_KERNEL_RWX 39 #ifdef CONFIG_64BIT 40 #define SECTION_ALIGN (1 << 21) 41 #else 42 #define SECTION_ALIGN (1 << 22) 43 #endif 44 #else /* !CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */ 45 #define SECTION_ALIGN L1_CACHE_BYTES 46 #endif /* CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */ 47 48 #endif /* _ASM_RISCV_SET_MEMORY_H */ 49