1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_PGTABLE_H 7 #define _ASM_RISCV_PGTABLE_H 8 9 #include <linux/mmzone.h> 10 #include <linux/sizes.h> 11 12 #include <asm/pgtable-bits.h> 13 14 #ifndef __ASSEMBLY__ 15 16 /* Page Upper Directory not used in RISC-V */ 17 #include <asm-generic/pgtable-nopud.h> 18 #include <asm/page.h> 19 #include <asm/tlbflush.h> 20 #include <linux/mm_types.h> 21 22 #ifdef CONFIG_MMU 23 24 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) 25 #define VMALLOC_END (PAGE_OFFSET - 1) 26 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) 27 28 #define BPF_JIT_REGION_SIZE (SZ_128M) 29 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE) 30 #define BPF_JIT_REGION_END (VMALLOC_END) 31 32 /* 33 * Roughly size the vmemmap space to be large enough to fit enough 34 * struct pages to map half the virtual address space. Then 35 * position vmemmap directly below the VMALLOC region. 36 */ 37 #define VMEMMAP_SHIFT \ 38 (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) 39 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) 40 #define VMEMMAP_END (VMALLOC_START - 1) 41 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) 42 43 /* 44 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel 45 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled. 46 */ 47 #define vmemmap ((struct page *)VMEMMAP_START) 48 49 #define PCI_IO_SIZE SZ_16M 50 #define PCI_IO_END VMEMMAP_START 51 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE) 52 53 #define FIXADDR_TOP PCI_IO_START 54 #ifdef CONFIG_64BIT 55 #define FIXADDR_SIZE PMD_SIZE 56 #else 57 #define FIXADDR_SIZE PGDIR_SIZE 58 #endif 59 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 60 61 #endif 62 63 #ifdef CONFIG_64BIT 64 #include <asm/pgtable-64.h> 65 #else 66 #include <asm/pgtable-32.h> 67 #endif /* CONFIG_64BIT */ 68 69 #ifdef CONFIG_MMU 70 /* Number of entries in the page global directory */ 71 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) 72 /* Number of entries in the page table */ 73 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t)) 74 75 /* Number of PGD entries that a user-mode program can use */ 76 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) 77 78 /* Page protection bits */ 79 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER) 80 81 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE) 82 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ) 83 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE) 84 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC) 85 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC) 86 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \ 87 _PAGE_EXEC | _PAGE_WRITE) 88 89 #define PAGE_COPY PAGE_READ 90 #define PAGE_COPY_EXEC PAGE_EXEC 91 #define PAGE_COPY_READ_EXEC PAGE_READ_EXEC 92 #define PAGE_SHARED PAGE_WRITE 93 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC 94 95 #define _PAGE_KERNEL (_PAGE_READ \ 96 | _PAGE_WRITE \ 97 | _PAGE_PRESENT \ 98 | _PAGE_ACCESSED \ 99 | _PAGE_DIRTY) 100 101 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 102 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 103 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC) 104 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \ 105 | _PAGE_EXEC) 106 107 #define PAGE_TABLE __pgprot(_PAGE_TABLE) 108 109 /* 110 * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't 111 * change the properties of memory regions. 112 */ 113 #define _PAGE_IOREMAP _PAGE_KERNEL 114 115 extern pgd_t swapper_pg_dir[]; 116 117 /* MAP_PRIVATE permissions: xwr (copy-on-write) */ 118 #define __P000 PAGE_NONE 119 #define __P001 PAGE_READ 120 #define __P010 PAGE_COPY 121 #define __P011 PAGE_COPY 122 #define __P100 PAGE_EXEC 123 #define __P101 PAGE_READ_EXEC 124 #define __P110 PAGE_COPY_EXEC 125 #define __P111 PAGE_COPY_READ_EXEC 126 127 /* MAP_SHARED permissions: xwr */ 128 #define __S000 PAGE_NONE 129 #define __S001 PAGE_READ 130 #define __S010 PAGE_SHARED 131 #define __S011 PAGE_SHARED 132 #define __S100 PAGE_EXEC 133 #define __S101 PAGE_READ_EXEC 134 #define __S110 PAGE_SHARED_EXEC 135 #define __S111 PAGE_SHARED_EXEC 136 137 static inline int pmd_present(pmd_t pmd) 138 { 139 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE)); 140 } 141 142 static inline int pmd_none(pmd_t pmd) 143 { 144 return (pmd_val(pmd) == 0); 145 } 146 147 static inline int pmd_bad(pmd_t pmd) 148 { 149 return !pmd_present(pmd); 150 } 151 152 #define pmd_leaf pmd_leaf 153 static inline int pmd_leaf(pmd_t pmd) 154 { 155 return pmd_present(pmd) && 156 (pmd_val(pmd) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)); 157 } 158 159 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) 160 { 161 *pmdp = pmd; 162 } 163 164 static inline void pmd_clear(pmd_t *pmdp) 165 { 166 set_pmd(pmdp, __pmd(0)); 167 } 168 169 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot) 170 { 171 return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); 172 } 173 174 static inline unsigned long _pgd_pfn(pgd_t pgd) 175 { 176 return pgd_val(pgd) >> _PAGE_PFN_SHIFT; 177 } 178 179 static inline struct page *pmd_page(pmd_t pmd) 180 { 181 return pfn_to_page(pmd_val(pmd) >> _PAGE_PFN_SHIFT); 182 } 183 184 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 185 { 186 return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT); 187 } 188 189 /* Yields the page frame number (PFN) of a page table entry */ 190 static inline unsigned long pte_pfn(pte_t pte) 191 { 192 return (pte_val(pte) >> _PAGE_PFN_SHIFT); 193 } 194 195 #define pte_page(x) pfn_to_page(pte_pfn(x)) 196 197 /* Constructs a page table entry */ 198 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) 199 { 200 return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); 201 } 202 203 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 204 205 static inline int pte_present(pte_t pte) 206 { 207 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)); 208 } 209 210 static inline int pte_none(pte_t pte) 211 { 212 return (pte_val(pte) == 0); 213 } 214 215 static inline int pte_write(pte_t pte) 216 { 217 return pte_val(pte) & _PAGE_WRITE; 218 } 219 220 static inline int pte_exec(pte_t pte) 221 { 222 return pte_val(pte) & _PAGE_EXEC; 223 } 224 225 static inline int pte_huge(pte_t pte) 226 { 227 return pte_present(pte) 228 && (pte_val(pte) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)); 229 } 230 231 static inline int pte_dirty(pte_t pte) 232 { 233 return pte_val(pte) & _PAGE_DIRTY; 234 } 235 236 static inline int pte_young(pte_t pte) 237 { 238 return pte_val(pte) & _PAGE_ACCESSED; 239 } 240 241 static inline int pte_special(pte_t pte) 242 { 243 return pte_val(pte) & _PAGE_SPECIAL; 244 } 245 246 /* static inline pte_t pte_rdprotect(pte_t pte) */ 247 248 static inline pte_t pte_wrprotect(pte_t pte) 249 { 250 return __pte(pte_val(pte) & ~(_PAGE_WRITE)); 251 } 252 253 /* static inline pte_t pte_mkread(pte_t pte) */ 254 255 static inline pte_t pte_mkwrite(pte_t pte) 256 { 257 return __pte(pte_val(pte) | _PAGE_WRITE); 258 } 259 260 /* static inline pte_t pte_mkexec(pte_t pte) */ 261 262 static inline pte_t pte_mkdirty(pte_t pte) 263 { 264 return __pte(pte_val(pte) | _PAGE_DIRTY); 265 } 266 267 static inline pte_t pte_mkclean(pte_t pte) 268 { 269 return __pte(pte_val(pte) & ~(_PAGE_DIRTY)); 270 } 271 272 static inline pte_t pte_mkyoung(pte_t pte) 273 { 274 return __pte(pte_val(pte) | _PAGE_ACCESSED); 275 } 276 277 static inline pte_t pte_mkold(pte_t pte) 278 { 279 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED)); 280 } 281 282 static inline pte_t pte_mkspecial(pte_t pte) 283 { 284 return __pte(pte_val(pte) | _PAGE_SPECIAL); 285 } 286 287 static inline pte_t pte_mkhuge(pte_t pte) 288 { 289 return pte; 290 } 291 292 /* Modify page protection bits */ 293 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 294 { 295 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 296 } 297 298 #define pgd_ERROR(e) \ 299 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e)) 300 301 302 /* Commit new configuration to MMU hardware */ 303 static inline void update_mmu_cache(struct vm_area_struct *vma, 304 unsigned long address, pte_t *ptep) 305 { 306 /* 307 * The kernel assumes that TLBs don't cache invalid entries, but 308 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a 309 * cache flush; it is necessary even after writing invalid entries. 310 * Relying on flush_tlb_fix_spurious_fault would suffice, but 311 * the extra traps reduce performance. So, eagerly SFENCE.VMA. 312 */ 313 local_flush_tlb_page(address); 314 } 315 316 #define __HAVE_ARCH_PTE_SAME 317 static inline int pte_same(pte_t pte_a, pte_t pte_b) 318 { 319 return pte_val(pte_a) == pte_val(pte_b); 320 } 321 322 /* 323 * Certain architectures need to do special things when PTEs within 324 * a page table are directly modified. Thus, the following hook is 325 * made available. 326 */ 327 static inline void set_pte(pte_t *ptep, pte_t pteval) 328 { 329 *ptep = pteval; 330 } 331 332 void flush_icache_pte(pte_t pte); 333 334 static inline void set_pte_at(struct mm_struct *mm, 335 unsigned long addr, pte_t *ptep, pte_t pteval) 336 { 337 if (pte_present(pteval) && pte_exec(pteval)) 338 flush_icache_pte(pteval); 339 340 set_pte(ptep, pteval); 341 } 342 343 static inline void pte_clear(struct mm_struct *mm, 344 unsigned long addr, pte_t *ptep) 345 { 346 set_pte_at(mm, addr, ptep, __pte(0)); 347 } 348 349 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 350 static inline int ptep_set_access_flags(struct vm_area_struct *vma, 351 unsigned long address, pte_t *ptep, 352 pte_t entry, int dirty) 353 { 354 if (!pte_same(*ptep, entry)) 355 set_pte_at(vma->vm_mm, address, ptep, entry); 356 /* 357 * update_mmu_cache will unconditionally execute, handling both 358 * the case that the PTE changed and the spurious fault case. 359 */ 360 return true; 361 } 362 363 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 364 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 365 unsigned long address, pte_t *ptep) 366 { 367 return __pte(atomic_long_xchg((atomic_long_t *)ptep, 0)); 368 } 369 370 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 371 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 372 unsigned long address, 373 pte_t *ptep) 374 { 375 if (!pte_young(*ptep)) 376 return 0; 377 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep)); 378 } 379 380 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 381 static inline void ptep_set_wrprotect(struct mm_struct *mm, 382 unsigned long address, pte_t *ptep) 383 { 384 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep); 385 } 386 387 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 388 static inline int ptep_clear_flush_young(struct vm_area_struct *vma, 389 unsigned long address, pte_t *ptep) 390 { 391 /* 392 * This comment is borrowed from x86, but applies equally to RISC-V: 393 * 394 * Clearing the accessed bit without a TLB flush 395 * doesn't cause data corruption. [ It could cause incorrect 396 * page aging and the (mistaken) reclaim of hot pages, but the 397 * chance of that should be relatively low. ] 398 * 399 * So as a performance optimization don't flush the TLB when 400 * clearing the accessed bit, it will eventually be flushed by 401 * a context switch or a VM operation anyway. [ In the rare 402 * event of it not getting flushed for a long time the delay 403 * shouldn't really matter because there's no real memory 404 * pressure for swapout to react to. ] 405 */ 406 return ptep_test_and_clear_young(vma, address, ptep); 407 } 408 409 /* 410 * Encode and decode a swap entry 411 * 412 * Format of swap PTE: 413 * bit 0: _PAGE_PRESENT (zero) 414 * bit 1: _PAGE_PROT_NONE (zero) 415 * bits 2 to 6: swap type 416 * bits 7 to XLEN-1: swap offset 417 */ 418 #define __SWP_TYPE_SHIFT 2 419 #define __SWP_TYPE_BITS 5 420 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1) 421 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT) 422 423 #define MAX_SWAPFILES_CHECK() \ 424 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS) 425 426 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) 427 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT) 428 #define __swp_entry(type, offset) ((swp_entry_t) \ 429 { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) }) 430 431 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 432 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 433 434 /* 435 * In the RV64 Linux scheme, we give the user half of the virtual-address space 436 * and give the kernel the other (upper) half. 437 */ 438 #ifdef CONFIG_64BIT 439 #define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE) 440 #else 441 #define KERN_VIRT_START FIXADDR_START 442 #endif 443 444 /* 445 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32. 446 * Note that PGDIR_SIZE must evenly divide TASK_SIZE. 447 */ 448 #ifdef CONFIG_64BIT 449 #define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2) 450 #else 451 #define TASK_SIZE FIXADDR_START 452 #endif 453 454 #else /* CONFIG_MMU */ 455 456 #define PAGE_SHARED __pgprot(0) 457 #define PAGE_KERNEL __pgprot(0) 458 #define swapper_pg_dir NULL 459 #define TASK_SIZE 0xffffffffUL 460 #define VMALLOC_START 0 461 #define VMALLOC_END TASK_SIZE 462 463 #endif /* !CONFIG_MMU */ 464 465 #define kern_addr_valid(addr) (1) /* FIXME */ 466 467 extern void *dtb_early_va; 468 extern uintptr_t dtb_early_pa; 469 void setup_bootmem(void); 470 void paging_init(void); 471 472 #define FIRST_USER_ADDRESS 0 473 474 /* 475 * ZERO_PAGE is a global shared page that is always zero, 476 * used for zero-mapped memory areas, etc. 477 */ 478 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; 479 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 480 481 #endif /* !__ASSEMBLY__ */ 482 483 #endif /* _ASM_RISCV_PGTABLE_H */ 484