1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_PGTABLE_H 7 #define _ASM_RISCV_PGTABLE_H 8 9 #include <linux/mmzone.h> 10 #include <linux/sizes.h> 11 12 #include <asm/pgtable-bits.h> 13 14 #ifndef CONFIG_MMU 15 #define KERNEL_LINK_ADDR PAGE_OFFSET 16 #define KERN_VIRT_SIZE (UL(-1)) 17 #else 18 19 #define ADDRESS_SPACE_END (UL(-1)) 20 21 #ifdef CONFIG_64BIT 22 /* Leave 2GB for kernel and BPF at the end of the address space */ 23 #define KERNEL_LINK_ADDR (ADDRESS_SPACE_END - SZ_2G + 1) 24 #else 25 #define KERNEL_LINK_ADDR PAGE_OFFSET 26 #endif 27 28 /* Number of entries in the page global directory */ 29 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) 30 /* Number of entries in the page table */ 31 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t)) 32 33 /* 34 * Half of the kernel address space (half of the entries of the page global 35 * directory) is for the direct mapping. 36 */ 37 #define KERN_VIRT_SIZE ((PTRS_PER_PGD / 2 * PGDIR_SIZE) / 2) 38 39 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) 40 #define VMALLOC_END PAGE_OFFSET 41 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) 42 43 #define BPF_JIT_REGION_SIZE (SZ_128M) 44 #ifdef CONFIG_64BIT 45 #define BPF_JIT_REGION_START (BPF_JIT_REGION_END - BPF_JIT_REGION_SIZE) 46 #define BPF_JIT_REGION_END (MODULES_END) 47 #else 48 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE) 49 #define BPF_JIT_REGION_END (VMALLOC_END) 50 #endif 51 52 /* Modules always live before the kernel */ 53 #ifdef CONFIG_64BIT 54 /* This is used to define the end of the KASAN shadow region */ 55 #define MODULES_LOWEST_VADDR (KERNEL_LINK_ADDR - SZ_2G) 56 #define MODULES_VADDR (PFN_ALIGN((unsigned long)&_end) - SZ_2G) 57 #define MODULES_END (PFN_ALIGN((unsigned long)&_start)) 58 #endif 59 60 /* 61 * Roughly size the vmemmap space to be large enough to fit enough 62 * struct pages to map half the virtual address space. Then 63 * position vmemmap directly below the VMALLOC region. 64 */ 65 #ifdef CONFIG_64BIT 66 #define VA_BITS (pgtable_l5_enabled ? \ 67 57 : (pgtable_l4_enabled ? 48 : 39)) 68 #else 69 #define VA_BITS 32 70 #endif 71 72 #define VMEMMAP_SHIFT \ 73 (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) 74 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) 75 #define VMEMMAP_END VMALLOC_START 76 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) 77 78 /* 79 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel 80 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled. 81 */ 82 #define vmemmap ((struct page *)VMEMMAP_START) 83 84 #define PCI_IO_SIZE SZ_16M 85 #define PCI_IO_END VMEMMAP_START 86 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE) 87 88 #define FIXADDR_TOP PCI_IO_START 89 #ifdef CONFIG_64BIT 90 #define FIXADDR_SIZE PMD_SIZE 91 #else 92 #define FIXADDR_SIZE PGDIR_SIZE 93 #endif 94 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 95 96 #endif 97 98 #ifdef CONFIG_XIP_KERNEL 99 #define XIP_OFFSET SZ_32M 100 #define XIP_OFFSET_MASK (SZ_32M - 1) 101 #else 102 #define XIP_OFFSET 0 103 #endif 104 105 #ifndef __ASSEMBLY__ 106 107 #include <asm/page.h> 108 #include <asm/tlbflush.h> 109 #include <linux/mm_types.h> 110 111 #ifdef CONFIG_64BIT 112 #include <asm/pgtable-64.h> 113 #else 114 #include <asm/pgtable-32.h> 115 #endif /* CONFIG_64BIT */ 116 117 #ifdef CONFIG_XIP_KERNEL 118 #define XIP_FIXUP(addr) ({ \ 119 uintptr_t __a = (uintptr_t)(addr); \ 120 (__a >= CONFIG_XIP_PHYS_ADDR && \ 121 __a < CONFIG_XIP_PHYS_ADDR + XIP_OFFSET * 2) ? \ 122 __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\ 123 __a; \ 124 }) 125 #else 126 #define XIP_FIXUP(addr) (addr) 127 #endif /* CONFIG_XIP_KERNEL */ 128 129 struct pt_alloc_ops { 130 pte_t *(*get_pte_virt)(phys_addr_t pa); 131 phys_addr_t (*alloc_pte)(uintptr_t va); 132 #ifndef __PAGETABLE_PMD_FOLDED 133 pmd_t *(*get_pmd_virt)(phys_addr_t pa); 134 phys_addr_t (*alloc_pmd)(uintptr_t va); 135 pud_t *(*get_pud_virt)(phys_addr_t pa); 136 phys_addr_t (*alloc_pud)(uintptr_t va); 137 p4d_t *(*get_p4d_virt)(phys_addr_t pa); 138 phys_addr_t (*alloc_p4d)(uintptr_t va); 139 #endif 140 }; 141 142 extern struct pt_alloc_ops pt_ops __initdata; 143 144 #ifdef CONFIG_MMU 145 /* Number of PGD entries that a user-mode program can use */ 146 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) 147 148 /* Page protection bits */ 149 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER) 150 151 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE | _PAGE_READ) 152 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ) 153 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE) 154 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC) 155 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC) 156 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \ 157 _PAGE_EXEC | _PAGE_WRITE) 158 159 #define PAGE_COPY PAGE_READ 160 #define PAGE_COPY_EXEC PAGE_EXEC 161 #define PAGE_COPY_READ_EXEC PAGE_READ_EXEC 162 #define PAGE_SHARED PAGE_WRITE 163 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC 164 165 #define _PAGE_KERNEL (_PAGE_READ \ 166 | _PAGE_WRITE \ 167 | _PAGE_PRESENT \ 168 | _PAGE_ACCESSED \ 169 | _PAGE_DIRTY \ 170 | _PAGE_GLOBAL) 171 172 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 173 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 174 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC) 175 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \ 176 | _PAGE_EXEC) 177 178 #define PAGE_TABLE __pgprot(_PAGE_TABLE) 179 180 /* 181 * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't 182 * change the properties of memory regions. 183 */ 184 #define _PAGE_IOREMAP _PAGE_KERNEL 185 186 extern pgd_t swapper_pg_dir[]; 187 188 /* MAP_PRIVATE permissions: xwr (copy-on-write) */ 189 #define __P000 PAGE_NONE 190 #define __P001 PAGE_READ 191 #define __P010 PAGE_COPY 192 #define __P011 PAGE_COPY 193 #define __P100 PAGE_EXEC 194 #define __P101 PAGE_READ_EXEC 195 #define __P110 PAGE_COPY_EXEC 196 #define __P111 PAGE_COPY_READ_EXEC 197 198 /* MAP_SHARED permissions: xwr */ 199 #define __S000 PAGE_NONE 200 #define __S001 PAGE_READ 201 #define __S010 PAGE_SHARED 202 #define __S011 PAGE_SHARED 203 #define __S100 PAGE_EXEC 204 #define __S101 PAGE_READ_EXEC 205 #define __S110 PAGE_SHARED_EXEC 206 #define __S111 PAGE_SHARED_EXEC 207 208 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 209 static inline int pmd_present(pmd_t pmd) 210 { 211 /* 212 * Checking for _PAGE_LEAF is needed too because: 213 * When splitting a THP, split_huge_page() will temporarily clear 214 * the present bit, in this situation, pmd_present() and 215 * pmd_trans_huge() still needs to return true. 216 */ 217 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE | _PAGE_LEAF)); 218 } 219 #else 220 static inline int pmd_present(pmd_t pmd) 221 { 222 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE)); 223 } 224 #endif 225 226 static inline int pmd_none(pmd_t pmd) 227 { 228 return (pmd_val(pmd) == 0); 229 } 230 231 static inline int pmd_bad(pmd_t pmd) 232 { 233 return !pmd_present(pmd) || (pmd_val(pmd) & _PAGE_LEAF); 234 } 235 236 #define pmd_leaf pmd_leaf 237 static inline int pmd_leaf(pmd_t pmd) 238 { 239 return pmd_present(pmd) && (pmd_val(pmd) & _PAGE_LEAF); 240 } 241 242 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) 243 { 244 *pmdp = pmd; 245 } 246 247 static inline void pmd_clear(pmd_t *pmdp) 248 { 249 set_pmd(pmdp, __pmd(0)); 250 } 251 252 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot) 253 { 254 return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); 255 } 256 257 static inline unsigned long _pgd_pfn(pgd_t pgd) 258 { 259 return pgd_val(pgd) >> _PAGE_PFN_SHIFT; 260 } 261 262 static inline struct page *pmd_page(pmd_t pmd) 263 { 264 return pfn_to_page(pmd_val(pmd) >> _PAGE_PFN_SHIFT); 265 } 266 267 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 268 { 269 return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT); 270 } 271 272 static inline pte_t pmd_pte(pmd_t pmd) 273 { 274 return __pte(pmd_val(pmd)); 275 } 276 277 static inline pte_t pud_pte(pud_t pud) 278 { 279 return __pte(pud_val(pud)); 280 } 281 282 /* Yields the page frame number (PFN) of a page table entry */ 283 static inline unsigned long pte_pfn(pte_t pte) 284 { 285 return (pte_val(pte) >> _PAGE_PFN_SHIFT); 286 } 287 288 #define pte_page(x) pfn_to_page(pte_pfn(x)) 289 290 /* Constructs a page table entry */ 291 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) 292 { 293 return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); 294 } 295 296 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 297 298 static inline int pte_present(pte_t pte) 299 { 300 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)); 301 } 302 303 static inline int pte_none(pte_t pte) 304 { 305 return (pte_val(pte) == 0); 306 } 307 308 static inline int pte_write(pte_t pte) 309 { 310 return pte_val(pte) & _PAGE_WRITE; 311 } 312 313 static inline int pte_exec(pte_t pte) 314 { 315 return pte_val(pte) & _PAGE_EXEC; 316 } 317 318 static inline int pte_huge(pte_t pte) 319 { 320 return pte_present(pte) && (pte_val(pte) & _PAGE_LEAF); 321 } 322 323 static inline int pte_dirty(pte_t pte) 324 { 325 return pte_val(pte) & _PAGE_DIRTY; 326 } 327 328 static inline int pte_young(pte_t pte) 329 { 330 return pte_val(pte) & _PAGE_ACCESSED; 331 } 332 333 static inline int pte_special(pte_t pte) 334 { 335 return pte_val(pte) & _PAGE_SPECIAL; 336 } 337 338 /* static inline pte_t pte_rdprotect(pte_t pte) */ 339 340 static inline pte_t pte_wrprotect(pte_t pte) 341 { 342 return __pte(pte_val(pte) & ~(_PAGE_WRITE)); 343 } 344 345 /* static inline pte_t pte_mkread(pte_t pte) */ 346 347 static inline pte_t pte_mkwrite(pte_t pte) 348 { 349 return __pte(pte_val(pte) | _PAGE_WRITE); 350 } 351 352 /* static inline pte_t pte_mkexec(pte_t pte) */ 353 354 static inline pte_t pte_mkdirty(pte_t pte) 355 { 356 return __pte(pte_val(pte) | _PAGE_DIRTY); 357 } 358 359 static inline pte_t pte_mkclean(pte_t pte) 360 { 361 return __pte(pte_val(pte) & ~(_PAGE_DIRTY)); 362 } 363 364 static inline pte_t pte_mkyoung(pte_t pte) 365 { 366 return __pte(pte_val(pte) | _PAGE_ACCESSED); 367 } 368 369 static inline pte_t pte_mkold(pte_t pte) 370 { 371 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED)); 372 } 373 374 static inline pte_t pte_mkspecial(pte_t pte) 375 { 376 return __pte(pte_val(pte) | _PAGE_SPECIAL); 377 } 378 379 static inline pte_t pte_mkhuge(pte_t pte) 380 { 381 return pte; 382 } 383 384 #ifdef CONFIG_NUMA_BALANCING 385 /* 386 * See the comment in include/asm-generic/pgtable.h 387 */ 388 static inline int pte_protnone(pte_t pte) 389 { 390 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE; 391 } 392 393 static inline int pmd_protnone(pmd_t pmd) 394 { 395 return pte_protnone(pmd_pte(pmd)); 396 } 397 #endif 398 399 /* Modify page protection bits */ 400 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 401 { 402 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 403 } 404 405 #define pgd_ERROR(e) \ 406 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e)) 407 408 409 /* Commit new configuration to MMU hardware */ 410 static inline void update_mmu_cache(struct vm_area_struct *vma, 411 unsigned long address, pte_t *ptep) 412 { 413 /* 414 * The kernel assumes that TLBs don't cache invalid entries, but 415 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a 416 * cache flush; it is necessary even after writing invalid entries. 417 * Relying on flush_tlb_fix_spurious_fault would suffice, but 418 * the extra traps reduce performance. So, eagerly SFENCE.VMA. 419 */ 420 local_flush_tlb_page(address); 421 } 422 423 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 424 unsigned long address, pmd_t *pmdp) 425 { 426 pte_t *ptep = (pte_t *)pmdp; 427 428 update_mmu_cache(vma, address, ptep); 429 } 430 431 #define __HAVE_ARCH_PTE_SAME 432 static inline int pte_same(pte_t pte_a, pte_t pte_b) 433 { 434 return pte_val(pte_a) == pte_val(pte_b); 435 } 436 437 /* 438 * Certain architectures need to do special things when PTEs within 439 * a page table are directly modified. Thus, the following hook is 440 * made available. 441 */ 442 static inline void set_pte(pte_t *ptep, pte_t pteval) 443 { 444 *ptep = pteval; 445 } 446 447 void flush_icache_pte(pte_t pte); 448 449 static inline void set_pte_at(struct mm_struct *mm, 450 unsigned long addr, pte_t *ptep, pte_t pteval) 451 { 452 if (pte_present(pteval) && pte_exec(pteval)) 453 flush_icache_pte(pteval); 454 455 set_pte(ptep, pteval); 456 } 457 458 static inline void pte_clear(struct mm_struct *mm, 459 unsigned long addr, pte_t *ptep) 460 { 461 set_pte_at(mm, addr, ptep, __pte(0)); 462 } 463 464 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 465 static inline int ptep_set_access_flags(struct vm_area_struct *vma, 466 unsigned long address, pte_t *ptep, 467 pte_t entry, int dirty) 468 { 469 if (!pte_same(*ptep, entry)) 470 set_pte_at(vma->vm_mm, address, ptep, entry); 471 /* 472 * update_mmu_cache will unconditionally execute, handling both 473 * the case that the PTE changed and the spurious fault case. 474 */ 475 return true; 476 } 477 478 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 479 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 480 unsigned long address, pte_t *ptep) 481 { 482 return __pte(atomic_long_xchg((atomic_long_t *)ptep, 0)); 483 } 484 485 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 486 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 487 unsigned long address, 488 pte_t *ptep) 489 { 490 if (!pte_young(*ptep)) 491 return 0; 492 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep)); 493 } 494 495 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 496 static inline void ptep_set_wrprotect(struct mm_struct *mm, 497 unsigned long address, pte_t *ptep) 498 { 499 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep); 500 } 501 502 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 503 static inline int ptep_clear_flush_young(struct vm_area_struct *vma, 504 unsigned long address, pte_t *ptep) 505 { 506 /* 507 * This comment is borrowed from x86, but applies equally to RISC-V: 508 * 509 * Clearing the accessed bit without a TLB flush 510 * doesn't cause data corruption. [ It could cause incorrect 511 * page aging and the (mistaken) reclaim of hot pages, but the 512 * chance of that should be relatively low. ] 513 * 514 * So as a performance optimization don't flush the TLB when 515 * clearing the accessed bit, it will eventually be flushed by 516 * a context switch or a VM operation anyway. [ In the rare 517 * event of it not getting flushed for a long time the delay 518 * shouldn't really matter because there's no real memory 519 * pressure for swapout to react to. ] 520 */ 521 return ptep_test_and_clear_young(vma, address, ptep); 522 } 523 524 /* 525 * THP functions 526 */ 527 static inline pmd_t pte_pmd(pte_t pte) 528 { 529 return __pmd(pte_val(pte)); 530 } 531 532 static inline pmd_t pmd_mkhuge(pmd_t pmd) 533 { 534 return pmd; 535 } 536 537 static inline pmd_t pmd_mkinvalid(pmd_t pmd) 538 { 539 return __pmd(pmd_val(pmd) & ~(_PAGE_PRESENT|_PAGE_PROT_NONE)); 540 } 541 542 #define __pmd_to_phys(pmd) (pmd_val(pmd) >> _PAGE_PFN_SHIFT << PAGE_SHIFT) 543 544 static inline unsigned long pmd_pfn(pmd_t pmd) 545 { 546 return ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT); 547 } 548 549 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 550 { 551 return pte_pmd(pte_modify(pmd_pte(pmd), newprot)); 552 } 553 554 #define pmd_write pmd_write 555 static inline int pmd_write(pmd_t pmd) 556 { 557 return pte_write(pmd_pte(pmd)); 558 } 559 560 static inline int pmd_dirty(pmd_t pmd) 561 { 562 return pte_dirty(pmd_pte(pmd)); 563 } 564 565 static inline int pmd_young(pmd_t pmd) 566 { 567 return pte_young(pmd_pte(pmd)); 568 } 569 570 static inline pmd_t pmd_mkold(pmd_t pmd) 571 { 572 return pte_pmd(pte_mkold(pmd_pte(pmd))); 573 } 574 575 static inline pmd_t pmd_mkyoung(pmd_t pmd) 576 { 577 return pte_pmd(pte_mkyoung(pmd_pte(pmd))); 578 } 579 580 static inline pmd_t pmd_mkwrite(pmd_t pmd) 581 { 582 return pte_pmd(pte_mkwrite(pmd_pte(pmd))); 583 } 584 585 static inline pmd_t pmd_wrprotect(pmd_t pmd) 586 { 587 return pte_pmd(pte_wrprotect(pmd_pte(pmd))); 588 } 589 590 static inline pmd_t pmd_mkclean(pmd_t pmd) 591 { 592 return pte_pmd(pte_mkclean(pmd_pte(pmd))); 593 } 594 595 static inline pmd_t pmd_mkdirty(pmd_t pmd) 596 { 597 return pte_pmd(pte_mkdirty(pmd_pte(pmd))); 598 } 599 600 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 601 pmd_t *pmdp, pmd_t pmd) 602 { 603 return set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd)); 604 } 605 606 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 607 pud_t *pudp, pud_t pud) 608 { 609 return set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud)); 610 } 611 612 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 613 static inline int pmd_trans_huge(pmd_t pmd) 614 { 615 return pmd_leaf(pmd); 616 } 617 618 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 619 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 620 unsigned long address, pmd_t *pmdp, 621 pmd_t entry, int dirty) 622 { 623 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty); 624 } 625 626 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 627 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 628 unsigned long address, pmd_t *pmdp) 629 { 630 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp); 631 } 632 633 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 634 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 635 unsigned long address, pmd_t *pmdp) 636 { 637 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp)); 638 } 639 640 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 641 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 642 unsigned long address, pmd_t *pmdp) 643 { 644 ptep_set_wrprotect(mm, address, (pte_t *)pmdp); 645 } 646 647 #define pmdp_establish pmdp_establish 648 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 649 unsigned long address, pmd_t *pmdp, pmd_t pmd) 650 { 651 return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd))); 652 } 653 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 654 655 /* 656 * Encode and decode a swap entry 657 * 658 * Format of swap PTE: 659 * bit 0: _PAGE_PRESENT (zero) 660 * bit 1 to 3: _PAGE_LEAF (zero) 661 * bit 5: _PAGE_PROT_NONE (zero) 662 * bits 6 to 10: swap type 663 * bits 10 to XLEN-1: swap offset 664 */ 665 #define __SWP_TYPE_SHIFT 6 666 #define __SWP_TYPE_BITS 5 667 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1) 668 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT) 669 670 #define MAX_SWAPFILES_CHECK() \ 671 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS) 672 673 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) 674 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT) 675 #define __swp_entry(type, offset) ((swp_entry_t) \ 676 { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) }) 677 678 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 679 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 680 681 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 682 #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val(pmd) }) 683 #define __swp_entry_to_pmd(swp) __pmd((swp).val) 684 #endif /* CONFIG_ARCH_ENABLE_THP_MIGRATION */ 685 686 /* 687 * In the RV64 Linux scheme, we give the user half of the virtual-address space 688 * and give the kernel the other (upper) half. 689 */ 690 #ifdef CONFIG_64BIT 691 #define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE) 692 #else 693 #define KERN_VIRT_START FIXADDR_START 694 #endif 695 696 /* 697 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32. 698 * Note that PGDIR_SIZE must evenly divide TASK_SIZE. 699 * Task size is: 700 * - 0x9fc00000 (~2.5GB) for RV32. 701 * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu 702 * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu 703 * 704 * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V 705 * Instruction Set Manual Volume II: Privileged Architecture" states that 706 * "load and store effective addresses, which are 64bits, must have bits 707 * 63–48 all equal to bit 47, or else a page-fault exception will occur." 708 */ 709 #ifdef CONFIG_64BIT 710 #define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2) 711 #define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2) 712 #else 713 #define TASK_SIZE FIXADDR_START 714 #define TASK_SIZE_MIN TASK_SIZE 715 #endif 716 717 #else /* CONFIG_MMU */ 718 719 #define PAGE_SHARED __pgprot(0) 720 #define PAGE_KERNEL __pgprot(0) 721 #define swapper_pg_dir NULL 722 #define TASK_SIZE 0xffffffffUL 723 #define VMALLOC_START 0 724 #define VMALLOC_END TASK_SIZE 725 726 #endif /* !CONFIG_MMU */ 727 728 #define kern_addr_valid(addr) (1) /* FIXME */ 729 730 extern char _start[]; 731 extern void *_dtb_early_va; 732 extern uintptr_t _dtb_early_pa; 733 #if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU) 734 #define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va)) 735 #define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa)) 736 #else 737 #define dtb_early_va _dtb_early_va 738 #define dtb_early_pa _dtb_early_pa 739 #endif /* CONFIG_XIP_KERNEL */ 740 extern u64 satp_mode; 741 extern bool pgtable_l4_enabled; 742 743 void paging_init(void); 744 void misc_mem_init(void); 745 746 /* 747 * ZERO_PAGE is a global shared page that is always zero, 748 * used for zero-mapped memory areas, etc. 749 */ 750 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; 751 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 752 753 #endif /* !__ASSEMBLY__ */ 754 755 #endif /* _ASM_RISCV_PGTABLE_H */ 756