1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 4 * 5 * Authors: 6 * Anup Patel <anup.patel@wdc.com> 7 */ 8 9 #ifndef __RISCV_KVM_HOST_H__ 10 #define __RISCV_KVM_HOST_H__ 11 12 #include <linux/types.h> 13 #include <linux/kvm.h> 14 #include <linux/kvm_types.h> 15 #include <linux/spinlock.h> 16 #include <asm/hwcap.h> 17 #include <asm/kvm_vcpu_fp.h> 18 #include <asm/kvm_vcpu_insn.h> 19 #include <asm/kvm_vcpu_sbi.h> 20 #include <asm/kvm_vcpu_timer.h> 21 22 #define KVM_MAX_VCPUS 1024 23 24 #define KVM_HALT_POLL_NS_DEFAULT 500000 25 26 #define KVM_VCPU_MAX_FEATURES 0 27 28 #define KVM_REQ_SLEEP \ 29 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 30 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1) 31 #define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2) 32 #define KVM_REQ_FENCE_I \ 33 KVM_ARCH_REQ_FLAGS(3, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 34 #define KVM_REQ_HFENCE_GVMA_VMID_ALL KVM_REQ_TLB_FLUSH 35 #define KVM_REQ_HFENCE_VVMA_ALL \ 36 KVM_ARCH_REQ_FLAGS(4, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 37 #define KVM_REQ_HFENCE \ 38 KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 39 40 enum kvm_riscv_hfence_type { 41 KVM_RISCV_HFENCE_UNKNOWN = 0, 42 KVM_RISCV_HFENCE_GVMA_VMID_GPA, 43 KVM_RISCV_HFENCE_VVMA_ASID_GVA, 44 KVM_RISCV_HFENCE_VVMA_ASID_ALL, 45 KVM_RISCV_HFENCE_VVMA_GVA, 46 }; 47 48 struct kvm_riscv_hfence { 49 enum kvm_riscv_hfence_type type; 50 unsigned long asid; 51 unsigned long order; 52 gpa_t addr; 53 gpa_t size; 54 }; 55 56 #define KVM_RISCV_VCPU_MAX_HFENCE 64 57 58 struct kvm_vm_stat { 59 struct kvm_vm_stat_generic generic; 60 }; 61 62 struct kvm_vcpu_stat { 63 struct kvm_vcpu_stat_generic generic; 64 u64 ecall_exit_stat; 65 u64 wfi_exit_stat; 66 u64 mmio_exit_user; 67 u64 mmio_exit_kernel; 68 u64 csr_exit_user; 69 u64 csr_exit_kernel; 70 u64 signal_exits; 71 u64 exits; 72 }; 73 74 struct kvm_arch_memory_slot { 75 }; 76 77 struct kvm_vmid { 78 /* 79 * Writes to vmid_version and vmid happen with vmid_lock held 80 * whereas reads happen without any lock held. 81 */ 82 unsigned long vmid_version; 83 unsigned long vmid; 84 }; 85 86 struct kvm_arch { 87 /* G-stage vmid */ 88 struct kvm_vmid vmid; 89 90 /* G-stage page table */ 91 pgd_t *pgd; 92 phys_addr_t pgd_phys; 93 94 /* Guest Timer */ 95 struct kvm_guest_timer timer; 96 }; 97 98 struct kvm_cpu_trap { 99 unsigned long sepc; 100 unsigned long scause; 101 unsigned long stval; 102 unsigned long htval; 103 unsigned long htinst; 104 }; 105 106 struct kvm_cpu_context { 107 unsigned long zero; 108 unsigned long ra; 109 unsigned long sp; 110 unsigned long gp; 111 unsigned long tp; 112 unsigned long t0; 113 unsigned long t1; 114 unsigned long t2; 115 unsigned long s0; 116 unsigned long s1; 117 unsigned long a0; 118 unsigned long a1; 119 unsigned long a2; 120 unsigned long a3; 121 unsigned long a4; 122 unsigned long a5; 123 unsigned long a6; 124 unsigned long a7; 125 unsigned long s2; 126 unsigned long s3; 127 unsigned long s4; 128 unsigned long s5; 129 unsigned long s6; 130 unsigned long s7; 131 unsigned long s8; 132 unsigned long s9; 133 unsigned long s10; 134 unsigned long s11; 135 unsigned long t3; 136 unsigned long t4; 137 unsigned long t5; 138 unsigned long t6; 139 unsigned long sepc; 140 unsigned long sstatus; 141 unsigned long hstatus; 142 union __riscv_fp_state fp; 143 }; 144 145 struct kvm_vcpu_csr { 146 unsigned long vsstatus; 147 unsigned long vsie; 148 unsigned long vstvec; 149 unsigned long vsscratch; 150 unsigned long vsepc; 151 unsigned long vscause; 152 unsigned long vstval; 153 unsigned long hvip; 154 unsigned long vsatp; 155 unsigned long scounteren; 156 }; 157 158 struct kvm_vcpu_arch { 159 /* VCPU ran at least once */ 160 bool ran_atleast_once; 161 162 /* Last Host CPU on which Guest VCPU exited */ 163 int last_exit_cpu; 164 165 /* ISA feature bits (similar to MISA) */ 166 DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX); 167 168 /* Vendor, Arch, and Implementation details */ 169 unsigned long mvendorid; 170 unsigned long marchid; 171 unsigned long mimpid; 172 173 /* SSCRATCH, STVEC, and SCOUNTEREN of Host */ 174 unsigned long host_sscratch; 175 unsigned long host_stvec; 176 unsigned long host_scounteren; 177 178 /* CPU context of Host */ 179 struct kvm_cpu_context host_context; 180 181 /* CPU context of Guest VCPU */ 182 struct kvm_cpu_context guest_context; 183 184 /* CPU CSR context of Guest VCPU */ 185 struct kvm_vcpu_csr guest_csr; 186 187 /* CPU context upon Guest VCPU reset */ 188 struct kvm_cpu_context guest_reset_context; 189 190 /* CPU CSR context upon Guest VCPU reset */ 191 struct kvm_vcpu_csr guest_reset_csr; 192 193 /* 194 * VCPU interrupts 195 * 196 * We have a lockless approach for tracking pending VCPU interrupts 197 * implemented using atomic bitops. The irqs_pending bitmap represent 198 * pending interrupts whereas irqs_pending_mask represent bits changed 199 * in irqs_pending. Our approach is modeled around multiple producer 200 * and single consumer problem where the consumer is the VCPU itself. 201 */ 202 unsigned long irqs_pending; 203 unsigned long irqs_pending_mask; 204 205 /* VCPU Timer */ 206 struct kvm_vcpu_timer timer; 207 208 /* HFENCE request queue */ 209 spinlock_t hfence_lock; 210 unsigned long hfence_head; 211 unsigned long hfence_tail; 212 struct kvm_riscv_hfence hfence_queue[KVM_RISCV_VCPU_MAX_HFENCE]; 213 214 /* MMIO instruction details */ 215 struct kvm_mmio_decode mmio_decode; 216 217 /* CSR instruction details */ 218 struct kvm_csr_decode csr_decode; 219 220 /* SBI context */ 221 struct kvm_vcpu_sbi_context sbi_context; 222 223 /* Cache pages needed to program page tables with spinlock held */ 224 struct kvm_mmu_memory_cache mmu_page_cache; 225 226 /* VCPU power-off state */ 227 bool power_off; 228 229 /* Don't run the VCPU (blocked) */ 230 bool pause; 231 }; 232 233 static inline void kvm_arch_hardware_unsetup(void) {} 234 static inline void kvm_arch_sync_events(struct kvm *kvm) {} 235 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 236 237 #define KVM_ARCH_WANT_MMU_NOTIFIER 238 239 #define KVM_RISCV_GSTAGE_TLB_MIN_ORDER 12 240 241 void kvm_riscv_local_hfence_gvma_vmid_gpa(unsigned long vmid, 242 gpa_t gpa, gpa_t gpsz, 243 unsigned long order); 244 void kvm_riscv_local_hfence_gvma_vmid_all(unsigned long vmid); 245 void kvm_riscv_local_hfence_gvma_gpa(gpa_t gpa, gpa_t gpsz, 246 unsigned long order); 247 void kvm_riscv_local_hfence_gvma_all(void); 248 void kvm_riscv_local_hfence_vvma_asid_gva(unsigned long vmid, 249 unsigned long asid, 250 unsigned long gva, 251 unsigned long gvsz, 252 unsigned long order); 253 void kvm_riscv_local_hfence_vvma_asid_all(unsigned long vmid, 254 unsigned long asid); 255 void kvm_riscv_local_hfence_vvma_gva(unsigned long vmid, 256 unsigned long gva, unsigned long gvsz, 257 unsigned long order); 258 void kvm_riscv_local_hfence_vvma_all(unsigned long vmid); 259 260 void kvm_riscv_local_tlb_sanitize(struct kvm_vcpu *vcpu); 261 262 void kvm_riscv_fence_i_process(struct kvm_vcpu *vcpu); 263 void kvm_riscv_hfence_gvma_vmid_all_process(struct kvm_vcpu *vcpu); 264 void kvm_riscv_hfence_vvma_all_process(struct kvm_vcpu *vcpu); 265 void kvm_riscv_hfence_process(struct kvm_vcpu *vcpu); 266 267 void kvm_riscv_fence_i(struct kvm *kvm, 268 unsigned long hbase, unsigned long hmask); 269 void kvm_riscv_hfence_gvma_vmid_gpa(struct kvm *kvm, 270 unsigned long hbase, unsigned long hmask, 271 gpa_t gpa, gpa_t gpsz, 272 unsigned long order); 273 void kvm_riscv_hfence_gvma_vmid_all(struct kvm *kvm, 274 unsigned long hbase, unsigned long hmask); 275 void kvm_riscv_hfence_vvma_asid_gva(struct kvm *kvm, 276 unsigned long hbase, unsigned long hmask, 277 unsigned long gva, unsigned long gvsz, 278 unsigned long order, unsigned long asid); 279 void kvm_riscv_hfence_vvma_asid_all(struct kvm *kvm, 280 unsigned long hbase, unsigned long hmask, 281 unsigned long asid); 282 void kvm_riscv_hfence_vvma_gva(struct kvm *kvm, 283 unsigned long hbase, unsigned long hmask, 284 unsigned long gva, unsigned long gvsz, 285 unsigned long order); 286 void kvm_riscv_hfence_vvma_all(struct kvm *kvm, 287 unsigned long hbase, unsigned long hmask); 288 289 int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa, 290 phys_addr_t hpa, unsigned long size, 291 bool writable, bool in_atomic); 292 void kvm_riscv_gstage_iounmap(struct kvm *kvm, gpa_t gpa, 293 unsigned long size); 294 int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu, 295 struct kvm_memory_slot *memslot, 296 gpa_t gpa, unsigned long hva, bool is_write); 297 int kvm_riscv_gstage_alloc_pgd(struct kvm *kvm); 298 void kvm_riscv_gstage_free_pgd(struct kvm *kvm); 299 void kvm_riscv_gstage_update_hgatp(struct kvm_vcpu *vcpu); 300 void kvm_riscv_gstage_mode_detect(void); 301 unsigned long kvm_riscv_gstage_mode(void); 302 int kvm_riscv_gstage_gpa_bits(void); 303 304 void kvm_riscv_gstage_vmid_detect(void); 305 unsigned long kvm_riscv_gstage_vmid_bits(void); 306 int kvm_riscv_gstage_vmid_init(struct kvm *kvm); 307 bool kvm_riscv_gstage_vmid_ver_changed(struct kvm_vmid *vmid); 308 void kvm_riscv_gstage_vmid_update(struct kvm_vcpu *vcpu); 309 310 void __kvm_riscv_unpriv_trap(void); 311 312 unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu, 313 bool read_insn, 314 unsigned long guest_addr, 315 struct kvm_cpu_trap *trap); 316 void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu, 317 struct kvm_cpu_trap *trap); 318 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 319 struct kvm_cpu_trap *trap); 320 321 void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch); 322 323 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 324 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 325 void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu); 326 void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu); 327 bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, unsigned long mask); 328 void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 329 void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 330 331 #endif /* __RISCV_KVM_HOST_H__ */ 332