1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 4 * 5 * Authors: 6 * Anup Patel <anup.patel@wdc.com> 7 */ 8 9 #ifndef __RISCV_KVM_HOST_H__ 10 #define __RISCV_KVM_HOST_H__ 11 12 #include <linux/types.h> 13 #include <linux/kvm.h> 14 #include <linux/kvm_types.h> 15 #include <asm/csr.h> 16 #include <asm/kvm_vcpu_fp.h> 17 #include <asm/kvm_vcpu_timer.h> 18 19 #define KVM_MAX_VCPUS \ 20 ((HGATP_VMID_MASK >> HGATP_VMID_SHIFT) + 1) 21 22 #define KVM_HALT_POLL_NS_DEFAULT 500000 23 24 #define KVM_VCPU_MAX_FEATURES 0 25 26 #define KVM_REQ_SLEEP \ 27 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 28 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1) 29 #define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2) 30 31 struct kvm_vm_stat { 32 struct kvm_vm_stat_generic generic; 33 }; 34 35 struct kvm_vcpu_stat { 36 struct kvm_vcpu_stat_generic generic; 37 u64 ecall_exit_stat; 38 u64 wfi_exit_stat; 39 u64 mmio_exit_user; 40 u64 mmio_exit_kernel; 41 u64 exits; 42 }; 43 44 struct kvm_arch_memory_slot { 45 }; 46 47 struct kvm_vmid { 48 /* 49 * Writes to vmid_version and vmid happen with vmid_lock held 50 * whereas reads happen without any lock held. 51 */ 52 unsigned long vmid_version; 53 unsigned long vmid; 54 }; 55 56 struct kvm_arch { 57 /* stage2 vmid */ 58 struct kvm_vmid vmid; 59 60 /* stage2 page table */ 61 pgd_t *pgd; 62 phys_addr_t pgd_phys; 63 64 /* Guest Timer */ 65 struct kvm_guest_timer timer; 66 }; 67 68 struct kvm_mmio_decode { 69 unsigned long insn; 70 int insn_len; 71 int len; 72 int shift; 73 int return_handled; 74 }; 75 76 struct kvm_sbi_context { 77 int return_handled; 78 }; 79 80 struct kvm_cpu_trap { 81 unsigned long sepc; 82 unsigned long scause; 83 unsigned long stval; 84 unsigned long htval; 85 unsigned long htinst; 86 }; 87 88 struct kvm_cpu_context { 89 unsigned long zero; 90 unsigned long ra; 91 unsigned long sp; 92 unsigned long gp; 93 unsigned long tp; 94 unsigned long t0; 95 unsigned long t1; 96 unsigned long t2; 97 unsigned long s0; 98 unsigned long s1; 99 unsigned long a0; 100 unsigned long a1; 101 unsigned long a2; 102 unsigned long a3; 103 unsigned long a4; 104 unsigned long a5; 105 unsigned long a6; 106 unsigned long a7; 107 unsigned long s2; 108 unsigned long s3; 109 unsigned long s4; 110 unsigned long s5; 111 unsigned long s6; 112 unsigned long s7; 113 unsigned long s8; 114 unsigned long s9; 115 unsigned long s10; 116 unsigned long s11; 117 unsigned long t3; 118 unsigned long t4; 119 unsigned long t5; 120 unsigned long t6; 121 unsigned long sepc; 122 unsigned long sstatus; 123 unsigned long hstatus; 124 union __riscv_fp_state fp; 125 }; 126 127 struct kvm_vcpu_csr { 128 unsigned long vsstatus; 129 unsigned long vsie; 130 unsigned long vstvec; 131 unsigned long vsscratch; 132 unsigned long vsepc; 133 unsigned long vscause; 134 unsigned long vstval; 135 unsigned long hvip; 136 unsigned long vsatp; 137 unsigned long scounteren; 138 }; 139 140 struct kvm_vcpu_arch { 141 /* VCPU ran at least once */ 142 bool ran_atleast_once; 143 144 /* ISA feature bits (similar to MISA) */ 145 unsigned long isa; 146 147 /* SSCRATCH, STVEC, and SCOUNTEREN of Host */ 148 unsigned long host_sscratch; 149 unsigned long host_stvec; 150 unsigned long host_scounteren; 151 152 /* CPU context of Host */ 153 struct kvm_cpu_context host_context; 154 155 /* CPU context of Guest VCPU */ 156 struct kvm_cpu_context guest_context; 157 158 /* CPU CSR context of Guest VCPU */ 159 struct kvm_vcpu_csr guest_csr; 160 161 /* CPU context upon Guest VCPU reset */ 162 struct kvm_cpu_context guest_reset_context; 163 164 /* CPU CSR context upon Guest VCPU reset */ 165 struct kvm_vcpu_csr guest_reset_csr; 166 167 /* 168 * VCPU interrupts 169 * 170 * We have a lockless approach for tracking pending VCPU interrupts 171 * implemented using atomic bitops. The irqs_pending bitmap represent 172 * pending interrupts whereas irqs_pending_mask represent bits changed 173 * in irqs_pending. Our approach is modeled around multiple producer 174 * and single consumer problem where the consumer is the VCPU itself. 175 */ 176 unsigned long irqs_pending; 177 unsigned long irqs_pending_mask; 178 179 /* VCPU Timer */ 180 struct kvm_vcpu_timer timer; 181 182 /* MMIO instruction details */ 183 struct kvm_mmio_decode mmio_decode; 184 185 /* SBI context */ 186 struct kvm_sbi_context sbi_context; 187 188 /* Cache pages needed to program page tables with spinlock held */ 189 struct kvm_mmu_memory_cache mmu_page_cache; 190 191 /* VCPU power-off state */ 192 bool power_off; 193 194 /* Don't run the VCPU (blocked) */ 195 bool pause; 196 197 /* SRCU lock index for in-kernel run loop */ 198 int srcu_idx; 199 }; 200 201 static inline void kvm_arch_hardware_unsetup(void) {} 202 static inline void kvm_arch_sync_events(struct kvm *kvm) {} 203 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 204 205 #define KVM_ARCH_WANT_MMU_NOTIFIER 206 207 void __kvm_riscv_hfence_gvma_vmid_gpa(unsigned long gpa_divby_4, 208 unsigned long vmid); 209 void __kvm_riscv_hfence_gvma_vmid(unsigned long vmid); 210 void __kvm_riscv_hfence_gvma_gpa(unsigned long gpa_divby_4); 211 void __kvm_riscv_hfence_gvma_all(void); 212 213 int kvm_riscv_stage2_map(struct kvm_vcpu *vcpu, 214 struct kvm_memory_slot *memslot, 215 gpa_t gpa, unsigned long hva, bool is_write); 216 int kvm_riscv_stage2_alloc_pgd(struct kvm *kvm); 217 void kvm_riscv_stage2_free_pgd(struct kvm *kvm); 218 void kvm_riscv_stage2_update_hgatp(struct kvm_vcpu *vcpu); 219 void kvm_riscv_stage2_mode_detect(void); 220 unsigned long kvm_riscv_stage2_mode(void); 221 int kvm_riscv_stage2_gpa_bits(void); 222 223 void kvm_riscv_stage2_vmid_detect(void); 224 unsigned long kvm_riscv_stage2_vmid_bits(void); 225 int kvm_riscv_stage2_vmid_init(struct kvm *kvm); 226 bool kvm_riscv_stage2_vmid_ver_changed(struct kvm_vmid *vmid); 227 void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu); 228 229 void __kvm_riscv_unpriv_trap(void); 230 231 unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu, 232 bool read_insn, 233 unsigned long guest_addr, 234 struct kvm_cpu_trap *trap); 235 void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu, 236 struct kvm_cpu_trap *trap); 237 int kvm_riscv_vcpu_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run); 238 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 239 struct kvm_cpu_trap *trap); 240 241 void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch); 242 243 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 244 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 245 void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu); 246 void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu); 247 bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, unsigned long mask); 248 void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 249 void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 250 251 int kvm_riscv_vcpu_sbi_return(struct kvm_vcpu *vcpu, struct kvm_run *run); 252 int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run); 253 254 #endif /* __RISCV_KVM_HOST_H__ */ 255