1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 4 * 5 * Authors: 6 * Anup Patel <anup.patel@wdc.com> 7 */ 8 9 #ifndef __RISCV_KVM_HOST_H__ 10 #define __RISCV_KVM_HOST_H__ 11 12 #include <linux/types.h> 13 #include <linux/kvm.h> 14 #include <linux/kvm_types.h> 15 #include <asm/kvm_vcpu_fp.h> 16 #include <asm/kvm_vcpu_timer.h> 17 18 #ifdef CONFIG_64BIT 19 #define KVM_MAX_VCPUS (1U << 16) 20 #else 21 #define KVM_MAX_VCPUS (1U << 9) 22 #endif 23 24 #define KVM_HALT_POLL_NS_DEFAULT 500000 25 26 #define KVM_VCPU_MAX_FEATURES 0 27 28 #define KVM_REQ_SLEEP \ 29 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 30 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1) 31 #define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2) 32 33 struct kvm_vm_stat { 34 struct kvm_vm_stat_generic generic; 35 }; 36 37 struct kvm_vcpu_stat { 38 struct kvm_vcpu_stat_generic generic; 39 u64 ecall_exit_stat; 40 u64 wfi_exit_stat; 41 u64 mmio_exit_user; 42 u64 mmio_exit_kernel; 43 u64 exits; 44 }; 45 46 struct kvm_arch_memory_slot { 47 }; 48 49 struct kvm_vmid { 50 /* 51 * Writes to vmid_version and vmid happen with vmid_lock held 52 * whereas reads happen without any lock held. 53 */ 54 unsigned long vmid_version; 55 unsigned long vmid; 56 }; 57 58 struct kvm_arch { 59 /* stage2 vmid */ 60 struct kvm_vmid vmid; 61 62 /* stage2 page table */ 63 pgd_t *pgd; 64 phys_addr_t pgd_phys; 65 66 /* Guest Timer */ 67 struct kvm_guest_timer timer; 68 }; 69 70 struct kvm_mmio_decode { 71 unsigned long insn; 72 int insn_len; 73 int len; 74 int shift; 75 int return_handled; 76 }; 77 78 struct kvm_sbi_context { 79 int return_handled; 80 }; 81 82 #define KVM_MMU_PAGE_CACHE_NR_OBJS 32 83 84 struct kvm_mmu_page_cache { 85 int nobjs; 86 void *objects[KVM_MMU_PAGE_CACHE_NR_OBJS]; 87 }; 88 89 struct kvm_cpu_trap { 90 unsigned long sepc; 91 unsigned long scause; 92 unsigned long stval; 93 unsigned long htval; 94 unsigned long htinst; 95 }; 96 97 struct kvm_cpu_context { 98 unsigned long zero; 99 unsigned long ra; 100 unsigned long sp; 101 unsigned long gp; 102 unsigned long tp; 103 unsigned long t0; 104 unsigned long t1; 105 unsigned long t2; 106 unsigned long s0; 107 unsigned long s1; 108 unsigned long a0; 109 unsigned long a1; 110 unsigned long a2; 111 unsigned long a3; 112 unsigned long a4; 113 unsigned long a5; 114 unsigned long a6; 115 unsigned long a7; 116 unsigned long s2; 117 unsigned long s3; 118 unsigned long s4; 119 unsigned long s5; 120 unsigned long s6; 121 unsigned long s7; 122 unsigned long s8; 123 unsigned long s9; 124 unsigned long s10; 125 unsigned long s11; 126 unsigned long t3; 127 unsigned long t4; 128 unsigned long t5; 129 unsigned long t6; 130 unsigned long sepc; 131 unsigned long sstatus; 132 unsigned long hstatus; 133 union __riscv_fp_state fp; 134 }; 135 136 struct kvm_vcpu_csr { 137 unsigned long vsstatus; 138 unsigned long vsie; 139 unsigned long vstvec; 140 unsigned long vsscratch; 141 unsigned long vsepc; 142 unsigned long vscause; 143 unsigned long vstval; 144 unsigned long hvip; 145 unsigned long vsatp; 146 unsigned long scounteren; 147 }; 148 149 struct kvm_vcpu_arch { 150 /* VCPU ran at least once */ 151 bool ran_atleast_once; 152 153 /* ISA feature bits (similar to MISA) */ 154 unsigned long isa; 155 156 /* SSCRATCH, STVEC, and SCOUNTEREN of Host */ 157 unsigned long host_sscratch; 158 unsigned long host_stvec; 159 unsigned long host_scounteren; 160 161 /* CPU context of Host */ 162 struct kvm_cpu_context host_context; 163 164 /* CPU context of Guest VCPU */ 165 struct kvm_cpu_context guest_context; 166 167 /* CPU CSR context of Guest VCPU */ 168 struct kvm_vcpu_csr guest_csr; 169 170 /* CPU context upon Guest VCPU reset */ 171 struct kvm_cpu_context guest_reset_context; 172 173 /* CPU CSR context upon Guest VCPU reset */ 174 struct kvm_vcpu_csr guest_reset_csr; 175 176 /* 177 * VCPU interrupts 178 * 179 * We have a lockless approach for tracking pending VCPU interrupts 180 * implemented using atomic bitops. The irqs_pending bitmap represent 181 * pending interrupts whereas irqs_pending_mask represent bits changed 182 * in irqs_pending. Our approach is modeled around multiple producer 183 * and single consumer problem where the consumer is the VCPU itself. 184 */ 185 unsigned long irqs_pending; 186 unsigned long irqs_pending_mask; 187 188 /* VCPU Timer */ 189 struct kvm_vcpu_timer timer; 190 191 /* MMIO instruction details */ 192 struct kvm_mmio_decode mmio_decode; 193 194 /* SBI context */ 195 struct kvm_sbi_context sbi_context; 196 197 /* Cache pages needed to program page tables with spinlock held */ 198 struct kvm_mmu_page_cache mmu_page_cache; 199 200 /* VCPU power-off state */ 201 bool power_off; 202 203 /* Don't run the VCPU (blocked) */ 204 bool pause; 205 206 /* SRCU lock index for in-kernel run loop */ 207 int srcu_idx; 208 }; 209 210 static inline void kvm_arch_hardware_unsetup(void) {} 211 static inline void kvm_arch_sync_events(struct kvm *kvm) {} 212 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 213 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 214 215 #define KVM_ARCH_WANT_MMU_NOTIFIER 216 217 void __kvm_riscv_hfence_gvma_vmid_gpa(unsigned long gpa_divby_4, 218 unsigned long vmid); 219 void __kvm_riscv_hfence_gvma_vmid(unsigned long vmid); 220 void __kvm_riscv_hfence_gvma_gpa(unsigned long gpa_divby_4); 221 void __kvm_riscv_hfence_gvma_all(void); 222 223 int kvm_riscv_stage2_map(struct kvm_vcpu *vcpu, 224 struct kvm_memory_slot *memslot, 225 gpa_t gpa, unsigned long hva, bool is_write); 226 void kvm_riscv_stage2_flush_cache(struct kvm_vcpu *vcpu); 227 int kvm_riscv_stage2_alloc_pgd(struct kvm *kvm); 228 void kvm_riscv_stage2_free_pgd(struct kvm *kvm); 229 void kvm_riscv_stage2_update_hgatp(struct kvm_vcpu *vcpu); 230 void kvm_riscv_stage2_mode_detect(void); 231 unsigned long kvm_riscv_stage2_mode(void); 232 233 void kvm_riscv_stage2_vmid_detect(void); 234 unsigned long kvm_riscv_stage2_vmid_bits(void); 235 int kvm_riscv_stage2_vmid_init(struct kvm *kvm); 236 bool kvm_riscv_stage2_vmid_ver_changed(struct kvm_vmid *vmid); 237 void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu); 238 239 void __kvm_riscv_unpriv_trap(void); 240 241 unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu, 242 bool read_insn, 243 unsigned long guest_addr, 244 struct kvm_cpu_trap *trap); 245 void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu, 246 struct kvm_cpu_trap *trap); 247 int kvm_riscv_vcpu_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run); 248 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 249 struct kvm_cpu_trap *trap); 250 251 void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch); 252 253 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 254 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 255 void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu); 256 void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu); 257 bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, unsigned long mask); 258 void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 259 void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 260 261 int kvm_riscv_vcpu_sbi_return(struct kvm_vcpu *vcpu, struct kvm_run *run); 262 int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run); 263 264 #endif /* __RISCV_KVM_HOST_H__ */ 265