1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2017 Andes Technology Corporation */ 3 4 #ifndef _ASM_RISCV_FTRACE_H 5 #define _ASM_RISCV_FTRACE_H 6 7 /* 8 * The graph frame test is not possible if CONFIG_FRAME_POINTER is not enabled. 9 * Check arch/riscv/kernel/mcount.S for detail. 10 */ 11 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) && defined(CONFIG_FRAME_POINTER) 12 #define HAVE_FUNCTION_GRAPH_FP_TEST 13 #endif 14 #define HAVE_FUNCTION_GRAPH_RET_ADDR_PTR 15 16 #define ARCH_SUPPORTS_FTRACE_OPS 1 17 #ifndef __ASSEMBLY__ 18 void _mcount(void); 19 static inline unsigned long ftrace_call_adjust(unsigned long addr) 20 { 21 return addr; 22 } 23 24 struct dyn_arch_ftrace { 25 }; 26 #endif 27 28 #ifdef CONFIG_DYNAMIC_FTRACE 29 /* 30 * A general call in RISC-V is a pair of insts: 31 * 1) auipc: setting high-20 pc-related bits to ra register 32 * 2) jalr: setting low-12 offset to ra, jump to ra, and set ra to 33 * return address (original pc + 4) 34 * 35 * Dynamic ftrace generates probes to call sites, so we must deal with 36 * both auipc and jalr at the same time. 37 */ 38 39 #define MCOUNT_ADDR ((unsigned long)_mcount) 40 #define JALR_SIGN_MASK (0x00000800) 41 #define JALR_OFFSET_MASK (0x00000fff) 42 #define AUIPC_OFFSET_MASK (0xfffff000) 43 #define AUIPC_PAD (0x00001000) 44 #define JALR_SHIFT 20 45 #define JALR_BASIC (0x000080e7) 46 #define AUIPC_BASIC (0x00000097) 47 #define NOP4 (0x00000013) 48 49 #define make_call(caller, callee, call) \ 50 do { \ 51 call[0] = to_auipc_insn((unsigned int)((unsigned long)callee - \ 52 (unsigned long)caller)); \ 53 call[1] = to_jalr_insn((unsigned int)((unsigned long)callee - \ 54 (unsigned long)caller)); \ 55 } while (0) 56 57 #define to_jalr_insn(offset) \ 58 (((offset & JALR_OFFSET_MASK) << JALR_SHIFT) | JALR_BASIC) 59 60 #define to_auipc_insn(offset) \ 61 ((offset & JALR_SIGN_MASK) ? \ 62 (((offset & AUIPC_OFFSET_MASK) + AUIPC_PAD) | AUIPC_BASIC) : \ 63 ((offset & AUIPC_OFFSET_MASK) | AUIPC_BASIC)) 64 65 /* 66 * Let auipc+jalr be the basic *mcount unit*, so we make it 8 bytes here. 67 */ 68 #define MCOUNT_INSN_SIZE 8 69 #endif 70 71 #endif /* _ASM_RISCV_FTRACE_H */ 72