1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_CSR_H 7 #define _ASM_RISCV_CSR_H 8 9 #include <asm/asm.h> 10 #include <linux/const.h> 11 12 /* Status register flags */ 13 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */ 14 #define SR_MIE _AC(0x00000008, UL) /* Machine Interrupt Enable */ 15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */ 16 #define SR_MPIE _AC(0x00000080, UL) /* Previous Machine IE */ 17 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */ 18 #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */ 19 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */ 20 21 #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */ 22 #define SR_FS_OFF _AC(0x00000000, UL) 23 #define SR_FS_INITIAL _AC(0x00002000, UL) 24 #define SR_FS_CLEAN _AC(0x00004000, UL) 25 #define SR_FS_DIRTY _AC(0x00006000, UL) 26 27 #define SR_XS _AC(0x00018000, UL) /* Extension Status */ 28 #define SR_XS_OFF _AC(0x00000000, UL) 29 #define SR_XS_INITIAL _AC(0x00008000, UL) 30 #define SR_XS_CLEAN _AC(0x00010000, UL) 31 #define SR_XS_DIRTY _AC(0x00018000, UL) 32 33 #ifndef CONFIG_64BIT 34 #define SR_SD _AC(0x80000000, UL) /* FS/XS dirty */ 35 #else 36 #define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */ 37 #endif 38 39 /* SATP flags */ 40 #ifndef CONFIG_64BIT 41 #define SATP_PPN _AC(0x003FFFFF, UL) 42 #define SATP_MODE_32 _AC(0x80000000, UL) 43 #define SATP_ASID_BITS 9 44 #define SATP_ASID_SHIFT 22 45 #define SATP_ASID_MASK _AC(0x1FF, UL) 46 #else 47 #define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL) 48 #define SATP_MODE_39 _AC(0x8000000000000000, UL) 49 #define SATP_MODE_48 _AC(0x9000000000000000, UL) 50 #define SATP_ASID_BITS 16 51 #define SATP_ASID_SHIFT 44 52 #define SATP_ASID_MASK _AC(0xFFFF, UL) 53 #endif 54 55 /* Exception cause high bit - is an interrupt if set */ 56 #define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1)) 57 58 /* Interrupt causes (minus the high bit) */ 59 #define IRQ_S_SOFT 1 60 #define IRQ_VS_SOFT 2 61 #define IRQ_M_SOFT 3 62 #define IRQ_S_TIMER 5 63 #define IRQ_VS_TIMER 6 64 #define IRQ_M_TIMER 7 65 #define IRQ_S_EXT 9 66 #define IRQ_VS_EXT 10 67 #define IRQ_M_EXT 11 68 69 /* Exception causes */ 70 #define EXC_INST_MISALIGNED 0 71 #define EXC_INST_ACCESS 1 72 #define EXC_INST_ILLEGAL 2 73 #define EXC_BREAKPOINT 3 74 #define EXC_LOAD_ACCESS 5 75 #define EXC_STORE_ACCESS 7 76 #define EXC_SYSCALL 8 77 #define EXC_HYPERVISOR_SYSCALL 9 78 #define EXC_SUPERVISOR_SYSCALL 10 79 #define EXC_INST_PAGE_FAULT 12 80 #define EXC_LOAD_PAGE_FAULT 13 81 #define EXC_STORE_PAGE_FAULT 15 82 #define EXC_INST_GUEST_PAGE_FAULT 20 83 #define EXC_LOAD_GUEST_PAGE_FAULT 21 84 #define EXC_VIRTUAL_INST_FAULT 22 85 #define EXC_STORE_GUEST_PAGE_FAULT 23 86 87 /* PMP configuration */ 88 #define PMP_R 0x01 89 #define PMP_W 0x02 90 #define PMP_X 0x04 91 #define PMP_A 0x18 92 #define PMP_A_TOR 0x08 93 #define PMP_A_NA4 0x10 94 #define PMP_A_NAPOT 0x18 95 #define PMP_L 0x80 96 97 /* HSTATUS flags */ 98 #ifdef CONFIG_64BIT 99 #define HSTATUS_VSXL _AC(0x300000000, UL) 100 #define HSTATUS_VSXL_SHIFT 32 101 #endif 102 #define HSTATUS_VTSR _AC(0x00400000, UL) 103 #define HSTATUS_VTW _AC(0x00200000, UL) 104 #define HSTATUS_VTVM _AC(0x00100000, UL) 105 #define HSTATUS_VGEIN _AC(0x0003f000, UL) 106 #define HSTATUS_VGEIN_SHIFT 12 107 #define HSTATUS_HU _AC(0x00000200, UL) 108 #define HSTATUS_SPVP _AC(0x00000100, UL) 109 #define HSTATUS_SPV _AC(0x00000080, UL) 110 #define HSTATUS_GVA _AC(0x00000040, UL) 111 #define HSTATUS_VSBE _AC(0x00000020, UL) 112 113 /* HGATP flags */ 114 #define HGATP_MODE_OFF _AC(0, UL) 115 #define HGATP_MODE_SV32X4 _AC(1, UL) 116 #define HGATP_MODE_SV39X4 _AC(8, UL) 117 #define HGATP_MODE_SV48X4 _AC(9, UL) 118 119 #define HGATP32_MODE_SHIFT 31 120 #define HGATP32_VMID_SHIFT 22 121 #define HGATP32_VMID_MASK _AC(0x1FC00000, UL) 122 #define HGATP32_PPN _AC(0x003FFFFF, UL) 123 124 #define HGATP64_MODE_SHIFT 60 125 #define HGATP64_VMID_SHIFT 44 126 #define HGATP64_VMID_MASK _AC(0x03FFF00000000000, UL) 127 #define HGATP64_PPN _AC(0x00000FFFFFFFFFFF, UL) 128 129 #define HGATP_PAGE_SHIFT 12 130 131 #ifdef CONFIG_64BIT 132 #define HGATP_PPN HGATP64_PPN 133 #define HGATP_VMID_SHIFT HGATP64_VMID_SHIFT 134 #define HGATP_VMID_MASK HGATP64_VMID_MASK 135 #define HGATP_MODE_SHIFT HGATP64_MODE_SHIFT 136 #else 137 #define HGATP_PPN HGATP32_PPN 138 #define HGATP_VMID_SHIFT HGATP32_VMID_SHIFT 139 #define HGATP_VMID_MASK HGATP32_VMID_MASK 140 #define HGATP_MODE_SHIFT HGATP32_MODE_SHIFT 141 #endif 142 143 /* VSIP & HVIP relation */ 144 #define VSIP_TO_HVIP_SHIFT (IRQ_VS_SOFT - IRQ_S_SOFT) 145 #define VSIP_VALID_MASK ((_AC(1, UL) << IRQ_S_SOFT) | \ 146 (_AC(1, UL) << IRQ_S_TIMER) | \ 147 (_AC(1, UL) << IRQ_S_EXT)) 148 149 /* symbolic CSR names: */ 150 #define CSR_CYCLE 0xc00 151 #define CSR_TIME 0xc01 152 #define CSR_INSTRET 0xc02 153 #define CSR_CYCLEH 0xc80 154 #define CSR_TIMEH 0xc81 155 #define CSR_INSTRETH 0xc82 156 157 #define CSR_SSTATUS 0x100 158 #define CSR_SIE 0x104 159 #define CSR_STVEC 0x105 160 #define CSR_SCOUNTEREN 0x106 161 #define CSR_SSCRATCH 0x140 162 #define CSR_SEPC 0x141 163 #define CSR_SCAUSE 0x142 164 #define CSR_STVAL 0x143 165 #define CSR_SIP 0x144 166 #define CSR_SATP 0x180 167 168 #define CSR_VSSTATUS 0x200 169 #define CSR_VSIE 0x204 170 #define CSR_VSTVEC 0x205 171 #define CSR_VSSCRATCH 0x240 172 #define CSR_VSEPC 0x241 173 #define CSR_VSCAUSE 0x242 174 #define CSR_VSTVAL 0x243 175 #define CSR_VSIP 0x244 176 #define CSR_VSATP 0x280 177 178 #define CSR_HSTATUS 0x600 179 #define CSR_HEDELEG 0x602 180 #define CSR_HIDELEG 0x603 181 #define CSR_HIE 0x604 182 #define CSR_HTIMEDELTA 0x605 183 #define CSR_HCOUNTEREN 0x606 184 #define CSR_HGEIE 0x607 185 #define CSR_HTIMEDELTAH 0x615 186 #define CSR_HTVAL 0x643 187 #define CSR_HIP 0x644 188 #define CSR_HVIP 0x645 189 #define CSR_HTINST 0x64a 190 #define CSR_HGATP 0x680 191 #define CSR_HGEIP 0xe12 192 193 #define CSR_MSTATUS 0x300 194 #define CSR_MISA 0x301 195 #define CSR_MIE 0x304 196 #define CSR_MTVEC 0x305 197 #define CSR_MSCRATCH 0x340 198 #define CSR_MEPC 0x341 199 #define CSR_MCAUSE 0x342 200 #define CSR_MTVAL 0x343 201 #define CSR_MIP 0x344 202 #define CSR_PMPCFG0 0x3a0 203 #define CSR_PMPADDR0 0x3b0 204 #define CSR_MVENDORID 0xf11 205 #define CSR_MARCHID 0xf12 206 #define CSR_MIMPID 0xf13 207 #define CSR_MHARTID 0xf14 208 209 #ifdef CONFIG_RISCV_M_MODE 210 # define CSR_STATUS CSR_MSTATUS 211 # define CSR_IE CSR_MIE 212 # define CSR_TVEC CSR_MTVEC 213 # define CSR_SCRATCH CSR_MSCRATCH 214 # define CSR_EPC CSR_MEPC 215 # define CSR_CAUSE CSR_MCAUSE 216 # define CSR_TVAL CSR_MTVAL 217 # define CSR_IP CSR_MIP 218 219 # define SR_IE SR_MIE 220 # define SR_PIE SR_MPIE 221 # define SR_PP SR_MPP 222 223 # define RV_IRQ_SOFT IRQ_M_SOFT 224 # define RV_IRQ_TIMER IRQ_M_TIMER 225 # define RV_IRQ_EXT IRQ_M_EXT 226 #else /* CONFIG_RISCV_M_MODE */ 227 # define CSR_STATUS CSR_SSTATUS 228 # define CSR_IE CSR_SIE 229 # define CSR_TVEC CSR_STVEC 230 # define CSR_SCRATCH CSR_SSCRATCH 231 # define CSR_EPC CSR_SEPC 232 # define CSR_CAUSE CSR_SCAUSE 233 # define CSR_TVAL CSR_STVAL 234 # define CSR_IP CSR_SIP 235 236 # define SR_IE SR_SIE 237 # define SR_PIE SR_SPIE 238 # define SR_PP SR_SPP 239 240 # define RV_IRQ_SOFT IRQ_S_SOFT 241 # define RV_IRQ_TIMER IRQ_S_TIMER 242 # define RV_IRQ_EXT IRQ_S_EXT 243 #endif /* CONFIG_RISCV_M_MODE */ 244 245 /* IE/IP (Supervisor/Machine Interrupt Enable/Pending) flags */ 246 #define IE_SIE (_AC(0x1, UL) << RV_IRQ_SOFT) 247 #define IE_TIE (_AC(0x1, UL) << RV_IRQ_TIMER) 248 #define IE_EIE (_AC(0x1, UL) << RV_IRQ_EXT) 249 250 #ifndef __ASSEMBLY__ 251 252 #define csr_swap(csr, val) \ 253 ({ \ 254 unsigned long __v = (unsigned long)(val); \ 255 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\ 256 : "=r" (__v) : "rK" (__v) \ 257 : "memory"); \ 258 __v; \ 259 }) 260 261 #define csr_read(csr) \ 262 ({ \ 263 register unsigned long __v; \ 264 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ 265 : "=r" (__v) : \ 266 : "memory"); \ 267 __v; \ 268 }) 269 270 #define csr_write(csr, val) \ 271 ({ \ 272 unsigned long __v = (unsigned long)(val); \ 273 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ 274 : : "rK" (__v) \ 275 : "memory"); \ 276 }) 277 278 #define csr_read_set(csr, val) \ 279 ({ \ 280 unsigned long __v = (unsigned long)(val); \ 281 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\ 282 : "=r" (__v) : "rK" (__v) \ 283 : "memory"); \ 284 __v; \ 285 }) 286 287 #define csr_set(csr, val) \ 288 ({ \ 289 unsigned long __v = (unsigned long)(val); \ 290 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \ 291 : : "rK" (__v) \ 292 : "memory"); \ 293 }) 294 295 #define csr_read_clear(csr, val) \ 296 ({ \ 297 unsigned long __v = (unsigned long)(val); \ 298 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\ 299 : "=r" (__v) : "rK" (__v) \ 300 : "memory"); \ 301 __v; \ 302 }) 303 304 #define csr_clear(csr, val) \ 305 ({ \ 306 unsigned long __v = (unsigned long)(val); \ 307 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \ 308 : : "rK" (__v) \ 309 : "memory"); \ 310 }) 311 312 #endif /* __ASSEMBLY__ */ 313 314 #endif /* _ASM_RISCV_CSR_H */ 315