xref: /openbmc/linux/arch/riscv/include/asm/csr.h (revision 63705da3)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2015 Regents of the University of California
4  */
5 
6 #ifndef _ASM_RISCV_CSR_H
7 #define _ASM_RISCV_CSR_H
8 
9 #include <asm/asm.h>
10 #include <linux/const.h>
11 
12 /* Status register flags */
13 #define SR_SIE		_AC(0x00000002, UL) /* Supervisor Interrupt Enable */
14 #define SR_MIE		_AC(0x00000008, UL) /* Machine Interrupt Enable */
15 #define SR_SPIE		_AC(0x00000020, UL) /* Previous Supervisor IE */
16 #define SR_MPIE		_AC(0x00000080, UL) /* Previous Machine IE */
17 #define SR_SPP		_AC(0x00000100, UL) /* Previously Supervisor */
18 #define SR_MPP		_AC(0x00001800, UL) /* Previously Machine */
19 #define SR_SUM		_AC(0x00040000, UL) /* Supervisor User Memory Access */
20 
21 #define SR_FS		_AC(0x00006000, UL) /* Floating-point Status */
22 #define SR_FS_OFF	_AC(0x00000000, UL)
23 #define SR_FS_INITIAL	_AC(0x00002000, UL)
24 #define SR_FS_CLEAN	_AC(0x00004000, UL)
25 #define SR_FS_DIRTY	_AC(0x00006000, UL)
26 
27 #define SR_XS		_AC(0x00018000, UL) /* Extension Status */
28 #define SR_XS_OFF	_AC(0x00000000, UL)
29 #define SR_XS_INITIAL	_AC(0x00008000, UL)
30 #define SR_XS_CLEAN	_AC(0x00010000, UL)
31 #define SR_XS_DIRTY	_AC(0x00018000, UL)
32 
33 #ifndef CONFIG_64BIT
34 #define SR_SD		_AC(0x80000000, UL) /* FS/XS dirty */
35 #else
36 #define SR_SD		_AC(0x8000000000000000, UL) /* FS/XS dirty */
37 #endif
38 
39 /* SATP flags */
40 #ifndef CONFIG_64BIT
41 #define SATP_PPN	_AC(0x003FFFFF, UL)
42 #define SATP_MODE_32	_AC(0x80000000, UL)
43 #define SATP_MODE	SATP_MODE_32
44 #define SATP_ASID_BITS	9
45 #define SATP_ASID_SHIFT	22
46 #define SATP_ASID_MASK	_AC(0x1FF, UL)
47 #else
48 #define SATP_PPN	_AC(0x00000FFFFFFFFFFF, UL)
49 #define SATP_MODE_39	_AC(0x8000000000000000, UL)
50 #define SATP_MODE	SATP_MODE_39
51 #define SATP_ASID_BITS	16
52 #define SATP_ASID_SHIFT	44
53 #define SATP_ASID_MASK	_AC(0xFFFF, UL)
54 #endif
55 
56 /* Exception cause high bit - is an interrupt if set */
57 #define CAUSE_IRQ_FLAG		(_AC(1, UL) << (__riscv_xlen - 1))
58 
59 /* Interrupt causes (minus the high bit) */
60 #define IRQ_S_SOFT		1
61 #define IRQ_VS_SOFT		2
62 #define IRQ_M_SOFT		3
63 #define IRQ_S_TIMER		5
64 #define IRQ_VS_TIMER		6
65 #define IRQ_M_TIMER		7
66 #define IRQ_S_EXT		9
67 #define IRQ_VS_EXT		10
68 #define IRQ_M_EXT		11
69 
70 /* Exception causes */
71 #define EXC_INST_MISALIGNED	0
72 #define EXC_INST_ACCESS		1
73 #define EXC_INST_ILLEGAL	2
74 #define EXC_BREAKPOINT		3
75 #define EXC_LOAD_ACCESS		5
76 #define EXC_STORE_ACCESS	7
77 #define EXC_SYSCALL		8
78 #define EXC_HYPERVISOR_SYSCALL	9
79 #define EXC_SUPERVISOR_SYSCALL	10
80 #define EXC_INST_PAGE_FAULT	12
81 #define EXC_LOAD_PAGE_FAULT	13
82 #define EXC_STORE_PAGE_FAULT	15
83 #define EXC_INST_GUEST_PAGE_FAULT	20
84 #define EXC_LOAD_GUEST_PAGE_FAULT	21
85 #define EXC_VIRTUAL_INST_FAULT		22
86 #define EXC_STORE_GUEST_PAGE_FAULT	23
87 
88 /* PMP configuration */
89 #define PMP_R			0x01
90 #define PMP_W			0x02
91 #define PMP_X			0x04
92 #define PMP_A			0x18
93 #define PMP_A_TOR		0x08
94 #define PMP_A_NA4		0x10
95 #define PMP_A_NAPOT		0x18
96 #define PMP_L			0x80
97 
98 /* HSTATUS flags */
99 #ifdef CONFIG_64BIT
100 #define HSTATUS_VSXL		_AC(0x300000000, UL)
101 #define HSTATUS_VSXL_SHIFT	32
102 #endif
103 #define HSTATUS_VTSR		_AC(0x00400000, UL)
104 #define HSTATUS_VTW		_AC(0x00200000, UL)
105 #define HSTATUS_VTVM		_AC(0x00100000, UL)
106 #define HSTATUS_VGEIN		_AC(0x0003f000, UL)
107 #define HSTATUS_VGEIN_SHIFT	12
108 #define HSTATUS_HU		_AC(0x00000200, UL)
109 #define HSTATUS_SPVP		_AC(0x00000100, UL)
110 #define HSTATUS_SPV		_AC(0x00000080, UL)
111 #define HSTATUS_GVA		_AC(0x00000040, UL)
112 #define HSTATUS_VSBE		_AC(0x00000020, UL)
113 
114 /* HGATP flags */
115 #define HGATP_MODE_OFF		_AC(0, UL)
116 #define HGATP_MODE_SV32X4	_AC(1, UL)
117 #define HGATP_MODE_SV39X4	_AC(8, UL)
118 #define HGATP_MODE_SV48X4	_AC(9, UL)
119 
120 #define HGATP32_MODE_SHIFT	31
121 #define HGATP32_VMID_SHIFT	22
122 #define HGATP32_VMID_MASK	_AC(0x1FC00000, UL)
123 #define HGATP32_PPN		_AC(0x003FFFFF, UL)
124 
125 #define HGATP64_MODE_SHIFT	60
126 #define HGATP64_VMID_SHIFT	44
127 #define HGATP64_VMID_MASK	_AC(0x03FFF00000000000, UL)
128 #define HGATP64_PPN		_AC(0x00000FFFFFFFFFFF, UL)
129 
130 #define HGATP_PAGE_SHIFT	12
131 
132 #ifdef CONFIG_64BIT
133 #define HGATP_PPN		HGATP64_PPN
134 #define HGATP_VMID_SHIFT	HGATP64_VMID_SHIFT
135 #define HGATP_VMID_MASK		HGATP64_VMID_MASK
136 #define HGATP_MODE_SHIFT	HGATP64_MODE_SHIFT
137 #else
138 #define HGATP_PPN		HGATP32_PPN
139 #define HGATP_VMID_SHIFT	HGATP32_VMID_SHIFT
140 #define HGATP_VMID_MASK		HGATP32_VMID_MASK
141 #define HGATP_MODE_SHIFT	HGATP32_MODE_SHIFT
142 #endif
143 
144 /* VSIP & HVIP relation */
145 #define VSIP_TO_HVIP_SHIFT	(IRQ_VS_SOFT - IRQ_S_SOFT)
146 #define VSIP_VALID_MASK		((_AC(1, UL) << IRQ_S_SOFT) | \
147 				 (_AC(1, UL) << IRQ_S_TIMER) | \
148 				 (_AC(1, UL) << IRQ_S_EXT))
149 
150 /* symbolic CSR names: */
151 #define CSR_CYCLE		0xc00
152 #define CSR_TIME		0xc01
153 #define CSR_INSTRET		0xc02
154 #define CSR_CYCLEH		0xc80
155 #define CSR_TIMEH		0xc81
156 #define CSR_INSTRETH		0xc82
157 
158 #define CSR_SSTATUS		0x100
159 #define CSR_SIE			0x104
160 #define CSR_STVEC		0x105
161 #define CSR_SCOUNTEREN		0x106
162 #define CSR_SSCRATCH		0x140
163 #define CSR_SEPC		0x141
164 #define CSR_SCAUSE		0x142
165 #define CSR_STVAL		0x143
166 #define CSR_SIP			0x144
167 #define CSR_SATP		0x180
168 
169 #define CSR_VSSTATUS		0x200
170 #define CSR_VSIE		0x204
171 #define CSR_VSTVEC		0x205
172 #define CSR_VSSCRATCH		0x240
173 #define CSR_VSEPC		0x241
174 #define CSR_VSCAUSE		0x242
175 #define CSR_VSTVAL		0x243
176 #define CSR_VSIP		0x244
177 #define CSR_VSATP		0x280
178 
179 #define CSR_HSTATUS		0x600
180 #define CSR_HEDELEG		0x602
181 #define CSR_HIDELEG		0x603
182 #define CSR_HIE			0x604
183 #define CSR_HTIMEDELTA		0x605
184 #define CSR_HCOUNTEREN		0x606
185 #define CSR_HGEIE		0x607
186 #define CSR_HTIMEDELTAH		0x615
187 #define CSR_HTVAL		0x643
188 #define CSR_HIP			0x644
189 #define CSR_HVIP		0x645
190 #define CSR_HTINST		0x64a
191 #define CSR_HGATP		0x680
192 #define CSR_HGEIP		0xe12
193 
194 #define CSR_MSTATUS		0x300
195 #define CSR_MISA		0x301
196 #define CSR_MIE			0x304
197 #define CSR_MTVEC		0x305
198 #define CSR_MSCRATCH		0x340
199 #define CSR_MEPC		0x341
200 #define CSR_MCAUSE		0x342
201 #define CSR_MTVAL		0x343
202 #define CSR_MIP			0x344
203 #define CSR_PMPCFG0		0x3a0
204 #define CSR_PMPADDR0		0x3b0
205 #define CSR_MVENDORID		0xf11
206 #define CSR_MARCHID		0xf12
207 #define CSR_MIMPID		0xf13
208 #define CSR_MHARTID		0xf14
209 
210 #ifdef CONFIG_RISCV_M_MODE
211 # define CSR_STATUS	CSR_MSTATUS
212 # define CSR_IE		CSR_MIE
213 # define CSR_TVEC	CSR_MTVEC
214 # define CSR_SCRATCH	CSR_MSCRATCH
215 # define CSR_EPC	CSR_MEPC
216 # define CSR_CAUSE	CSR_MCAUSE
217 # define CSR_TVAL	CSR_MTVAL
218 # define CSR_IP		CSR_MIP
219 
220 # define SR_IE		SR_MIE
221 # define SR_PIE		SR_MPIE
222 # define SR_PP		SR_MPP
223 
224 # define RV_IRQ_SOFT		IRQ_M_SOFT
225 # define RV_IRQ_TIMER	IRQ_M_TIMER
226 # define RV_IRQ_EXT		IRQ_M_EXT
227 #else /* CONFIG_RISCV_M_MODE */
228 # define CSR_STATUS	CSR_SSTATUS
229 # define CSR_IE		CSR_SIE
230 # define CSR_TVEC	CSR_STVEC
231 # define CSR_SCRATCH	CSR_SSCRATCH
232 # define CSR_EPC	CSR_SEPC
233 # define CSR_CAUSE	CSR_SCAUSE
234 # define CSR_TVAL	CSR_STVAL
235 # define CSR_IP		CSR_SIP
236 
237 # define SR_IE		SR_SIE
238 # define SR_PIE		SR_SPIE
239 # define SR_PP		SR_SPP
240 
241 # define RV_IRQ_SOFT		IRQ_S_SOFT
242 # define RV_IRQ_TIMER	IRQ_S_TIMER
243 # define RV_IRQ_EXT		IRQ_S_EXT
244 #endif /* CONFIG_RISCV_M_MODE */
245 
246 /* IE/IP (Supervisor/Machine Interrupt Enable/Pending) flags */
247 #define IE_SIE		(_AC(0x1, UL) << RV_IRQ_SOFT)
248 #define IE_TIE		(_AC(0x1, UL) << RV_IRQ_TIMER)
249 #define IE_EIE		(_AC(0x1, UL) << RV_IRQ_EXT)
250 
251 #ifndef __ASSEMBLY__
252 
253 #define csr_swap(csr, val)					\
254 ({								\
255 	unsigned long __v = (unsigned long)(val);		\
256 	__asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
257 			      : "=r" (__v) : "rK" (__v)		\
258 			      : "memory");			\
259 	__v;							\
260 })
261 
262 #define csr_read(csr)						\
263 ({								\
264 	register unsigned long __v;				\
265 	__asm__ __volatile__ ("csrr %0, " __ASM_STR(csr)	\
266 			      : "=r" (__v) :			\
267 			      : "memory");			\
268 	__v;							\
269 })
270 
271 #define csr_write(csr, val)					\
272 ({								\
273 	unsigned long __v = (unsigned long)(val);		\
274 	__asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0"	\
275 			      : : "rK" (__v)			\
276 			      : "memory");			\
277 })
278 
279 #define csr_read_set(csr, val)					\
280 ({								\
281 	unsigned long __v = (unsigned long)(val);		\
282 	__asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
283 			      : "=r" (__v) : "rK" (__v)		\
284 			      : "memory");			\
285 	__v;							\
286 })
287 
288 #define csr_set(csr, val)					\
289 ({								\
290 	unsigned long __v = (unsigned long)(val);		\
291 	__asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0"	\
292 			      : : "rK" (__v)			\
293 			      : "memory");			\
294 })
295 
296 #define csr_read_clear(csr, val)				\
297 ({								\
298 	unsigned long __v = (unsigned long)(val);		\
299 	__asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
300 			      : "=r" (__v) : "rK" (__v)		\
301 			      : "memory");			\
302 	__v;							\
303 })
304 
305 #define csr_clear(csr, val)					\
306 ({								\
307 	unsigned long __v = (unsigned long)(val);		\
308 	__asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0"	\
309 			      : : "rK" (__v)			\
310 			      : "memory");			\
311 })
312 
313 #endif /* __ASSEMBLY__ */
314 
315 #endif /* _ASM_RISCV_CSR_H */
316