1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2017 Chen Liqin <liqin.chen@sunplusct.com> 4 * Copyright (C) 2012 Regents of the University of California 5 */ 6 7 #ifndef _ASM_RISCV_CACHE_H 8 #define _ASM_RISCV_CACHE_H 9 10 #define L1_CACHE_SHIFT 6 11 12 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 13 14 #ifdef CONFIG_RISCV_DMA_NONCOHERENT 15 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 16 #endif 17 18 /* 19 * RISC-V requires the stack pointer to be 16-byte aligned, so ensure that 20 * the flat loader aligns it accordingly. 21 */ 22 #ifndef CONFIG_MMU 23 #define ARCH_SLAB_MINALIGN 16 24 #endif 25 26 #endif /* _ASM_RISCV_CACHE_H */ 27