1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_ASM_H 7 #define _ASM_RISCV_ASM_H 8 9 #ifdef __ASSEMBLY__ 10 #define __ASM_STR(x) x 11 #else 12 #define __ASM_STR(x) #x 13 #endif 14 15 #if __riscv_xlen == 64 16 #define __REG_SEL(a, b) __ASM_STR(a) 17 #elif __riscv_xlen == 32 18 #define __REG_SEL(a, b) __ASM_STR(b) 19 #else 20 #error "Unexpected __riscv_xlen" 21 #endif 22 23 #define REG_L __REG_SEL(ld, lw) 24 #define REG_S __REG_SEL(sd, sw) 25 #define REG_SC __REG_SEL(sc.d, sc.w) 26 #define REG_ASM __REG_SEL(.dword, .word) 27 #define SZREG __REG_SEL(8, 4) 28 #define LGREG __REG_SEL(3, 2) 29 30 #if __SIZEOF_POINTER__ == 8 31 #ifdef __ASSEMBLY__ 32 #define RISCV_PTR .dword 33 #define RISCV_SZPTR 8 34 #define RISCV_LGPTR 3 35 #else 36 #define RISCV_PTR ".dword" 37 #define RISCV_SZPTR "8" 38 #define RISCV_LGPTR "3" 39 #endif 40 #elif __SIZEOF_POINTER__ == 4 41 #ifdef __ASSEMBLY__ 42 #define RISCV_PTR .word 43 #define RISCV_SZPTR 4 44 #define RISCV_LGPTR 2 45 #else 46 #define RISCV_PTR ".word" 47 #define RISCV_SZPTR "4" 48 #define RISCV_LGPTR "2" 49 #endif 50 #else 51 #error "Unexpected __SIZEOF_POINTER__" 52 #endif 53 54 #if (__SIZEOF_INT__ == 4) 55 #define RISCV_INT __ASM_STR(.word) 56 #define RISCV_SZINT __ASM_STR(4) 57 #define RISCV_LGINT __ASM_STR(2) 58 #else 59 #error "Unexpected __SIZEOF_INT__" 60 #endif 61 62 #if (__SIZEOF_SHORT__ == 2) 63 #define RISCV_SHORT __ASM_STR(.half) 64 #define RISCV_SZSHORT __ASM_STR(2) 65 #define RISCV_LGSHORT __ASM_STR(1) 66 #else 67 #error "Unexpected __SIZEOF_SHORT__" 68 #endif 69 70 #ifdef __ASSEMBLY__ 71 72 /* Common assembly source macros */ 73 74 #ifdef CONFIG_XIP_KERNEL 75 .macro XIP_FIXUP_OFFSET reg 76 REG_L t0, _xip_fixup 77 add \reg, \reg, t0 78 .endm 79 .macro XIP_FIXUP_FLASH_OFFSET reg 80 la t1, __data_loc 81 REG_L t1, _xip_phys_offset 82 sub \reg, \reg, t1 83 add \reg, \reg, t0 84 .endm 85 _xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET 86 _xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET 87 #else 88 .macro XIP_FIXUP_OFFSET reg 89 .endm 90 .macro XIP_FIXUP_FLASH_OFFSET reg 91 .endm 92 #endif /* CONFIG_XIP_KERNEL */ 93 94 #endif /* __ASSEMBLY__ */ 95 96 #endif /* _ASM_RISCV_ASM_H */ 97