xref: /openbmc/linux/arch/riscv/include/asm/asm.h (revision 21ab7031)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2015 Regents of the University of California
4  */
5 
6 #ifndef _ASM_RISCV_ASM_H
7 #define _ASM_RISCV_ASM_H
8 
9 #ifdef __ASSEMBLY__
10 #define __ASM_STR(x)	x
11 #else
12 #define __ASM_STR(x)	#x
13 #endif
14 
15 #if __riscv_xlen == 64
16 #define __REG_SEL(a, b)	__ASM_STR(a)
17 #elif __riscv_xlen == 32
18 #define __REG_SEL(a, b)	__ASM_STR(b)
19 #else
20 #error "Unexpected __riscv_xlen"
21 #endif
22 
23 #define REG_L		__REG_SEL(ld, lw)
24 #define REG_S		__REG_SEL(sd, sw)
25 #define REG_SC		__REG_SEL(sc.d, sc.w)
26 #define REG_AMOSWAP_AQ	__REG_SEL(amoswap.d.aq, amoswap.w.aq)
27 #define REG_ASM		__REG_SEL(.dword, .word)
28 #define SZREG		__REG_SEL(8, 4)
29 #define LGREG		__REG_SEL(3, 2)
30 
31 #if __SIZEOF_POINTER__ == 8
32 #ifdef __ASSEMBLY__
33 #define RISCV_PTR		.dword
34 #define RISCV_SZPTR		8
35 #define RISCV_LGPTR		3
36 #else
37 #define RISCV_PTR		".dword"
38 #define RISCV_SZPTR		"8"
39 #define RISCV_LGPTR		"3"
40 #endif
41 #elif __SIZEOF_POINTER__ == 4
42 #ifdef __ASSEMBLY__
43 #define RISCV_PTR		.word
44 #define RISCV_SZPTR		4
45 #define RISCV_LGPTR		2
46 #else
47 #define RISCV_PTR		".word"
48 #define RISCV_SZPTR		"4"
49 #define RISCV_LGPTR		"2"
50 #endif
51 #else
52 #error "Unexpected __SIZEOF_POINTER__"
53 #endif
54 
55 #if (__SIZEOF_INT__ == 4)
56 #define RISCV_INT		__ASM_STR(.word)
57 #define RISCV_SZINT		__ASM_STR(4)
58 #define RISCV_LGINT		__ASM_STR(2)
59 #else
60 #error "Unexpected __SIZEOF_INT__"
61 #endif
62 
63 #if (__SIZEOF_SHORT__ == 2)
64 #define RISCV_SHORT		__ASM_STR(.half)
65 #define RISCV_SZSHORT		__ASM_STR(2)
66 #define RISCV_LGSHORT		__ASM_STR(1)
67 #else
68 #error "Unexpected __SIZEOF_SHORT__"
69 #endif
70 
71 #ifdef __ASSEMBLY__
72 
73 /* Common assembly source macros */
74 
75 /*
76  * NOP sequence
77  */
78 .macro	nops, num
79 	.rept	\num
80 	nop
81 	.endr
82 .endm
83 
84 #endif /* __ASSEMBLY__ */
85 
86 #endif /* _ASM_RISCV_ASM_H */
87