xref: /openbmc/linux/arch/riscv/errata/thead/errata.c (revision 96a2e242)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2021 Heiko Stuebner <heiko@sntech.de>
4  */
5 
6 #include <linux/bug.h>
7 #include <linux/kernel.h>
8 #include <linux/memory.h>
9 #include <linux/module.h>
10 #include <linux/string.h>
11 #include <linux/uaccess.h>
12 #include <asm/alternative.h>
13 #include <asm/cacheflush.h>
14 #include <asm/errata_list.h>
15 #include <asm/patch.h>
16 #include <asm/vendorid_list.h>
17 
18 static bool errata_probe_pbmt(unsigned int stage,
19 			      unsigned long arch_id, unsigned long impid)
20 {
21 	if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT))
22 		return false;
23 
24 	if (arch_id != 0 || impid != 0)
25 		return false;
26 
27 	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT ||
28 	    stage == RISCV_ALTERNATIVES_MODULE)
29 		return true;
30 
31 	return false;
32 }
33 
34 static bool errata_probe_cmo(unsigned int stage,
35 			     unsigned long arch_id, unsigned long impid)
36 {
37 	if (!IS_ENABLED(CONFIG_ERRATA_THEAD_CMO))
38 		return false;
39 
40 	if (arch_id != 0 || impid != 0)
41 		return false;
42 
43 	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
44 		return false;
45 
46 	riscv_cbom_block_size = L1_CACHE_BYTES;
47 	riscv_noncoherent_supported();
48 	return true;
49 }
50 
51 static bool errata_probe_pmu(unsigned int stage,
52 			     unsigned long arch_id, unsigned long impid)
53 {
54 	if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PMU))
55 		return false;
56 
57 	/* target-c9xx cores report arch_id and impid as 0 */
58 	if (arch_id != 0 || impid != 0)
59 		return false;
60 
61 	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
62 		return false;
63 
64 	return true;
65 }
66 
67 static u32 thead_errata_probe(unsigned int stage,
68 			      unsigned long archid, unsigned long impid)
69 {
70 	u32 cpu_req_errata = 0;
71 
72 	if (errata_probe_pbmt(stage, archid, impid))
73 		cpu_req_errata |= BIT(ERRATA_THEAD_PBMT);
74 
75 	if (errata_probe_cmo(stage, archid, impid))
76 		cpu_req_errata |= BIT(ERRATA_THEAD_CMO);
77 
78 	if (errata_probe_pmu(stage, archid, impid))
79 		cpu_req_errata |= BIT(ERRATA_THEAD_PMU);
80 
81 	return cpu_req_errata;
82 }
83 
84 void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
85 					      unsigned long archid, unsigned long impid,
86 					      unsigned int stage)
87 {
88 	struct alt_entry *alt;
89 	u32 cpu_req_errata = thead_errata_probe(stage, archid, impid);
90 	u32 tmp;
91 	void *oldptr, *altptr;
92 
93 	for (alt = begin; alt < end; alt++) {
94 		if (alt->vendor_id != THEAD_VENDOR_ID)
95 			continue;
96 		if (alt->errata_id >= ERRATA_THEAD_NUMBER)
97 			continue;
98 
99 		tmp = (1U << alt->errata_id);
100 		if (cpu_req_errata & tmp) {
101 			oldptr = ALT_OLD_PTR(alt);
102 			altptr = ALT_ALT_PTR(alt);
103 
104 			/* On vm-alternatives, the mmu isn't running yet */
105 			if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) {
106 				memcpy(oldptr, altptr, alt->alt_len);
107 			} else {
108 				mutex_lock(&text_mutex);
109 				patch_text_nosync(oldptr, altptr, alt->alt_len);
110 				mutex_unlock(&text_mutex);
111 			}
112 		}
113 	}
114 
115 	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
116 		local_flush_icache_all();
117 }
118