1*800149a7SVincent Chen/* SPDX-License-Identifier: GPL-2.0-only */ 2*800149a7SVincent Chen/* 3*800149a7SVincent Chen * Copyright (C) 2021 SiFive 4*800149a7SVincent Chen */ 5*800149a7SVincent Chen 6*800149a7SVincent Chen#include <linux/linkage.h> 7*800149a7SVincent Chen#include <asm/asm.h> 8*800149a7SVincent Chen#include <asm/asm-offsets.h> 9*800149a7SVincent Chen#include <asm/alternative.h> 10*800149a7SVincent Chen 11*800149a7SVincent Chen.macro ADD_SIGN_EXT pt_reg badaddr tmp_reg 12*800149a7SVincent Chen REG_L \badaddr, PT_BADADDR(\pt_reg) 13*800149a7SVincent Chen li \tmp_reg,1 14*800149a7SVincent Chen slli \tmp_reg,\tmp_reg,0x26 15*800149a7SVincent Chen and \tmp_reg,\tmp_reg,\badaddr 16*800149a7SVincent Chen beqz \tmp_reg, 1f 17*800149a7SVincent Chen li \tmp_reg,-1 18*800149a7SVincent Chen slli \tmp_reg,\tmp_reg,0x27 19*800149a7SVincent Chen or \badaddr,\tmp_reg,\badaddr 20*800149a7SVincent Chen REG_S \badaddr, PT_BADADDR(\pt_reg) 21*800149a7SVincent Chen1: 22*800149a7SVincent Chen.endm 23*800149a7SVincent Chen 24*800149a7SVincent ChenENTRY(sifive_cip_453_page_fault_trp) 25*800149a7SVincent Chen ADD_SIGN_EXT a0, t0, t1 26*800149a7SVincent Chen#ifdef CONFIG_MMU 27*800149a7SVincent Chen la t0, do_page_fault 28*800149a7SVincent Chen#else 29*800149a7SVincent Chen la t0, do_trap_unknown 30*800149a7SVincent Chen#endif 31*800149a7SVincent Chen jr t0 32*800149a7SVincent ChenEND(sifive_cip_453_page_fault_trp) 33*800149a7SVincent Chen 34*800149a7SVincent ChenENTRY(sifive_cip_453_insn_fault_trp) 35*800149a7SVincent Chen ADD_SIGN_EXT a0, t0, t1 36*800149a7SVincent Chen la t0, do_trap_insn_fault 37*800149a7SVincent Chen jr t0 38*800149a7SVincent ChenEND(sifive_cip_453_insn_fault_trp) 39