1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/*
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
5 */
6
7/dts-v1/;
8#include "jh7110.dtsi"
9#include "jh7110-pinfunc.h"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	aliases {
14		ethernet0 = &gmac0;
15		ethernet1 = &gmac1;
16		i2c0 = &i2c0;
17		i2c2 = &i2c2;
18		i2c5 = &i2c5;
19		i2c6 = &i2c6;
20		serial0 = &uart0;
21	};
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26
27	cpus {
28		timebase-frequency = <4000000>;
29	};
30
31	memory@40000000 {
32		device_type = "memory";
33		reg = <0x0 0x40000000 0x1 0x0>;
34	};
35
36	gpio-restart {
37		compatible = "gpio-restart";
38		gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
39		priority = <224>;
40	};
41};
42
43&dvp_clk {
44	clock-frequency = <74250000>;
45};
46
47&gmac0_rgmii_rxin {
48	clock-frequency = <125000000>;
49};
50
51&gmac0_rmii_refin {
52	clock-frequency = <50000000>;
53};
54
55&gmac1_rgmii_rxin {
56	clock-frequency = <125000000>;
57};
58
59&gmac1_rmii_refin {
60	clock-frequency = <50000000>;
61};
62
63&hdmitx0_pixelclk {
64	clock-frequency = <297000000>;
65};
66
67&i2srx_bclk_ext {
68	clock-frequency = <12288000>;
69};
70
71&i2srx_lrck_ext {
72	clock-frequency = <192000>;
73};
74
75&i2stx_bclk_ext {
76	clock-frequency = <12288000>;
77};
78
79&i2stx_lrck_ext {
80	clock-frequency = <192000>;
81};
82
83&mclk_ext {
84	clock-frequency = <12288000>;
85};
86
87&osc {
88	clock-frequency = <24000000>;
89};
90
91&rtc_osc {
92	clock-frequency = <32768>;
93};
94
95&tdm_ext {
96	clock-frequency = <49152000>;
97};
98
99&gmac0 {
100	phy-handle = <&phy0>;
101	phy-mode = "rgmii-id";
102	status = "okay";
103
104	mdio {
105		#address-cells = <1>;
106		#size-cells = <0>;
107		compatible = "snps,dwmac-mdio";
108
109		phy0: ethernet-phy@0 {
110			reg = <0>;
111		};
112	};
113};
114
115&gmac1 {
116	phy-handle = <&phy1>;
117	phy-mode = "rgmii-id";
118	status = "okay";
119
120	mdio {
121		#address-cells = <1>;
122		#size-cells = <0>;
123		compatible = "snps,dwmac-mdio";
124
125		phy1: ethernet-phy@1 {
126			reg = <0>;
127		};
128	};
129};
130
131&i2c0 {
132	clock-frequency = <100000>;
133	i2c-sda-hold-time-ns = <300>;
134	i2c-sda-falling-time-ns = <510>;
135	i2c-scl-falling-time-ns = <510>;
136	pinctrl-names = "default";
137	pinctrl-0 = <&i2c0_pins>;
138	status = "okay";
139};
140
141&i2c2 {
142	clock-frequency = <100000>;
143	i2c-sda-hold-time-ns = <300>;
144	i2c-sda-falling-time-ns = <510>;
145	i2c-scl-falling-time-ns = <510>;
146	pinctrl-names = "default";
147	pinctrl-0 = <&i2c2_pins>;
148	status = "okay";
149};
150
151&i2c5 {
152	clock-frequency = <100000>;
153	i2c-sda-hold-time-ns = <300>;
154	i2c-sda-falling-time-ns = <510>;
155	i2c-scl-falling-time-ns = <510>;
156	pinctrl-names = "default";
157	pinctrl-0 = <&i2c5_pins>;
158	status = "okay";
159
160	axp15060: pmic@36 {
161		compatible = "x-powers,axp15060";
162		reg = <0x36>;
163		interrupts = <0>;
164		interrupt-controller;
165		#interrupt-cells = <1>;
166
167		regulators {
168			vcc_3v3: dcdc1 {
169				regulator-boot-on;
170				regulator-always-on;
171				regulator-min-microvolt = <3300000>;
172				regulator-max-microvolt = <3300000>;
173				regulator-name = "vcc_3v3";
174			};
175
176			vdd_cpu: dcdc2 {
177				regulator-always-on;
178				regulator-min-microvolt = <500000>;
179				regulator-max-microvolt = <1540000>;
180				regulator-name = "vdd-cpu";
181			};
182
183			emmc_vdd: aldo4 {
184				regulator-boot-on;
185				regulator-always-on;
186				regulator-min-microvolt = <1800000>;
187				regulator-max-microvolt = <1800000>;
188				regulator-name = "emmc_vdd";
189			};
190		};
191	};
192};
193
194&i2c6 {
195	clock-frequency = <100000>;
196	i2c-sda-hold-time-ns = <300>;
197	i2c-sda-falling-time-ns = <510>;
198	i2c-scl-falling-time-ns = <510>;
199	pinctrl-names = "default";
200	pinctrl-0 = <&i2c6_pins>;
201	status = "okay";
202};
203
204&qspi {
205	#address-cells = <1>;
206	#size-cells = <0>;
207	status = "okay";
208
209	nor_flash: flash@0 {
210		compatible = "jedec,spi-nor";
211		reg = <0>;
212		cdns,read-delay = <5>;
213		spi-max-frequency = <12000000>;
214		cdns,tshsl-ns = <1>;
215		cdns,tsd2d-ns = <1>;
216		cdns,tchsh-ns = <1>;
217		cdns,tslch-ns = <1>;
218
219		partitions {
220			compatible = "fixed-partitions";
221			#address-cells = <1>;
222			#size-cells = <1>;
223
224			spl@0 {
225				reg = <0x0 0x80000>;
226			};
227			uboot-env@f0000 {
228				reg = <0xf0000 0x10000>;
229			};
230			uboot@100000 {
231				reg = <0x100000 0x400000>;
232			};
233			reserved-data@600000 {
234				reg = <0x600000 0x1000000>;
235			};
236		};
237	};
238};
239
240&spi0 {
241	pinctrl-names = "default";
242	pinctrl-0 = <&spi0_pins>;
243	status = "okay";
244
245	spi_dev0: spi@0 {
246		compatible = "rohm,dh2228fv";
247		reg = <0>;
248		spi-max-frequency = <10000000>;
249	};
250};
251
252&sysgpio {
253	i2c0_pins: i2c0-0 {
254		i2c-pins {
255			pinmux = <GPIOMUX(57, GPOUT_LOW,
256					      GPOEN_SYS_I2C0_CLK,
257					      GPI_SYS_I2C0_CLK)>,
258				 <GPIOMUX(58, GPOUT_LOW,
259					      GPOEN_SYS_I2C0_DATA,
260					      GPI_SYS_I2C0_DATA)>;
261			bias-disable; /* external pull-up */
262			input-enable;
263			input-schmitt-enable;
264		};
265	};
266
267	i2c2_pins: i2c2-0 {
268		i2c-pins {
269			pinmux = <GPIOMUX(3, GPOUT_LOW,
270					     GPOEN_SYS_I2C2_CLK,
271					     GPI_SYS_I2C2_CLK)>,
272				 <GPIOMUX(2, GPOUT_LOW,
273					     GPOEN_SYS_I2C2_DATA,
274					     GPI_SYS_I2C2_DATA)>;
275			bias-disable; /* external pull-up */
276			input-enable;
277			input-schmitt-enable;
278		};
279	};
280
281	i2c5_pins: i2c5-0 {
282		i2c-pins {
283			pinmux = <GPIOMUX(19, GPOUT_LOW,
284					      GPOEN_SYS_I2C5_CLK,
285					      GPI_SYS_I2C5_CLK)>,
286				 <GPIOMUX(20, GPOUT_LOW,
287					      GPOEN_SYS_I2C5_DATA,
288					      GPI_SYS_I2C5_DATA)>;
289			bias-disable; /* external pull-up */
290			input-enable;
291			input-schmitt-enable;
292		};
293	};
294
295	i2c6_pins: i2c6-0 {
296		i2c-pins {
297			pinmux = <GPIOMUX(16, GPOUT_LOW,
298					      GPOEN_SYS_I2C6_CLK,
299					      GPI_SYS_I2C6_CLK)>,
300				 <GPIOMUX(17, GPOUT_LOW,
301					      GPOEN_SYS_I2C6_DATA,
302					      GPI_SYS_I2C6_DATA)>;
303			bias-disable; /* external pull-up */
304			input-enable;
305			input-schmitt-enable;
306		};
307	};
308
309	spi0_pins: spi0-0 {
310		mosi-pins {
311			pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
312					      GPOEN_ENABLE,
313					      GPI_NONE)>;
314			bias-disable;
315			input-disable;
316			input-schmitt-disable;
317		};
318
319		miso-pins {
320			pinmux = <GPIOMUX(53, GPOUT_LOW,
321					      GPOEN_DISABLE,
322					      GPI_SYS_SPI0_RXD)>;
323			bias-pull-up;
324			input-enable;
325			input-schmitt-enable;
326		};
327
328		sck-pins {
329			pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
330					      GPOEN_ENABLE,
331					      GPI_SYS_SPI0_CLK)>;
332			bias-disable;
333			input-disable;
334			input-schmitt-disable;
335		};
336
337		ss-pins {
338			pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_FSS,
339					      GPOEN_ENABLE,
340					      GPI_SYS_SPI0_FSS)>;
341			bias-disable;
342			input-disable;
343			input-schmitt-disable;
344		};
345	};
346
347	uart0_pins: uart0-0 {
348		tx-pins {
349			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
350					     GPOEN_ENABLE,
351					     GPI_NONE)>;
352			bias-disable;
353			drive-strength = <12>;
354			input-disable;
355			input-schmitt-disable;
356			slew-rate = <0>;
357		};
358
359		rx-pins {
360			pinmux = <GPIOMUX(6, GPOUT_LOW,
361					     GPOEN_DISABLE,
362					     GPI_SYS_UART0_RX)>;
363			bias-disable; /* external pull-up */
364			drive-strength = <2>;
365			input-enable;
366			input-schmitt-enable;
367			slew-rate = <0>;
368		};
369	};
370
371	tdm_pins: tdm-0 {
372		tx-pins {
373			pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
374					      GPOEN_ENABLE,
375					      GPI_NONE)>;
376			bias-pull-up;
377			drive-strength = <2>;
378			input-disable;
379			input-schmitt-disable;
380			slew-rate = <0>;
381		};
382
383		rx-pins {
384			pinmux = <GPIOMUX(61, GPOUT_HIGH,
385					      GPOEN_DISABLE,
386					      GPI_SYS_TDM_RXD)>;
387			input-enable;
388		};
389
390		sync-pins {
391			pinmux = <GPIOMUX(63, GPOUT_HIGH,
392					      GPOEN_DISABLE,
393					      GPI_SYS_TDM_SYNC)>;
394			input-enable;
395		};
396
397		pcmclk-pins {
398			pinmux = <GPIOMUX(38, GPOUT_HIGH,
399					      GPOEN_DISABLE,
400					      GPI_SYS_TDM_CLK)>;
401			input-enable;
402		};
403	};
404};
405
406&tdm {
407	pinctrl-names = "default";
408	pinctrl-0 = <&tdm_pins>;
409	status = "okay";
410};
411
412&uart0 {
413	pinctrl-names = "default";
414	pinctrl-0 = <&uart0_pins>;
415	status = "okay";
416};
417
418&usb0 {
419	dr_mode = "peripheral";
420};
421
422&U74_1 {
423	cpu-supply = <&vdd_cpu>;
424};
425
426&U74_2 {
427	cpu-supply = <&vdd_cpu>;
428};
429
430&U74_3 {
431	cpu-supply = <&vdd_cpu>;
432};
433
434&U74_4 {
435	cpu-supply = <&vdd_cpu>;
436};
437