1// SPDX-License-Identifier: (GPL-2.0+ or MIT)
2// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
3
4/*
5 * gpio line names
6 *
7 * The Nezha-D1 has a 40-pin IO header. Some of these pins are routed
8 * directly to pads on the SoC, others come from an 8-bit pcf857x IO
9 * expander. Therefore, these line names are specified in two places:
10 * one set for the pcf857x, and one set for the pio controller.
11 *
12 * Lines which are routed to the 40-pin header are named as follows:
13 *	<pin#> [<pin name>]
14 * where:
15 *	<pin#>		is the actual pin number of the 40-pin header
16 *	<pin name>	is the name of the pin by function/gpio#
17 *
18 * For details regarding pin numbers and names see the schematics (under
19 * "IO EXPAND"):
20 * http://dl.linux-sunxi.org/D1/D1_Nezha_development_board_schematic_diagram_20210224.pdf
21 */
22
23#include <dt-bindings/gpio/gpio.h>
24#include <dt-bindings/input/input.h>
25
26/dts-v1/;
27
28#include "sun20i-d1.dtsi"
29#include "sun20i-common-regulators.dtsi"
30
31/ {
32	model = "Allwinner D1 Nezha";
33	compatible = "allwinner,d1-nezha", "allwinner,sun20i-d1";
34
35	aliases {
36		ethernet0 = &emac;
37		ethernet1 = &xr829;
38		serial0 = &uart0;
39	};
40
41	chosen {
42		stdout-path = "serial0:115200n8";
43	};
44
45	reg_usbvbus: usbvbus {
46		compatible = "regulator-fixed";
47		regulator-name = "usbvbus";
48		regulator-min-microvolt = <5000000>;
49		regulator-max-microvolt = <5000000>;
50		gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
51		enable-active-high;
52		vin-supply = <&reg_vcc>;
53	};
54
55	/*
56	 * This regulator is PWM-controlled, but the PWM controller is not
57	 * yet supported, so fix the regulator to its default voltage.
58	 */
59	reg_vdd_cpu: vdd-cpu {
60		compatible = "regulator-fixed";
61		regulator-name = "vdd-cpu";
62		regulator-min-microvolt = <1100000>;
63		regulator-max-microvolt = <1100000>;
64		vin-supply = <&reg_vcc>;
65	};
66
67	wifi_pwrseq: wifi-pwrseq {
68		compatible = "mmc-pwrseq-simple";
69		reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
70	};
71};
72
73&cpu0 {
74	cpu-supply = <&reg_vdd_cpu>;
75};
76
77&dcxo {
78	clock-frequency = <24000000>;
79};
80
81&ehci0 {
82	status = "okay";
83};
84
85&ehci1 {
86	status = "okay";
87};
88
89&emac {
90	pinctrl-0 = <&rgmii_pe_pins>;
91	pinctrl-names = "default";
92	phy-handle = <&ext_rgmii_phy>;
93	phy-mode = "rgmii-id";
94	phy-supply = <&reg_vcc_3v3>;
95	status = "okay";
96};
97
98&i2c2 {
99	pinctrl-0 = <&i2c2_pb0_pins>;
100	pinctrl-names = "default";
101	status = "okay";
102
103	pcf8574a: gpio@38 {
104		compatible = "nxp,pcf8574a";
105		reg = <0x38>;
106		interrupt-parent = <&pio>;
107		interrupts = <1 2 IRQ_TYPE_LEVEL_LOW>; /* PB2 */
108		interrupt-controller;
109		gpio-controller;
110		#gpio-cells = <2>;
111		#interrupt-cells = <2>;
112		gpio-line-names =
113			"pin13 [gpio8]",
114			"pin16 [gpio10]",
115			"pin18 [gpio11]",
116			"pin26 [gpio17]",
117			"pin22 [gpio14]",
118			"pin28 [gpio19]",
119			"pin37 [gpio23]",
120			"pin11 [gpio6]";
121	};
122};
123
124&mdio {
125	ext_rgmii_phy: ethernet-phy@1 {
126		compatible = "ethernet-phy-ieee802.3-c22";
127		reg = <1>;
128	};
129};
130
131&mmc0 {
132	bus-width = <4>;
133	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
134	disable-wp;
135	vmmc-supply = <&reg_vcc_3v3>;
136	vqmmc-supply = <&reg_vcc_3v3>;
137	pinctrl-0 = <&mmc0_pins>;
138	pinctrl-names = "default";
139	status = "okay";
140};
141
142&mmc1 {
143	bus-width = <4>;
144	mmc-pwrseq = <&wifi_pwrseq>;
145	non-removable;
146	vmmc-supply = <&reg_vcc_3v3>;
147	vqmmc-supply = <&reg_vcc_3v3>;
148	pinctrl-0 = <&mmc1_pins>;
149	pinctrl-names = "default";
150	status = "okay";
151
152	xr829: wifi@1 {
153		reg = <1>;
154		interrupt-parent = <&pio>;
155		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */
156		interrupt-names = "host-wake";
157	};
158};
159
160&ohci0 {
161	status = "okay";
162};
163
164&ohci1 {
165	status = "okay";
166};
167
168&uart0 {
169	pinctrl-0 = <&uart0_pb8_pins>;
170	pinctrl-names = "default";
171	status = "okay";
172};
173
174&uart1 {
175	uart-has-rtscts;
176	pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
177	pinctrl-names = "default";
178	status = "okay";
179
180	/* XR829 bluetooth is connected here */
181};
182
183&usb_otg {
184	dr_mode = "otg";
185	status = "okay";
186};
187
188&usbphy {
189	usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
190	usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
191	usb0_vbus-supply = <&reg_usbvbus>;
192	usb1_vbus-supply = <&reg_vcc>;
193	status = "okay";
194};
195
196&pio {
197	gpio-line-names =
198		/* Port A */
199		"", "", "", "", "", "", "", "",
200		"", "", "", "", "", "", "", "",
201		"", "", "", "", "", "", "", "",
202		"", "", "", "", "", "", "", "",
203		/* Port B */
204		"pin5 [gpio2/twi2-sck]",
205		"pin3 [gpio1/twi2-sda]",
206		"",
207		"pin38 [gpio24/i2s2-din]",
208		"pin40 [gpio25/i2s2-dout]",
209		"pin12 [gpio7/i2s-clk]",
210		"pin35 [gpio22/i2s2-lrck]",
211		"",
212		"pin8 [gpio4/uart0-txd]",
213		"pin10 [gpio5/uart0-rxd]",
214		"",
215		"",
216		"pin15 [gpio9]",
217		"", "", "", "",
218		"", "", "", "", "", "", "", "",
219		"", "", "", "", "", "", "", "",
220		/* Port C */
221		"",
222		"pin31 [gpio21]",
223		"", "", "", "", "", "",
224		"", "", "", "", "", "", "", "",
225		"", "", "", "", "", "", "", "",
226		"", "", "", "", "", "", "", "",
227		/* Port D */
228		"", "", "", "", "", "", "", "",
229		"", "",
230		"pin24 [gpio16/spi1-ce0]",
231		"pin23 [gpio15/spi1-clk]",
232		"pin19 [gpio12/spi1-mosi]",
233		"pin21 [gpio13/spi1-miso]",
234		"pin27 [gpio18/spi1-hold]",
235		"pin29 [gpio20/spi1-wp]",
236		"", "", "", "", "", "",
237		"pin7 [gpio3/pwm]";
238};
239