xref: /openbmc/linux/arch/riscv/Makefile (revision ae88357c)
1# This file is included by the global makefile so that you can add your own
2# architecture-specific flags and dependencies. Remember to do have actions
3# for "archclean" and "archdep" for cleaning up and making dependencies for
4# this architecture
5#
6# This file is subject to the terms and conditions of the GNU General Public
7# License.  See the file "COPYING" in the main directory of this archive
8# for more details.
9#
10
11OBJCOPYFLAGS    := -O binary
12LDFLAGS_vmlinux :=
13ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
14	LDFLAGS_vmlinux := --no-relax
15	KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY
16	CC_FLAGS_FTRACE := -fpatchable-function-entry=8
17endif
18
19ifeq ($(CONFIG_64BIT)$(CONFIG_CMODEL_MEDLOW),yy)
20KBUILD_CFLAGS_MODULE += -mcmodel=medany
21endif
22
23export BITS
24ifeq ($(CONFIG_ARCH_RV64I),y)
25	BITS := 64
26	UTS_MACHINE := riscv64
27
28	KBUILD_CFLAGS += -mabi=lp64
29	KBUILD_AFLAGS += -mabi=lp64
30
31	KBUILD_LDFLAGS += -melf64lriscv
32else
33	BITS := 32
34	UTS_MACHINE := riscv32
35
36	KBUILD_CFLAGS += -mabi=ilp32
37	KBUILD_AFLAGS += -mabi=ilp32
38	KBUILD_LDFLAGS += -melf32lriscv
39endif
40
41# ISA string setting
42riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
43riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
44riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd
45riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
46KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
47KBUILD_AFLAGS += -march=$(riscv-march-y)
48
49KBUILD_CFLAGS += -mno-save-restore
50KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
51
52ifeq ($(CONFIG_CMODEL_MEDLOW),y)
53	KBUILD_CFLAGS += -mcmodel=medlow
54endif
55ifeq ($(CONFIG_CMODEL_MEDANY),y)
56	KBUILD_CFLAGS += -mcmodel=medany
57endif
58ifeq ($(CONFIG_PERF_EVENTS),y)
59        KBUILD_CFLAGS += -fno-omit-frame-pointer
60endif
61
62KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax)
63
64# GCC versions that support the "-mstrict-align" option default to allowing
65# unaligned accesses.  While unaligned accesses are explicitly allowed in the
66# RISC-V ISA, they're emulated by machine mode traps on all extant
67# architectures.  It's faster to have GCC emit only aligned accesses.
68KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
69
70ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)
71prepare: stack_protector_prepare
72stack_protector_prepare: prepare0
73	$(eval KBUILD_CFLAGS += -mstack-protector-guard=tls		  \
74				-mstack-protector-guard-reg=tp		  \
75				-mstack-protector-guard-offset=$(shell	  \
76			awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \
77					include/generated/asm-offsets.h))
78endif
79
80# arch specific predefines for sparse
81CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS)
82
83# Default target when executing plain make
84boot		:= arch/riscv/boot
85ifeq ($(CONFIG_XIP_KERNEL),y)
86KBUILD_IMAGE := $(boot)/xipImage
87else
88KBUILD_IMAGE	:= $(boot)/Image.gz
89endif
90
91head-y := arch/riscv/kernel/head.o
92
93core-y += arch/riscv/
94core-$(CONFIG_RISCV_ERRATA_ALTERNATIVE) += arch/riscv/errata/
95
96libs-y += arch/riscv/lib/
97libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
98
99PHONY += vdso_install
100vdso_install:
101	$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@
102
103ifneq ($(CONFIG_XIP_KERNEL),y)
104ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy)
105KBUILD_IMAGE := $(boot)/loader.bin
106else
107KBUILD_IMAGE := $(boot)/Image.gz
108endif
109endif
110BOOT_TARGETS := Image Image.gz loader loader.bin xipImage
111
112all:	$(notdir $(KBUILD_IMAGE))
113
114$(BOOT_TARGETS): vmlinux
115	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
116	@$(kecho) '  Kernel: $(boot)/$@ is ready'
117
118Image.%: Image
119	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
120
121zinstall install:
122	$(Q)$(MAKE) $(build)=$(boot) $@
123
124archclean:
125	$(Q)$(MAKE) $(clean)=$(boot)
126