xref: /openbmc/linux/arch/riscv/Makefile (revision 95298d63)
1# This file is included by the global makefile so that you can add your own
2# architecture-specific flags and dependencies. Remember to do have actions
3# for "archclean" and "archdep" for cleaning up and making dependencies for
4# this architecture
5#
6# This file is subject to the terms and conditions of the GNU General Public
7# License.  See the file "COPYING" in the main directory of this archive
8# for more details.
9#
10
11OBJCOPYFLAGS    := -O binary
12LDFLAGS_vmlinux :=
13ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
14	LDFLAGS_vmlinux := --no-relax
15endif
16
17ifeq ($(CONFIG_64BIT)$(CONFIG_CMODEL_MEDLOW),yy)
18KBUILD_CFLAGS_MODULE += -mcmodel=medany
19endif
20
21export BITS
22ifeq ($(CONFIG_ARCH_RV64I),y)
23	BITS := 64
24	UTS_MACHINE := riscv64
25
26	KBUILD_CFLAGS += -mabi=lp64
27	KBUILD_AFLAGS += -mabi=lp64
28
29	KBUILD_LDFLAGS += -melf64lriscv
30else
31	BITS := 32
32	UTS_MACHINE := riscv32
33
34	KBUILD_CFLAGS += -mabi=ilp32
35	KBUILD_AFLAGS += -mabi=ilp32
36	KBUILD_LDFLAGS += -melf32lriscv
37endif
38
39# ISA string setting
40riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
41riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
42riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd
43riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
44KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
45KBUILD_AFLAGS += -march=$(riscv-march-y)
46
47KBUILD_CFLAGS += -mno-save-restore
48KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
49
50ifeq ($(CONFIG_CMODEL_MEDLOW),y)
51	KBUILD_CFLAGS += -mcmodel=medlow
52endif
53ifeq ($(CONFIG_CMODEL_MEDANY),y)
54	KBUILD_CFLAGS += -mcmodel=medany
55endif
56ifeq ($(CONFIG_MODULE_SECTIONS),y)
57	KBUILD_LDS_MODULE += $(srctree)/arch/riscv/kernel/module.lds
58endif
59ifeq ($(CONFIG_PERF_EVENTS),y)
60        KBUILD_CFLAGS += -fno-omit-frame-pointer
61endif
62
63KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax)
64
65# GCC versions that support the "-mstrict-align" option default to allowing
66# unaligned accesses.  While unaligned accesses are explicitly allowed in the
67# RISC-V ISA, they're emulated by machine mode traps on all extant
68# architectures.  It's faster to have GCC emit only aligned accesses.
69KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
70
71# arch specific predefines for sparse
72CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS)
73
74# Default target when executing plain make
75boot		:= arch/riscv/boot
76KBUILD_IMAGE	:= $(boot)/Image.gz
77
78head-y := arch/riscv/kernel/head.o
79
80core-y += arch/riscv/
81
82libs-y += arch/riscv/lib/
83
84PHONY += vdso_install
85vdso_install:
86	$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@
87
88ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_KENDRYTE),yy)
89KBUILD_IMAGE := $(boot)/loader.bin
90else
91KBUILD_IMAGE := $(boot)/Image.gz
92endif
93BOOT_TARGETS := Image Image.gz loader loader.bin
94
95all:	$(notdir $(KBUILD_IMAGE))
96
97$(BOOT_TARGETS): vmlinux
98	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
99	@$(kecho) '  Kernel: $(boot)/$@ is ready'
100
101zinstall install:
102	$(Q)$(MAKE) $(build)=$(boot) $@
103