1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Routines providing a simple monitor for use on the PowerMac. 4 * 5 * Copyright (C) 1996-2005 Paul Mackerras. 6 * Copyright (C) 2001 PPC64 Team, IBM Corp 7 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/errno.h> 12 #include <linux/sched/signal.h> 13 #include <linux/smp.h> 14 #include <linux/mm.h> 15 #include <linux/reboot.h> 16 #include <linux/delay.h> 17 #include <linux/kallsyms.h> 18 #include <linux/kmsg_dump.h> 19 #include <linux/cpumask.h> 20 #include <linux/export.h> 21 #include <linux/sysrq.h> 22 #include <linux/interrupt.h> 23 #include <linux/irq.h> 24 #include <linux/bug.h> 25 #include <linux/nmi.h> 26 #include <linux/ctype.h> 27 #include <linux/highmem.h> 28 #include <linux/security.h> 29 30 #include <asm/debugfs.h> 31 #include <asm/ptrace.h> 32 #include <asm/smp.h> 33 #include <asm/string.h> 34 #include <asm/prom.h> 35 #include <asm/machdep.h> 36 #include <asm/xmon.h> 37 #include <asm/processor.h> 38 #include <asm/mmu.h> 39 #include <asm/mmu_context.h> 40 #include <asm/plpar_wrappers.h> 41 #include <asm/cputable.h> 42 #include <asm/rtas.h> 43 #include <asm/sstep.h> 44 #include <asm/irq_regs.h> 45 #include <asm/spu.h> 46 #include <asm/spu_priv1.h> 47 #include <asm/setjmp.h> 48 #include <asm/reg.h> 49 #include <asm/debug.h> 50 #include <asm/hw_breakpoint.h> 51 #include <asm/xive.h> 52 #include <asm/opal.h> 53 #include <asm/firmware.h> 54 #include <asm/code-patching.h> 55 #include <asm/sections.h> 56 #include <asm/inst.h> 57 58 #ifdef CONFIG_PPC64 59 #include <asm/hvcall.h> 60 #include <asm/paca.h> 61 #endif 62 63 #include "nonstdio.h" 64 #include "dis-asm.h" 65 #include "xmon_bpts.h" 66 67 #ifdef CONFIG_SMP 68 static cpumask_t cpus_in_xmon = CPU_MASK_NONE; 69 static unsigned long xmon_taken = 1; 70 static int xmon_owner; 71 static int xmon_gate; 72 #else 73 #define xmon_owner 0 74 #endif /* CONFIG_SMP */ 75 76 #ifdef CONFIG_PPC_PSERIES 77 static int set_indicator_token = RTAS_UNKNOWN_SERVICE; 78 #endif 79 static unsigned long in_xmon __read_mostly = 0; 80 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT); 81 static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE); 82 83 static unsigned long adrs; 84 static int size = 1; 85 #define MAX_DUMP (64 * 1024) 86 static unsigned long ndump = 64; 87 #define MAX_IDUMP (MAX_DUMP >> 2) 88 static unsigned long nidump = 16; 89 static unsigned long ncsum = 4096; 90 static int termch; 91 static char tmpstr[128]; 92 static int tracing_enabled; 93 94 static long bus_error_jmp[JMP_BUF_LEN]; 95 static int catch_memory_errors; 96 static int catch_spr_faults; 97 static long *xmon_fault_jmp[NR_CPUS]; 98 99 /* Breakpoint stuff */ 100 struct bpt { 101 unsigned long address; 102 struct ppc_inst *instr; 103 atomic_t ref_count; 104 int enabled; 105 unsigned long pad; 106 }; 107 108 /* Bits in bpt.enabled */ 109 #define BP_CIABR 1 110 #define BP_TRAP 2 111 #define BP_DABR 4 112 113 static struct bpt bpts[NBPTS]; 114 static struct bpt dabr[HBP_NUM_MAX]; 115 static struct bpt *iabr; 116 static unsigned bpinstr = 0x7fe00008; /* trap */ 117 118 #define BP_NUM(bp) ((bp) - bpts + 1) 119 120 /* Prototypes */ 121 static int cmds(struct pt_regs *); 122 static int mread(unsigned long, void *, int); 123 static int mwrite(unsigned long, void *, int); 124 static int mread_instr(unsigned long, struct ppc_inst *); 125 static int handle_fault(struct pt_regs *); 126 static void byterev(unsigned char *, int); 127 static void memex(void); 128 static int bsesc(void); 129 static void dump(void); 130 static void show_pte(unsigned long); 131 static void prdump(unsigned long, long); 132 static int ppc_inst_dump(unsigned long, long, int); 133 static void dump_log_buf(void); 134 135 #ifdef CONFIG_PPC_POWERNV 136 static void dump_opal_msglog(void); 137 #else 138 static inline void dump_opal_msglog(void) 139 { 140 printf("Machine is not running OPAL firmware.\n"); 141 } 142 #endif 143 144 static void backtrace(struct pt_regs *); 145 static void excprint(struct pt_regs *); 146 static void prregs(struct pt_regs *); 147 static void memops(int); 148 static void memlocate(void); 149 static void memzcan(void); 150 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned); 151 int skipbl(void); 152 int scanhex(unsigned long *valp); 153 static void scannl(void); 154 static int hexdigit(int); 155 void getstring(char *, int); 156 static void flush_input(void); 157 static int inchar(void); 158 static void take_input(char *); 159 static int read_spr(int, unsigned long *); 160 static void write_spr(int, unsigned long); 161 static void super_regs(void); 162 static void remove_bpts(void); 163 static void insert_bpts(void); 164 static void remove_cpu_bpts(void); 165 static void insert_cpu_bpts(void); 166 static struct bpt *at_breakpoint(unsigned long pc); 167 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp); 168 static int do_step(struct pt_regs *); 169 static void bpt_cmds(void); 170 static void cacheflush(void); 171 static int cpu_cmd(void); 172 static void csum(void); 173 static void bootcmds(void); 174 static void proccall(void); 175 static void show_tasks(void); 176 void dump_segments(void); 177 static void symbol_lookup(void); 178 static void xmon_show_stack(unsigned long sp, unsigned long lr, 179 unsigned long pc); 180 static void xmon_print_symbol(unsigned long address, const char *mid, 181 const char *after); 182 static const char *getvecname(unsigned long vec); 183 184 static int do_spu_cmd(void); 185 186 #ifdef CONFIG_44x 187 static void dump_tlb_44x(void); 188 #endif 189 #ifdef CONFIG_PPC_BOOK3E 190 static void dump_tlb_book3e(void); 191 #endif 192 193 static void clear_all_bpt(void); 194 195 #ifdef CONFIG_PPC64 196 #define REG "%.16lx" 197 #else 198 #define REG "%.8lx" 199 #endif 200 201 #ifdef __LITTLE_ENDIAN__ 202 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0]) 203 #else 204 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3]) 205 #endif 206 207 static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n"; 208 209 static char *help_string = "\ 210 Commands:\n\ 211 b show breakpoints\n\ 212 bd set data breakpoint\n\ 213 bi set instruction breakpoint\n\ 214 bc clear breakpoint\n" 215 #ifdef CONFIG_SMP 216 "\ 217 c print cpus stopped in xmon\n\ 218 c# try to switch to cpu number h (in hex)\n" 219 #endif 220 "\ 221 C checksum\n\ 222 d dump bytes\n\ 223 d1 dump 1 byte values\n\ 224 d2 dump 2 byte values\n\ 225 d4 dump 4 byte values\n\ 226 d8 dump 8 byte values\n\ 227 di dump instructions\n\ 228 df dump float values\n\ 229 dd dump double values\n\ 230 dl dump the kernel log buffer\n" 231 #ifdef CONFIG_PPC_POWERNV 232 "\ 233 do dump the OPAL message log\n" 234 #endif 235 #ifdef CONFIG_PPC64 236 "\ 237 dp[#] dump paca for current cpu, or cpu #\n\ 238 dpa dump paca for all possible cpus\n" 239 #endif 240 "\ 241 dr dump stream of raw bytes\n\ 242 dv dump virtual address translation \n\ 243 dt dump the tracing buffers (uses printk)\n\ 244 dtc dump the tracing buffers for current CPU (uses printk)\n\ 245 " 246 #ifdef CONFIG_PPC_POWERNV 247 " dx# dump xive on CPU #\n\ 248 dxi# dump xive irq state #\n\ 249 dxa dump xive on all CPUs\n" 250 #endif 251 " e print exception information\n\ 252 f flush cache\n\ 253 la lookup symbol+offset of specified address\n\ 254 ls lookup address of specified symbol\n\ 255 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\ 256 m examine/change memory\n\ 257 mm move a block of memory\n\ 258 ms set a block of memory\n\ 259 md compare two blocks of memory\n\ 260 ml locate a block of memory\n\ 261 mz zero a block of memory\n\ 262 mi show information about memory allocation\n\ 263 p call a procedure\n\ 264 P list processes/tasks\n\ 265 r print registers\n\ 266 s single step\n" 267 #ifdef CONFIG_SPU_BASE 268 " ss stop execution on all spus\n\ 269 sr restore execution on stopped spus\n\ 270 sf # dump spu fields for spu # (in hex)\n\ 271 sd # dump spu local store for spu # (in hex)\n\ 272 sdi # disassemble spu local store for spu # (in hex)\n" 273 #endif 274 " S print special registers\n\ 275 Sa print all SPRs\n\ 276 Sr # read SPR #\n\ 277 Sw #v write v to SPR #\n\ 278 t print backtrace\n\ 279 x exit monitor and recover\n\ 280 X exit monitor and don't recover\n" 281 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E) 282 " u dump segment table or SLB\n" 283 #elif defined(CONFIG_PPC_BOOK3S_32) 284 " u dump segment registers\n" 285 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E) 286 " u dump TLB\n" 287 #endif 288 " U show uptime information\n" 289 " ? help\n" 290 " # n limit output to n lines per page (for dp, dpa, dl)\n" 291 " zr reboot\n" 292 " zh halt\n" 293 ; 294 295 #ifdef CONFIG_SECURITY 296 static bool xmon_is_locked_down(void) 297 { 298 static bool lockdown; 299 300 if (!lockdown) { 301 lockdown = !!security_locked_down(LOCKDOWN_XMON_RW); 302 if (lockdown) { 303 printf("xmon: Disabled due to kernel lockdown\n"); 304 xmon_is_ro = true; 305 } 306 } 307 308 if (!xmon_is_ro) { 309 xmon_is_ro = !!security_locked_down(LOCKDOWN_XMON_WR); 310 if (xmon_is_ro) 311 printf("xmon: Read-only due to kernel lockdown\n"); 312 } 313 314 return lockdown; 315 } 316 #else /* CONFIG_SECURITY */ 317 static inline bool xmon_is_locked_down(void) 318 { 319 return false; 320 } 321 #endif 322 323 static struct pt_regs *xmon_regs; 324 325 static inline void sync(void) 326 { 327 asm volatile("sync; isync"); 328 } 329 330 static inline void cflush(void *p) 331 { 332 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p)); 333 } 334 335 static inline void cinval(void *p) 336 { 337 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p)); 338 } 339 340 /** 341 * write_ciabr() - write the CIABR SPR 342 * @ciabr: The value to write. 343 * 344 * This function writes a value to the CIARB register either directly 345 * through mtspr instruction if the kernel is in HV privilege mode or 346 * call a hypervisor function to achieve the same in case the kernel 347 * is in supervisor privilege mode. 348 */ 349 static void write_ciabr(unsigned long ciabr) 350 { 351 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 352 return; 353 354 if (cpu_has_feature(CPU_FTR_HVMODE)) { 355 mtspr(SPRN_CIABR, ciabr); 356 return; 357 } 358 plpar_set_ciabr(ciabr); 359 } 360 361 /** 362 * set_ciabr() - set the CIABR 363 * @addr: The value to set. 364 * 365 * This function sets the correct privilege value into the the HW 366 * breakpoint address before writing it up in the CIABR register. 367 */ 368 static void set_ciabr(unsigned long addr) 369 { 370 addr &= ~CIABR_PRIV; 371 372 if (cpu_has_feature(CPU_FTR_HVMODE)) 373 addr |= CIABR_PRIV_HYPER; 374 else 375 addr |= CIABR_PRIV_SUPER; 376 write_ciabr(addr); 377 } 378 379 /* 380 * Disable surveillance (the service processor watchdog function) 381 * while we are in xmon. 382 * XXX we should re-enable it when we leave. :) 383 */ 384 #define SURVEILLANCE_TOKEN 9000 385 386 static inline void disable_surveillance(void) 387 { 388 #ifdef CONFIG_PPC_PSERIES 389 /* Since this can't be a module, args should end up below 4GB. */ 390 static struct rtas_args args; 391 392 /* 393 * At this point we have got all the cpus we can into 394 * xmon, so there is hopefully no other cpu calling RTAS 395 * at the moment, even though we don't take rtas.lock. 396 * If we did try to take rtas.lock there would be a 397 * real possibility of deadlock. 398 */ 399 if (set_indicator_token == RTAS_UNKNOWN_SERVICE) 400 return; 401 402 rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL, 403 SURVEILLANCE_TOKEN, 0, 0); 404 405 #endif /* CONFIG_PPC_PSERIES */ 406 } 407 408 #ifdef CONFIG_SMP 409 static int xmon_speaker; 410 411 static void get_output_lock(void) 412 { 413 int me = smp_processor_id() + 0x100; 414 int last_speaker = 0, prev; 415 long timeout; 416 417 if (xmon_speaker == me) 418 return; 419 420 for (;;) { 421 last_speaker = cmpxchg(&xmon_speaker, 0, me); 422 if (last_speaker == 0) 423 return; 424 425 /* 426 * Wait a full second for the lock, we might be on a slow 427 * console, but check every 100us. 428 */ 429 timeout = 10000; 430 while (xmon_speaker == last_speaker) { 431 if (--timeout > 0) { 432 udelay(100); 433 continue; 434 } 435 436 /* hostile takeover */ 437 prev = cmpxchg(&xmon_speaker, last_speaker, me); 438 if (prev == last_speaker) 439 return; 440 break; 441 } 442 } 443 } 444 445 static void release_output_lock(void) 446 { 447 xmon_speaker = 0; 448 } 449 450 int cpus_are_in_xmon(void) 451 { 452 return !cpumask_empty(&cpus_in_xmon); 453 } 454 455 static bool wait_for_other_cpus(int ncpus) 456 { 457 unsigned long timeout; 458 459 /* We wait for 2s, which is a metric "little while" */ 460 for (timeout = 20000; timeout != 0; --timeout) { 461 if (cpumask_weight(&cpus_in_xmon) >= ncpus) 462 return true; 463 udelay(100); 464 barrier(); 465 } 466 467 return false; 468 } 469 #else /* CONFIG_SMP */ 470 static inline void get_output_lock(void) {} 471 static inline void release_output_lock(void) {} 472 #endif 473 474 static inline int unrecoverable_excp(struct pt_regs *regs) 475 { 476 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E) 477 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */ 478 return 0; 479 #else 480 return ((regs->msr & MSR_RI) == 0); 481 #endif 482 } 483 484 static void xmon_touch_watchdogs(void) 485 { 486 touch_softlockup_watchdog_sync(); 487 rcu_cpu_stall_reset(); 488 touch_nmi_watchdog(); 489 } 490 491 static int xmon_core(struct pt_regs *regs, int fromipi) 492 { 493 int cmd = 0; 494 struct bpt *bp; 495 long recurse_jmp[JMP_BUF_LEN]; 496 bool locked_down; 497 unsigned long offset; 498 unsigned long flags; 499 #ifdef CONFIG_SMP 500 int cpu; 501 int secondary; 502 #endif 503 504 local_irq_save(flags); 505 hard_irq_disable(); 506 507 locked_down = xmon_is_locked_down(); 508 509 if (!fromipi) { 510 tracing_enabled = tracing_is_on(); 511 tracing_off(); 512 } 513 514 bp = in_breakpoint_table(regs->nip, &offset); 515 if (bp != NULL) { 516 regs->nip = bp->address + offset; 517 atomic_dec(&bp->ref_count); 518 } 519 520 remove_cpu_bpts(); 521 522 #ifdef CONFIG_SMP 523 cpu = smp_processor_id(); 524 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 525 /* 526 * We catch SPR read/write faults here because the 0x700, 0xf60 527 * etc. handlers don't call debugger_fault_handler(). 528 */ 529 if (catch_spr_faults) 530 longjmp(bus_error_jmp, 1); 531 get_output_lock(); 532 excprint(regs); 533 printf("cpu 0x%x: Exception %lx %s in xmon, " 534 "returning to main loop\n", 535 cpu, regs->trap, getvecname(TRAP(regs))); 536 release_output_lock(); 537 longjmp(xmon_fault_jmp[cpu], 1); 538 } 539 540 if (setjmp(recurse_jmp) != 0) { 541 if (!in_xmon || !xmon_gate) { 542 get_output_lock(); 543 printf("xmon: WARNING: bad recursive fault " 544 "on cpu 0x%x\n", cpu); 545 release_output_lock(); 546 goto waiting; 547 } 548 secondary = !(xmon_taken && cpu == xmon_owner); 549 goto cmdloop; 550 } 551 552 xmon_fault_jmp[cpu] = recurse_jmp; 553 554 bp = NULL; 555 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) 556 bp = at_breakpoint(regs->nip); 557 if (bp || unrecoverable_excp(regs)) 558 fromipi = 0; 559 560 if (!fromipi) { 561 get_output_lock(); 562 if (!locked_down) 563 excprint(regs); 564 if (bp) { 565 printf("cpu 0x%x stopped at breakpoint 0x%tx (", 566 cpu, BP_NUM(bp)); 567 xmon_print_symbol(regs->nip, " ", ")\n"); 568 } 569 if (unrecoverable_excp(regs)) 570 printf("WARNING: exception is not recoverable, " 571 "can't continue\n"); 572 release_output_lock(); 573 } 574 575 cpumask_set_cpu(cpu, &cpus_in_xmon); 576 577 waiting: 578 secondary = 1; 579 spin_begin(); 580 while (secondary && !xmon_gate) { 581 if (in_xmon == 0) { 582 if (fromipi) { 583 spin_end(); 584 goto leave; 585 } 586 secondary = test_and_set_bit(0, &in_xmon); 587 } 588 spin_cpu_relax(); 589 touch_nmi_watchdog(); 590 } 591 spin_end(); 592 593 if (!secondary && !xmon_gate) { 594 /* we are the first cpu to come in */ 595 /* interrupt other cpu(s) */ 596 int ncpus = num_online_cpus(); 597 598 xmon_owner = cpu; 599 mb(); 600 if (ncpus > 1) { 601 /* 602 * A system reset (trap == 0x100) can be triggered on 603 * all CPUs, so when we come in via 0x100 try waiting 604 * for the other CPUs to come in before we send the 605 * debugger break (IPI). This is similar to 606 * crash_kexec_secondary(). 607 */ 608 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus)) 609 smp_send_debugger_break(); 610 611 wait_for_other_cpus(ncpus); 612 } 613 remove_bpts(); 614 disable_surveillance(); 615 616 if (!locked_down) { 617 /* for breakpoint or single step, print curr insn */ 618 if (bp || TRAP(regs) == 0xd00) 619 ppc_inst_dump(regs->nip, 1, 0); 620 printf("enter ? for help\n"); 621 } 622 623 mb(); 624 xmon_gate = 1; 625 barrier(); 626 touch_nmi_watchdog(); 627 } 628 629 cmdloop: 630 while (in_xmon) { 631 if (secondary) { 632 spin_begin(); 633 if (cpu == xmon_owner) { 634 if (!test_and_set_bit(0, &xmon_taken)) { 635 secondary = 0; 636 spin_end(); 637 continue; 638 } 639 /* missed it */ 640 while (cpu == xmon_owner) 641 spin_cpu_relax(); 642 } 643 spin_cpu_relax(); 644 touch_nmi_watchdog(); 645 } else { 646 if (!locked_down) 647 cmd = cmds(regs); 648 if (locked_down || cmd != 0) { 649 /* exiting xmon */ 650 insert_bpts(); 651 xmon_gate = 0; 652 wmb(); 653 in_xmon = 0; 654 break; 655 } 656 /* have switched to some other cpu */ 657 secondary = 1; 658 } 659 } 660 leave: 661 cpumask_clear_cpu(cpu, &cpus_in_xmon); 662 xmon_fault_jmp[cpu] = NULL; 663 #else 664 /* UP is simple... */ 665 if (in_xmon) { 666 printf("Exception %lx %s in xmon, returning to main loop\n", 667 regs->trap, getvecname(TRAP(regs))); 668 longjmp(xmon_fault_jmp[0], 1); 669 } 670 if (setjmp(recurse_jmp) == 0) { 671 xmon_fault_jmp[0] = recurse_jmp; 672 in_xmon = 1; 673 674 excprint(regs); 675 bp = at_breakpoint(regs->nip); 676 if (bp) { 677 printf("Stopped at breakpoint %tx (", BP_NUM(bp)); 678 xmon_print_symbol(regs->nip, " ", ")\n"); 679 } 680 if (unrecoverable_excp(regs)) 681 printf("WARNING: exception is not recoverable, " 682 "can't continue\n"); 683 remove_bpts(); 684 disable_surveillance(); 685 if (!locked_down) { 686 /* for breakpoint or single step, print current insn */ 687 if (bp || TRAP(regs) == 0xd00) 688 ppc_inst_dump(regs->nip, 1, 0); 689 printf("enter ? for help\n"); 690 } 691 } 692 693 if (!locked_down) 694 cmd = cmds(regs); 695 696 insert_bpts(); 697 in_xmon = 0; 698 #endif 699 700 #ifdef CONFIG_BOOKE 701 if (regs->msr & MSR_DE) { 702 bp = at_breakpoint(regs->nip); 703 if (bp != NULL) { 704 regs->nip = (unsigned long) &bp->instr[0]; 705 atomic_inc(&bp->ref_count); 706 } 707 } 708 #else 709 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 710 bp = at_breakpoint(regs->nip); 711 if (bp != NULL) { 712 int stepped = emulate_step(regs, ppc_inst_read(bp->instr)); 713 if (stepped == 0) { 714 regs->nip = (unsigned long) &bp->instr[0]; 715 atomic_inc(&bp->ref_count); 716 } else if (stepped < 0) { 717 printf("Couldn't single-step %s instruction\n", 718 IS_RFID(ppc_inst_read(bp->instr))? "rfid": "mtmsrd"); 719 } 720 } 721 } 722 #endif 723 if (locked_down) 724 clear_all_bpt(); 725 else 726 insert_cpu_bpts(); 727 728 xmon_touch_watchdogs(); 729 local_irq_restore(flags); 730 731 return cmd != 'X' && cmd != EOF; 732 } 733 734 int xmon(struct pt_regs *excp) 735 { 736 struct pt_regs regs; 737 738 if (excp == NULL) { 739 ppc_save_regs(®s); 740 excp = ®s; 741 } 742 743 return xmon_core(excp, 0); 744 } 745 EXPORT_SYMBOL(xmon); 746 747 irqreturn_t xmon_irq(int irq, void *d) 748 { 749 unsigned long flags; 750 local_irq_save(flags); 751 printf("Keyboard interrupt\n"); 752 xmon(get_irq_regs()); 753 local_irq_restore(flags); 754 return IRQ_HANDLED; 755 } 756 757 static int xmon_bpt(struct pt_regs *regs) 758 { 759 struct bpt *bp; 760 unsigned long offset; 761 762 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 763 return 0; 764 765 /* Are we at the trap at bp->instr[1] for some bp? */ 766 bp = in_breakpoint_table(regs->nip, &offset); 767 if (bp != NULL && (offset == 4 || offset == 8)) { 768 regs->nip = bp->address + offset; 769 atomic_dec(&bp->ref_count); 770 return 1; 771 } 772 773 /* Are we at a breakpoint? */ 774 bp = at_breakpoint(regs->nip); 775 if (!bp) 776 return 0; 777 778 xmon_core(regs, 0); 779 780 return 1; 781 } 782 783 static int xmon_sstep(struct pt_regs *regs) 784 { 785 if (user_mode(regs)) 786 return 0; 787 xmon_core(regs, 0); 788 return 1; 789 } 790 791 static int xmon_break_match(struct pt_regs *regs) 792 { 793 int i; 794 795 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 796 return 0; 797 for (i = 0; i < nr_wp_slots(); i++) { 798 if (dabr[i].enabled) 799 goto found; 800 } 801 return 0; 802 803 found: 804 xmon_core(regs, 0); 805 return 1; 806 } 807 808 static int xmon_iabr_match(struct pt_regs *regs) 809 { 810 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 811 return 0; 812 if (iabr == NULL) 813 return 0; 814 xmon_core(regs, 0); 815 return 1; 816 } 817 818 static int xmon_ipi(struct pt_regs *regs) 819 { 820 #ifdef CONFIG_SMP 821 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon)) 822 xmon_core(regs, 1); 823 #endif 824 return 0; 825 } 826 827 static int xmon_fault_handler(struct pt_regs *regs) 828 { 829 struct bpt *bp; 830 unsigned long offset; 831 832 if (in_xmon && catch_memory_errors) 833 handle_fault(regs); /* doesn't return */ 834 835 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 836 bp = in_breakpoint_table(regs->nip, &offset); 837 if (bp != NULL) { 838 regs->nip = bp->address + offset; 839 atomic_dec(&bp->ref_count); 840 } 841 } 842 843 return 0; 844 } 845 846 /* Force enable xmon if not already enabled */ 847 static inline void force_enable_xmon(void) 848 { 849 /* Enable xmon hooks if needed */ 850 if (!xmon_on) { 851 printf("xmon: Enabling debugger hooks\n"); 852 xmon_on = 1; 853 } 854 } 855 856 static struct bpt *at_breakpoint(unsigned long pc) 857 { 858 int i; 859 struct bpt *bp; 860 861 bp = bpts; 862 for (i = 0; i < NBPTS; ++i, ++bp) 863 if (bp->enabled && pc == bp->address) 864 return bp; 865 return NULL; 866 } 867 868 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp) 869 { 870 unsigned long off; 871 872 off = nip - (unsigned long)bpt_table; 873 if (off >= sizeof(bpt_table)) 874 return NULL; 875 *offp = off & (BPT_SIZE - 1); 876 if (off & 3) 877 return NULL; 878 return bpts + (off / BPT_SIZE); 879 } 880 881 static struct bpt *new_breakpoint(unsigned long a) 882 { 883 struct bpt *bp; 884 885 a &= ~3UL; 886 bp = at_breakpoint(a); 887 if (bp) 888 return bp; 889 890 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 891 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) { 892 bp->address = a; 893 bp->instr = (void *)(bpt_table + ((bp - bpts) * BPT_WORDS)); 894 return bp; 895 } 896 } 897 898 printf("Sorry, no free breakpoints. Please clear one first.\n"); 899 return NULL; 900 } 901 902 static void insert_bpts(void) 903 { 904 int i; 905 struct ppc_inst instr, instr2; 906 struct bpt *bp, *bp2; 907 908 bp = bpts; 909 for (i = 0; i < NBPTS; ++i, ++bp) { 910 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0) 911 continue; 912 if (!mread_instr(bp->address, &instr)) { 913 printf("Couldn't read instruction at %lx, " 914 "disabling breakpoint there\n", bp->address); 915 bp->enabled = 0; 916 continue; 917 } 918 if (IS_MTMSRD(instr) || IS_RFID(instr)) { 919 printf("Breakpoint at %lx is on an mtmsrd or rfid " 920 "instruction, disabling it\n", bp->address); 921 bp->enabled = 0; 922 continue; 923 } 924 /* 925 * Check the address is not a suffix by looking for a prefix in 926 * front of it. 927 */ 928 if (mread_instr(bp->address - 4, &instr2) == 8) { 929 printf("Breakpoint at %lx is on the second word of a prefixed instruction, disabling it\n", 930 bp->address); 931 bp->enabled = 0; 932 continue; 933 } 934 /* 935 * We might still be a suffix - if the prefix has already been 936 * replaced by a breakpoint we won't catch it with the above 937 * test. 938 */ 939 bp2 = at_breakpoint(bp->address - 4); 940 if (bp2 && ppc_inst_prefixed(ppc_inst_read(bp2->instr))) { 941 printf("Breakpoint at %lx is on the second word of a prefixed instruction, disabling it\n", 942 bp->address); 943 bp->enabled = 0; 944 continue; 945 } 946 947 patch_instruction(bp->instr, instr); 948 patch_instruction(ppc_inst_next(bp->instr, &instr), 949 ppc_inst(bpinstr)); 950 if (bp->enabled & BP_CIABR) 951 continue; 952 if (patch_instruction((struct ppc_inst *)bp->address, 953 ppc_inst(bpinstr)) != 0) { 954 printf("Couldn't write instruction at %lx, " 955 "disabling breakpoint there\n", bp->address); 956 bp->enabled &= ~BP_TRAP; 957 continue; 958 } 959 } 960 } 961 962 static void insert_cpu_bpts(void) 963 { 964 int i; 965 struct arch_hw_breakpoint brk; 966 967 for (i = 0; i < nr_wp_slots(); i++) { 968 if (dabr[i].enabled) { 969 brk.address = dabr[i].address; 970 brk.type = (dabr[i].enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL; 971 brk.len = 8; 972 brk.hw_len = 8; 973 __set_breakpoint(i, &brk); 974 } 975 } 976 977 if (iabr) 978 set_ciabr(iabr->address); 979 } 980 981 static void remove_bpts(void) 982 { 983 int i; 984 struct bpt *bp; 985 struct ppc_inst instr; 986 987 bp = bpts; 988 for (i = 0; i < NBPTS; ++i, ++bp) { 989 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) 990 continue; 991 if (mread_instr(bp->address, &instr) 992 && ppc_inst_equal(instr, ppc_inst(bpinstr)) 993 && patch_instruction( 994 (struct ppc_inst *)bp->address, ppc_inst_read(bp->instr)) != 0) 995 printf("Couldn't remove breakpoint at %lx\n", 996 bp->address); 997 } 998 } 999 1000 static void remove_cpu_bpts(void) 1001 { 1002 hw_breakpoint_disable(); 1003 write_ciabr(0); 1004 } 1005 1006 /* Based on uptime_proc_show(). */ 1007 static void 1008 show_uptime(void) 1009 { 1010 struct timespec64 uptime; 1011 1012 if (setjmp(bus_error_jmp) == 0) { 1013 catch_memory_errors = 1; 1014 sync(); 1015 1016 ktime_get_coarse_boottime_ts64(&uptime); 1017 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec, 1018 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100))); 1019 1020 sync(); 1021 __delay(200); \ 1022 } 1023 catch_memory_errors = 0; 1024 } 1025 1026 static void set_lpp_cmd(void) 1027 { 1028 unsigned long lpp; 1029 1030 if (!scanhex(&lpp)) { 1031 printf("Invalid number.\n"); 1032 lpp = 0; 1033 } 1034 xmon_set_pagination_lpp(lpp); 1035 } 1036 /* Command interpreting routine */ 1037 static char *last_cmd; 1038 1039 static int 1040 cmds(struct pt_regs *excp) 1041 { 1042 int cmd = 0; 1043 1044 last_cmd = NULL; 1045 xmon_regs = excp; 1046 1047 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1048 1049 for(;;) { 1050 #ifdef CONFIG_SMP 1051 printf("%x:", smp_processor_id()); 1052 #endif /* CONFIG_SMP */ 1053 printf("mon> "); 1054 flush_input(); 1055 termch = 0; 1056 cmd = skipbl(); 1057 if( cmd == '\n' ) { 1058 if (last_cmd == NULL) 1059 continue; 1060 take_input(last_cmd); 1061 last_cmd = NULL; 1062 cmd = inchar(); 1063 } 1064 switch (cmd) { 1065 case 'm': 1066 cmd = inchar(); 1067 switch (cmd) { 1068 case 'm': 1069 case 's': 1070 case 'd': 1071 memops(cmd); 1072 break; 1073 case 'l': 1074 memlocate(); 1075 break; 1076 case 'z': 1077 if (xmon_is_ro) { 1078 printf(xmon_ro_msg); 1079 break; 1080 } 1081 memzcan(); 1082 break; 1083 case 'i': 1084 show_mem(0, NULL); 1085 break; 1086 default: 1087 termch = cmd; 1088 memex(); 1089 } 1090 break; 1091 case 'd': 1092 dump(); 1093 break; 1094 case 'l': 1095 symbol_lookup(); 1096 break; 1097 case 'r': 1098 prregs(excp); /* print regs */ 1099 break; 1100 case 'e': 1101 excprint(excp); 1102 break; 1103 case 'S': 1104 super_regs(); 1105 break; 1106 case 't': 1107 backtrace(excp); 1108 break; 1109 case 'f': 1110 cacheflush(); 1111 break; 1112 case 's': 1113 if (do_spu_cmd() == 0) 1114 break; 1115 if (do_step(excp)) 1116 return cmd; 1117 break; 1118 case 'x': 1119 case 'X': 1120 if (tracing_enabled) 1121 tracing_on(); 1122 return cmd; 1123 case EOF: 1124 printf(" <no input ...>\n"); 1125 mdelay(2000); 1126 return cmd; 1127 case '?': 1128 xmon_puts(help_string); 1129 break; 1130 case '#': 1131 set_lpp_cmd(); 1132 break; 1133 case 'b': 1134 bpt_cmds(); 1135 break; 1136 case 'C': 1137 csum(); 1138 break; 1139 case 'c': 1140 if (cpu_cmd()) 1141 return 0; 1142 break; 1143 case 'z': 1144 bootcmds(); 1145 break; 1146 case 'p': 1147 if (xmon_is_ro) { 1148 printf(xmon_ro_msg); 1149 break; 1150 } 1151 proccall(); 1152 break; 1153 case 'P': 1154 show_tasks(); 1155 break; 1156 #ifdef CONFIG_PPC_BOOK3S 1157 case 'u': 1158 dump_segments(); 1159 break; 1160 #elif defined(CONFIG_44x) 1161 case 'u': 1162 dump_tlb_44x(); 1163 break; 1164 #elif defined(CONFIG_PPC_BOOK3E) 1165 case 'u': 1166 dump_tlb_book3e(); 1167 break; 1168 #endif 1169 case 'U': 1170 show_uptime(); 1171 break; 1172 default: 1173 printf("Unrecognized command: "); 1174 do { 1175 if (' ' < cmd && cmd <= '~') 1176 putchar(cmd); 1177 else 1178 printf("\\x%x", cmd); 1179 cmd = inchar(); 1180 } while (cmd != '\n'); 1181 printf(" (type ? for help)\n"); 1182 break; 1183 } 1184 } 1185 } 1186 1187 #ifdef CONFIG_BOOKE 1188 static int do_step(struct pt_regs *regs) 1189 { 1190 regs->msr |= MSR_DE; 1191 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 1192 return 1; 1193 } 1194 #else 1195 /* 1196 * Step a single instruction. 1197 * Some instructions we emulate, others we execute with MSR_SE set. 1198 */ 1199 static int do_step(struct pt_regs *regs) 1200 { 1201 struct ppc_inst instr; 1202 int stepped; 1203 1204 force_enable_xmon(); 1205 /* check we are in 64-bit kernel mode, translation enabled */ 1206 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { 1207 if (mread_instr(regs->nip, &instr)) { 1208 stepped = emulate_step(regs, instr); 1209 if (stepped < 0) { 1210 printf("Couldn't single-step %s instruction\n", 1211 (IS_RFID(instr)? "rfid": "mtmsrd")); 1212 return 0; 1213 } 1214 if (stepped > 0) { 1215 set_trap(regs, 0xd00); 1216 printf("stepped to "); 1217 xmon_print_symbol(regs->nip, " ", "\n"); 1218 ppc_inst_dump(regs->nip, 1, 0); 1219 return 0; 1220 } 1221 } 1222 } 1223 regs->msr |= MSR_SE; 1224 return 1; 1225 } 1226 #endif 1227 1228 static void bootcmds(void) 1229 { 1230 char tmp[64]; 1231 int cmd; 1232 1233 cmd = inchar(); 1234 if (cmd == 'r') { 1235 getstring(tmp, 64); 1236 ppc_md.restart(tmp); 1237 } else if (cmd == 'h') { 1238 ppc_md.halt(); 1239 } else if (cmd == 'p') { 1240 if (pm_power_off) 1241 pm_power_off(); 1242 } 1243 } 1244 1245 static int cpu_cmd(void) 1246 { 1247 #ifdef CONFIG_SMP 1248 unsigned long cpu, first_cpu, last_cpu; 1249 int timeout; 1250 1251 if (!scanhex(&cpu)) { 1252 /* print cpus waiting or in xmon */ 1253 printf("cpus stopped:"); 1254 last_cpu = first_cpu = NR_CPUS; 1255 for_each_possible_cpu(cpu) { 1256 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1257 if (cpu == last_cpu + 1) { 1258 last_cpu = cpu; 1259 } else { 1260 if (last_cpu != first_cpu) 1261 printf("-0x%lx", last_cpu); 1262 last_cpu = first_cpu = cpu; 1263 printf(" 0x%lx", cpu); 1264 } 1265 } 1266 } 1267 if (last_cpu != first_cpu) 1268 printf("-0x%lx", last_cpu); 1269 printf("\n"); 1270 return 0; 1271 } 1272 /* try to switch to cpu specified */ 1273 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1274 printf("cpu 0x%lx isn't in xmon\n", cpu); 1275 #ifdef CONFIG_PPC64 1276 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu); 1277 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0); 1278 #endif 1279 return 0; 1280 } 1281 xmon_taken = 0; 1282 mb(); 1283 xmon_owner = cpu; 1284 timeout = 10000000; 1285 while (!xmon_taken) { 1286 if (--timeout == 0) { 1287 if (test_and_set_bit(0, &xmon_taken)) 1288 break; 1289 /* take control back */ 1290 mb(); 1291 xmon_owner = smp_processor_id(); 1292 printf("cpu 0x%lx didn't take control\n", cpu); 1293 return 0; 1294 } 1295 barrier(); 1296 } 1297 return 1; 1298 #else 1299 return 0; 1300 #endif /* CONFIG_SMP */ 1301 } 1302 1303 static unsigned short fcstab[256] = { 1304 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 1305 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, 1306 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 1307 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, 1308 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, 1309 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, 1310 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, 1311 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, 1312 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, 1313 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, 1314 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, 1315 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, 1316 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, 1317 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, 1318 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, 1319 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, 1320 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, 1321 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, 1322 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, 1323 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, 1324 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, 1325 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, 1326 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, 1327 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, 1328 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, 1329 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, 1330 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, 1331 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, 1332 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, 1333 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, 1334 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, 1335 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 1336 }; 1337 1338 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) 1339 1340 static void 1341 csum(void) 1342 { 1343 unsigned int i; 1344 unsigned short fcs; 1345 unsigned char v; 1346 1347 if (!scanhex(&adrs)) 1348 return; 1349 if (!scanhex(&ncsum)) 1350 return; 1351 fcs = 0xffff; 1352 for (i = 0; i < ncsum; ++i) { 1353 if (mread(adrs+i, &v, 1) == 0) { 1354 printf("csum stopped at "REG"\n", adrs+i); 1355 break; 1356 } 1357 fcs = FCS(fcs, v); 1358 } 1359 printf("%x\n", fcs); 1360 } 1361 1362 /* 1363 * Check if this is a suitable place to put a breakpoint. 1364 */ 1365 static long check_bp_loc(unsigned long addr) 1366 { 1367 struct ppc_inst instr; 1368 1369 addr &= ~3; 1370 if (!is_kernel_addr(addr)) { 1371 printf("Breakpoints may only be placed at kernel addresses\n"); 1372 return 0; 1373 } 1374 if (!mread_instr(addr, &instr)) { 1375 printf("Can't read instruction at address %lx\n", addr); 1376 return 0; 1377 } 1378 if (IS_MTMSRD(instr) || IS_RFID(instr)) { 1379 printf("Breakpoints may not be placed on mtmsrd or rfid " 1380 "instructions\n"); 1381 return 0; 1382 } 1383 return 1; 1384 } 1385 1386 #ifndef CONFIG_PPC_8xx 1387 static int find_free_data_bpt(void) 1388 { 1389 int i; 1390 1391 for (i = 0; i < nr_wp_slots(); i++) { 1392 if (!dabr[i].enabled) 1393 return i; 1394 } 1395 printf("Couldn't find free breakpoint register\n"); 1396 return -1; 1397 } 1398 #endif 1399 1400 static void print_data_bpts(void) 1401 { 1402 int i; 1403 1404 for (i = 0; i < nr_wp_slots(); i++) { 1405 if (!dabr[i].enabled) 1406 continue; 1407 1408 printf(" data "REG" [", dabr[i].address); 1409 if (dabr[i].enabled & 1) 1410 printf("r"); 1411 if (dabr[i].enabled & 2) 1412 printf("w"); 1413 printf("]\n"); 1414 } 1415 } 1416 1417 static char *breakpoint_help_string = 1418 "Breakpoint command usage:\n" 1419 "b show breakpoints\n" 1420 "b <addr> [cnt] set breakpoint at given instr addr\n" 1421 "bc clear all breakpoints\n" 1422 "bc <n/addr> clear breakpoint number n or at addr\n" 1423 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n" 1424 "bd <addr> [cnt] set hardware data breakpoint\n" 1425 ""; 1426 1427 static void 1428 bpt_cmds(void) 1429 { 1430 int cmd; 1431 unsigned long a; 1432 int i; 1433 struct bpt *bp; 1434 1435 cmd = inchar(); 1436 1437 switch (cmd) { 1438 #ifndef CONFIG_PPC_8xx 1439 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n"; 1440 int mode; 1441 case 'd': /* bd - hardware data breakpoint */ 1442 if (xmon_is_ro) { 1443 printf(xmon_ro_msg); 1444 break; 1445 } 1446 if (!ppc_breakpoint_available()) { 1447 printf("Hardware data breakpoint not supported on this cpu\n"); 1448 break; 1449 } 1450 i = find_free_data_bpt(); 1451 if (i < 0) 1452 break; 1453 mode = 7; 1454 cmd = inchar(); 1455 if (cmd == 'r') 1456 mode = 5; 1457 else if (cmd == 'w') 1458 mode = 6; 1459 else 1460 termch = cmd; 1461 dabr[i].address = 0; 1462 dabr[i].enabled = 0; 1463 if (scanhex(&dabr[i].address)) { 1464 if (!is_kernel_addr(dabr[i].address)) { 1465 printf(badaddr); 1466 break; 1467 } 1468 dabr[i].address &= ~HW_BRK_TYPE_DABR; 1469 dabr[i].enabled = mode | BP_DABR; 1470 } 1471 1472 force_enable_xmon(); 1473 break; 1474 1475 case 'i': /* bi - hardware instr breakpoint */ 1476 if (xmon_is_ro) { 1477 printf(xmon_ro_msg); 1478 break; 1479 } 1480 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) { 1481 printf("Hardware instruction breakpoint " 1482 "not supported on this cpu\n"); 1483 break; 1484 } 1485 if (iabr) { 1486 iabr->enabled &= ~BP_CIABR; 1487 iabr = NULL; 1488 } 1489 if (!scanhex(&a)) 1490 break; 1491 if (!check_bp_loc(a)) 1492 break; 1493 bp = new_breakpoint(a); 1494 if (bp != NULL) { 1495 bp->enabled |= BP_CIABR; 1496 iabr = bp; 1497 force_enable_xmon(); 1498 } 1499 break; 1500 #endif 1501 1502 case 'c': 1503 if (!scanhex(&a)) { 1504 /* clear all breakpoints */ 1505 for (i = 0; i < NBPTS; ++i) 1506 bpts[i].enabled = 0; 1507 iabr = NULL; 1508 for (i = 0; i < nr_wp_slots(); i++) 1509 dabr[i].enabled = 0; 1510 1511 printf("All breakpoints cleared\n"); 1512 break; 1513 } 1514 1515 if (a <= NBPTS && a >= 1) { 1516 /* assume a breakpoint number */ 1517 bp = &bpts[a-1]; /* bp nums are 1 based */ 1518 } else { 1519 /* assume a breakpoint address */ 1520 bp = at_breakpoint(a); 1521 if (bp == NULL) { 1522 printf("No breakpoint at %lx\n", a); 1523 break; 1524 } 1525 } 1526 1527 printf("Cleared breakpoint %tx (", BP_NUM(bp)); 1528 xmon_print_symbol(bp->address, " ", ")\n"); 1529 bp->enabled = 0; 1530 break; 1531 1532 default: 1533 termch = cmd; 1534 cmd = skipbl(); 1535 if (cmd == '?') { 1536 printf(breakpoint_help_string); 1537 break; 1538 } 1539 termch = cmd; 1540 1541 if (xmon_is_ro || !scanhex(&a)) { 1542 /* print all breakpoints */ 1543 printf(" type address\n"); 1544 print_data_bpts(); 1545 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 1546 if (!bp->enabled) 1547 continue; 1548 printf("%tx %s ", BP_NUM(bp), 1549 (bp->enabled & BP_CIABR) ? "inst": "trap"); 1550 xmon_print_symbol(bp->address, " ", "\n"); 1551 } 1552 break; 1553 } 1554 1555 if (!check_bp_loc(a)) 1556 break; 1557 bp = new_breakpoint(a); 1558 if (bp != NULL) { 1559 bp->enabled |= BP_TRAP; 1560 force_enable_xmon(); 1561 } 1562 break; 1563 } 1564 } 1565 1566 /* Very cheap human name for vector lookup. */ 1567 static 1568 const char *getvecname(unsigned long vec) 1569 { 1570 char *ret; 1571 1572 switch (vec) { 1573 case 0x100: ret = "(System Reset)"; break; 1574 case 0x200: ret = "(Machine Check)"; break; 1575 case 0x300: ret = "(Data Access)"; break; 1576 case 0x380: 1577 if (radix_enabled()) 1578 ret = "(Data Access Out of Range)"; 1579 else 1580 ret = "(Data SLB Access)"; 1581 break; 1582 case 0x400: ret = "(Instruction Access)"; break; 1583 case 0x480: 1584 if (radix_enabled()) 1585 ret = "(Instruction Access Out of Range)"; 1586 else 1587 ret = "(Instruction SLB Access)"; 1588 break; 1589 case 0x500: ret = "(Hardware Interrupt)"; break; 1590 case 0x600: ret = "(Alignment)"; break; 1591 case 0x700: ret = "(Program Check)"; break; 1592 case 0x800: ret = "(FPU Unavailable)"; break; 1593 case 0x900: ret = "(Decrementer)"; break; 1594 case 0x980: ret = "(Hypervisor Decrementer)"; break; 1595 case 0xa00: ret = "(Doorbell)"; break; 1596 case 0xc00: ret = "(System Call)"; break; 1597 case 0xd00: ret = "(Single Step)"; break; 1598 case 0xe40: ret = "(Emulation Assist)"; break; 1599 case 0xe60: ret = "(HMI)"; break; 1600 case 0xe80: ret = "(Hypervisor Doorbell)"; break; 1601 case 0xf00: ret = "(Performance Monitor)"; break; 1602 case 0xf20: ret = "(Altivec Unavailable)"; break; 1603 case 0x1300: ret = "(Instruction Breakpoint)"; break; 1604 case 0x1500: ret = "(Denormalisation)"; break; 1605 case 0x1700: ret = "(Altivec Assist)"; break; 1606 case 0x3000: ret = "(System Call Vectored)"; break; 1607 default: ret = ""; 1608 } 1609 return ret; 1610 } 1611 1612 static void get_function_bounds(unsigned long pc, unsigned long *startp, 1613 unsigned long *endp) 1614 { 1615 unsigned long size, offset; 1616 const char *name; 1617 1618 *startp = *endp = 0; 1619 if (pc == 0) 1620 return; 1621 if (setjmp(bus_error_jmp) == 0) { 1622 catch_memory_errors = 1; 1623 sync(); 1624 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr); 1625 if (name != NULL) { 1626 *startp = pc - offset; 1627 *endp = pc - offset + size; 1628 } 1629 sync(); 1630 } 1631 catch_memory_errors = 0; 1632 } 1633 1634 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long)) 1635 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long)) 1636 1637 static void xmon_show_stack(unsigned long sp, unsigned long lr, 1638 unsigned long pc) 1639 { 1640 int max_to_print = 64; 1641 unsigned long ip; 1642 unsigned long newsp; 1643 unsigned long marker; 1644 struct pt_regs regs; 1645 1646 while (max_to_print--) { 1647 if (!is_kernel_addr(sp)) { 1648 if (sp != 0) 1649 printf("SP (%lx) is in userspace\n", sp); 1650 break; 1651 } 1652 1653 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long)) 1654 || !mread(sp, &newsp, sizeof(unsigned long))) { 1655 printf("Couldn't read stack frame at %lx\n", sp); 1656 break; 1657 } 1658 1659 /* 1660 * For the first stack frame, try to work out if 1661 * LR and/or the saved LR value in the bottommost 1662 * stack frame are valid. 1663 */ 1664 if ((pc | lr) != 0) { 1665 unsigned long fnstart, fnend; 1666 unsigned long nextip; 1667 int printip = 1; 1668 1669 get_function_bounds(pc, &fnstart, &fnend); 1670 nextip = 0; 1671 if (newsp > sp) 1672 mread(newsp + LRSAVE_OFFSET, &nextip, 1673 sizeof(unsigned long)); 1674 if (lr == ip) { 1675 if (!is_kernel_addr(lr) 1676 || (fnstart <= lr && lr < fnend)) 1677 printip = 0; 1678 } else if (lr == nextip) { 1679 printip = 0; 1680 } else if (is_kernel_addr(lr) 1681 && !(fnstart <= lr && lr < fnend)) { 1682 printf("[link register ] "); 1683 xmon_print_symbol(lr, " ", "\n"); 1684 } 1685 if (printip) { 1686 printf("["REG"] ", sp); 1687 xmon_print_symbol(ip, " ", " (unreliable)\n"); 1688 } 1689 pc = lr = 0; 1690 1691 } else { 1692 printf("["REG"] ", sp); 1693 xmon_print_symbol(ip, " ", "\n"); 1694 } 1695 1696 /* Look for "regshere" marker to see if this is 1697 an exception frame. */ 1698 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long)) 1699 && marker == STACK_FRAME_REGS_MARKER) { 1700 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs)) 1701 != sizeof(regs)) { 1702 printf("Couldn't read registers at %lx\n", 1703 sp + STACK_FRAME_OVERHEAD); 1704 break; 1705 } 1706 printf("--- Exception: %lx %s at ", regs.trap, 1707 getvecname(TRAP(®s))); 1708 pc = regs.nip; 1709 lr = regs.link; 1710 xmon_print_symbol(pc, " ", "\n"); 1711 } 1712 1713 if (newsp == 0) 1714 break; 1715 1716 sp = newsp; 1717 } 1718 } 1719 1720 static void backtrace(struct pt_regs *excp) 1721 { 1722 unsigned long sp; 1723 1724 if (scanhex(&sp)) 1725 xmon_show_stack(sp, 0, 0); 1726 else 1727 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1728 scannl(); 1729 } 1730 1731 static void print_bug_trap(struct pt_regs *regs) 1732 { 1733 #ifdef CONFIG_BUG 1734 const struct bug_entry *bug; 1735 unsigned long addr; 1736 1737 if (regs->msr & MSR_PR) 1738 return; /* not in kernel */ 1739 addr = regs->nip; /* address of trap instruction */ 1740 if (!is_kernel_addr(addr)) 1741 return; 1742 bug = find_bug(regs->nip); 1743 if (bug == NULL) 1744 return; 1745 if (is_warning_bug(bug)) 1746 return; 1747 1748 #ifdef CONFIG_DEBUG_BUGVERBOSE 1749 printf("kernel BUG at %s:%u!\n", 1750 (char *)bug + bug->file_disp, bug->line); 1751 #else 1752 printf("kernel BUG at %px!\n", (void *)bug + bug->bug_addr_disp); 1753 #endif 1754 #endif /* CONFIG_BUG */ 1755 } 1756 1757 static void excprint(struct pt_regs *fp) 1758 { 1759 unsigned long trap; 1760 1761 #ifdef CONFIG_SMP 1762 printf("cpu 0x%x: ", smp_processor_id()); 1763 #endif /* CONFIG_SMP */ 1764 1765 trap = TRAP(fp); 1766 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp); 1767 printf(" pc: "); 1768 xmon_print_symbol(fp->nip, ": ", "\n"); 1769 1770 printf(" lr: "); 1771 xmon_print_symbol(fp->link, ": ", "\n"); 1772 1773 printf(" sp: %lx\n", fp->gpr[1]); 1774 printf(" msr: %lx\n", fp->msr); 1775 1776 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) { 1777 printf(" dar: %lx\n", fp->dar); 1778 if (trap != 0x380) 1779 printf(" dsisr: %lx\n", fp->dsisr); 1780 } 1781 1782 printf(" current = 0x%px\n", current); 1783 #ifdef CONFIG_PPC64 1784 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n", 1785 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened); 1786 #endif 1787 if (current) { 1788 printf(" pid = %d, comm = %s\n", 1789 current->pid, current->comm); 1790 } 1791 1792 if (trap == 0x700) 1793 print_bug_trap(fp); 1794 1795 printf(linux_banner); 1796 } 1797 1798 static void prregs(struct pt_regs *fp) 1799 { 1800 int n, trap; 1801 unsigned long base; 1802 struct pt_regs regs; 1803 1804 if (scanhex(&base)) { 1805 if (setjmp(bus_error_jmp) == 0) { 1806 catch_memory_errors = 1; 1807 sync(); 1808 regs = *(struct pt_regs *)base; 1809 sync(); 1810 __delay(200); 1811 } else { 1812 catch_memory_errors = 0; 1813 printf("*** Error reading registers from "REG"\n", 1814 base); 1815 return; 1816 } 1817 catch_memory_errors = 0; 1818 fp = ®s; 1819 } 1820 1821 #ifdef CONFIG_PPC64 1822 if (FULL_REGS(fp)) { 1823 for (n = 0; n < 16; ++n) 1824 printf("R%.2d = "REG" R%.2d = "REG"\n", 1825 n, fp->gpr[n], n+16, fp->gpr[n+16]); 1826 } else { 1827 for (n = 0; n < 7; ++n) 1828 printf("R%.2d = "REG" R%.2d = "REG"\n", 1829 n, fp->gpr[n], n+7, fp->gpr[n+7]); 1830 } 1831 #else 1832 for (n = 0; n < 32; ++n) { 1833 printf("R%.2d = %.8lx%s", n, fp->gpr[n], 1834 (n & 3) == 3? "\n": " "); 1835 if (n == 12 && !FULL_REGS(fp)) { 1836 printf("\n"); 1837 break; 1838 } 1839 } 1840 #endif 1841 printf("pc = "); 1842 xmon_print_symbol(fp->nip, " ", "\n"); 1843 if (!trap_is_syscall(fp) && cpu_has_feature(CPU_FTR_CFAR)) { 1844 printf("cfar= "); 1845 xmon_print_symbol(fp->orig_gpr3, " ", "\n"); 1846 } 1847 printf("lr = "); 1848 xmon_print_symbol(fp->link, " ", "\n"); 1849 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr); 1850 printf("ctr = "REG" xer = "REG" trap = %4lx\n", 1851 fp->ctr, fp->xer, fp->trap); 1852 trap = TRAP(fp); 1853 if (trap == 0x300 || trap == 0x380 || trap == 0x600) 1854 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); 1855 } 1856 1857 static void cacheflush(void) 1858 { 1859 int cmd; 1860 unsigned long nflush; 1861 1862 cmd = inchar(); 1863 if (cmd != 'i') 1864 termch = cmd; 1865 scanhex((void *)&adrs); 1866 if (termch != '\n') 1867 termch = 0; 1868 nflush = 1; 1869 scanhex(&nflush); 1870 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES; 1871 if (setjmp(bus_error_jmp) == 0) { 1872 catch_memory_errors = 1; 1873 sync(); 1874 1875 if (cmd != 'i' || IS_ENABLED(CONFIG_PPC_BOOK3S_64)) { 1876 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1877 cflush((void *) adrs); 1878 } else { 1879 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1880 cinval((void *) adrs); 1881 } 1882 sync(); 1883 /* wait a little while to see if we get a machine check */ 1884 __delay(200); 1885 } 1886 catch_memory_errors = 0; 1887 } 1888 1889 extern unsigned long xmon_mfspr(int spr, unsigned long default_value); 1890 extern void xmon_mtspr(int spr, unsigned long value); 1891 1892 static int 1893 read_spr(int n, unsigned long *vp) 1894 { 1895 unsigned long ret = -1UL; 1896 int ok = 0; 1897 1898 if (setjmp(bus_error_jmp) == 0) { 1899 catch_spr_faults = 1; 1900 sync(); 1901 1902 ret = xmon_mfspr(n, *vp); 1903 1904 sync(); 1905 *vp = ret; 1906 ok = 1; 1907 } 1908 catch_spr_faults = 0; 1909 1910 return ok; 1911 } 1912 1913 static void 1914 write_spr(int n, unsigned long val) 1915 { 1916 if (xmon_is_ro) { 1917 printf(xmon_ro_msg); 1918 return; 1919 } 1920 1921 if (setjmp(bus_error_jmp) == 0) { 1922 catch_spr_faults = 1; 1923 sync(); 1924 1925 xmon_mtspr(n, val); 1926 1927 sync(); 1928 } else { 1929 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n); 1930 } 1931 catch_spr_faults = 0; 1932 } 1933 1934 static void dump_206_sprs(void) 1935 { 1936 #ifdef CONFIG_PPC64 1937 if (!cpu_has_feature(CPU_FTR_ARCH_206)) 1938 return; 1939 1940 /* Actually some of these pre-date 2.06, but whatevs */ 1941 1942 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n", 1943 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR)); 1944 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n", 1945 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR)); 1946 printf("amr = %.16lx uamor = %.16lx\n", 1947 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR)); 1948 1949 if (!(mfmsr() & MSR_HV)) 1950 return; 1951 1952 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n", 1953 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR)); 1954 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n", 1955 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC)); 1956 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n", 1957 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID)); 1958 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n", 1959 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR)); 1960 printf("dabr = %.16lx dabrx = %.16lx\n", 1961 mfspr(SPRN_DABR), mfspr(SPRN_DABRX)); 1962 #endif 1963 } 1964 1965 static void dump_207_sprs(void) 1966 { 1967 #ifdef CONFIG_PPC64 1968 unsigned long msr; 1969 1970 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1971 return; 1972 1973 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n", 1974 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR)); 1975 1976 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n", 1977 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB)); 1978 1979 msr = mfmsr(); 1980 if (msr & MSR_TM) { 1981 /* Only if TM has been enabled in the kernel */ 1982 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n", 1983 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR), 1984 mfspr(SPRN_TEXASR)); 1985 } 1986 1987 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n", 1988 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2)); 1989 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n", 1990 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), 1991 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4)); 1992 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n", 1993 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5)); 1994 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n", 1995 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6)); 1996 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n", 1997 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR)); 1998 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR)); 1999 2000 if (!(msr & MSR_HV)) 2001 return; 2002 2003 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n", 2004 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR)); 2005 printf("dawr0 = %.16lx dawrx0 = %.16lx\n", 2006 mfspr(SPRN_DAWR0), mfspr(SPRN_DAWRX0)); 2007 if (nr_wp_slots() > 1) { 2008 printf("dawr1 = %.16lx dawrx1 = %.16lx\n", 2009 mfspr(SPRN_DAWR1), mfspr(SPRN_DAWRX1)); 2010 } 2011 printf("ciabr = %.16lx\n", mfspr(SPRN_CIABR)); 2012 #endif 2013 } 2014 2015 static void dump_300_sprs(void) 2016 { 2017 #ifdef CONFIG_PPC64 2018 bool hv = mfmsr() & MSR_HV; 2019 2020 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 2021 return; 2022 2023 printf("pidr = %.16lx tidr = %.16lx\n", 2024 mfspr(SPRN_PID), mfspr(SPRN_TIDR)); 2025 printf("psscr = %.16lx\n", 2026 hv ? mfspr(SPRN_PSSCR) : mfspr(SPRN_PSSCR_PR)); 2027 2028 if (!hv) 2029 return; 2030 2031 printf("ptcr = %.16lx asdr = %.16lx\n", 2032 mfspr(SPRN_PTCR), mfspr(SPRN_ASDR)); 2033 #endif 2034 } 2035 2036 static void dump_310_sprs(void) 2037 { 2038 #ifdef CONFIG_PPC64 2039 if (!cpu_has_feature(CPU_FTR_ARCH_31)) 2040 return; 2041 2042 printf("mmcr3 = %.16lx, sier2 = %.16lx, sier3 = %.16lx\n", 2043 mfspr(SPRN_MMCR3), mfspr(SPRN_SIER2), mfspr(SPRN_SIER3)); 2044 2045 #endif 2046 } 2047 2048 static void dump_one_spr(int spr, bool show_unimplemented) 2049 { 2050 unsigned long val; 2051 2052 val = 0xdeadbeef; 2053 if (!read_spr(spr, &val)) { 2054 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 2055 return; 2056 } 2057 2058 if (val == 0xdeadbeef) { 2059 /* Looks like read was a nop, confirm */ 2060 val = 0x0badcafe; 2061 if (!read_spr(spr, &val)) { 2062 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 2063 return; 2064 } 2065 2066 if (val == 0x0badcafe) { 2067 if (show_unimplemented) 2068 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr); 2069 return; 2070 } 2071 } 2072 2073 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val); 2074 } 2075 2076 static void super_regs(void) 2077 { 2078 static unsigned long regno; 2079 int cmd; 2080 int spr; 2081 2082 cmd = skipbl(); 2083 2084 switch (cmd) { 2085 case '\n': { 2086 unsigned long sp, toc; 2087 asm("mr %0,1" : "=r" (sp) :); 2088 asm("mr %0,2" : "=r" (toc) :); 2089 2090 printf("msr = "REG" sprg0 = "REG"\n", 2091 mfmsr(), mfspr(SPRN_SPRG0)); 2092 printf("pvr = "REG" sprg1 = "REG"\n", 2093 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); 2094 printf("dec = "REG" sprg2 = "REG"\n", 2095 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); 2096 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3)); 2097 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR)); 2098 2099 dump_206_sprs(); 2100 dump_207_sprs(); 2101 dump_300_sprs(); 2102 dump_310_sprs(); 2103 2104 return; 2105 } 2106 case 'w': { 2107 unsigned long val; 2108 scanhex(®no); 2109 val = 0; 2110 read_spr(regno, &val); 2111 scanhex(&val); 2112 write_spr(regno, val); 2113 dump_one_spr(regno, true); 2114 break; 2115 } 2116 case 'r': 2117 scanhex(®no); 2118 dump_one_spr(regno, true); 2119 break; 2120 case 'a': 2121 /* dump ALL SPRs */ 2122 for (spr = 1; spr < 1024; ++spr) 2123 dump_one_spr(spr, false); 2124 break; 2125 } 2126 2127 scannl(); 2128 } 2129 2130 /* 2131 * Stuff for reading and writing memory safely 2132 */ 2133 static int 2134 mread(unsigned long adrs, void *buf, int size) 2135 { 2136 volatile int n; 2137 char *p, *q; 2138 2139 n = 0; 2140 if (setjmp(bus_error_jmp) == 0) { 2141 catch_memory_errors = 1; 2142 sync(); 2143 p = (char *)adrs; 2144 q = (char *)buf; 2145 switch (size) { 2146 case 2: 2147 *(u16 *)q = *(u16 *)p; 2148 break; 2149 case 4: 2150 *(u32 *)q = *(u32 *)p; 2151 break; 2152 case 8: 2153 *(u64 *)q = *(u64 *)p; 2154 break; 2155 default: 2156 for( ; n < size; ++n) { 2157 *q++ = *p++; 2158 sync(); 2159 } 2160 } 2161 sync(); 2162 /* wait a little while to see if we get a machine check */ 2163 __delay(200); 2164 n = size; 2165 } 2166 catch_memory_errors = 0; 2167 return n; 2168 } 2169 2170 static int 2171 mwrite(unsigned long adrs, void *buf, int size) 2172 { 2173 volatile int n; 2174 char *p, *q; 2175 2176 n = 0; 2177 2178 if (xmon_is_ro) { 2179 printf(xmon_ro_msg); 2180 return n; 2181 } 2182 2183 if (setjmp(bus_error_jmp) == 0) { 2184 catch_memory_errors = 1; 2185 sync(); 2186 p = (char *) adrs; 2187 q = (char *) buf; 2188 switch (size) { 2189 case 2: 2190 *(u16 *)p = *(u16 *)q; 2191 break; 2192 case 4: 2193 *(u32 *)p = *(u32 *)q; 2194 break; 2195 case 8: 2196 *(u64 *)p = *(u64 *)q; 2197 break; 2198 default: 2199 for ( ; n < size; ++n) { 2200 *p++ = *q++; 2201 sync(); 2202 } 2203 } 2204 sync(); 2205 /* wait a little while to see if we get a machine check */ 2206 __delay(200); 2207 n = size; 2208 } else { 2209 printf("*** Error writing address "REG"\n", adrs + n); 2210 } 2211 catch_memory_errors = 0; 2212 return n; 2213 } 2214 2215 static int 2216 mread_instr(unsigned long adrs, struct ppc_inst *instr) 2217 { 2218 volatile int n; 2219 2220 n = 0; 2221 if (setjmp(bus_error_jmp) == 0) { 2222 catch_memory_errors = 1; 2223 sync(); 2224 *instr = ppc_inst_read((struct ppc_inst *)adrs); 2225 sync(); 2226 /* wait a little while to see if we get a machine check */ 2227 __delay(200); 2228 n = ppc_inst_len(*instr); 2229 } 2230 catch_memory_errors = 0; 2231 return n; 2232 } 2233 2234 static int fault_type; 2235 static int fault_except; 2236 static char *fault_chars[] = { "--", "**", "##" }; 2237 2238 static int handle_fault(struct pt_regs *regs) 2239 { 2240 fault_except = TRAP(regs); 2241 switch (TRAP(regs)) { 2242 case 0x200: 2243 fault_type = 0; 2244 break; 2245 case 0x300: 2246 case 0x380: 2247 fault_type = 1; 2248 break; 2249 default: 2250 fault_type = 2; 2251 } 2252 2253 longjmp(bus_error_jmp, 1); 2254 2255 return 0; 2256 } 2257 2258 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) 2259 2260 static void 2261 byterev(unsigned char *val, int size) 2262 { 2263 int t; 2264 2265 switch (size) { 2266 case 2: 2267 SWAP(val[0], val[1], t); 2268 break; 2269 case 4: 2270 SWAP(val[0], val[3], t); 2271 SWAP(val[1], val[2], t); 2272 break; 2273 case 8: /* is there really any use for this? */ 2274 SWAP(val[0], val[7], t); 2275 SWAP(val[1], val[6], t); 2276 SWAP(val[2], val[5], t); 2277 SWAP(val[3], val[4], t); 2278 break; 2279 } 2280 } 2281 2282 static int brev; 2283 static int mnoread; 2284 2285 static char *memex_help_string = 2286 "Memory examine command usage:\n" 2287 "m [addr] [flags] examine/change memory\n" 2288 " addr is optional. will start where left off.\n" 2289 " flags may include chars from this set:\n" 2290 " b modify by bytes (default)\n" 2291 " w modify by words (2 byte)\n" 2292 " l modify by longs (4 byte)\n" 2293 " d modify by doubleword (8 byte)\n" 2294 " r toggle reverse byte order mode\n" 2295 " n do not read memory (for i/o spaces)\n" 2296 " . ok to read (default)\n" 2297 "NOTE: flags are saved as defaults\n" 2298 ""; 2299 2300 static char *memex_subcmd_help_string = 2301 "Memory examine subcommands:\n" 2302 " hexval write this val to current location\n" 2303 " 'string' write chars from string to this location\n" 2304 " ' increment address\n" 2305 " ^ decrement address\n" 2306 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n" 2307 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n" 2308 " ` clear no-read flag\n" 2309 " ; stay at this addr\n" 2310 " v change to byte mode\n" 2311 " w change to word (2 byte) mode\n" 2312 " l change to long (4 byte) mode\n" 2313 " u change to doubleword (8 byte) mode\n" 2314 " m addr change current addr\n" 2315 " n toggle no-read flag\n" 2316 " r toggle byte reverse flag\n" 2317 " < count back up count bytes\n" 2318 " > count skip forward count bytes\n" 2319 " x exit this mode\n" 2320 ""; 2321 2322 static void 2323 memex(void) 2324 { 2325 int cmd, inc, i, nslash; 2326 unsigned long n; 2327 unsigned char val[16]; 2328 2329 scanhex((void *)&adrs); 2330 cmd = skipbl(); 2331 if (cmd == '?') { 2332 printf(memex_help_string); 2333 return; 2334 } else { 2335 termch = cmd; 2336 } 2337 last_cmd = "m\n"; 2338 while ((cmd = skipbl()) != '\n') { 2339 switch( cmd ){ 2340 case 'b': size = 1; break; 2341 case 'w': size = 2; break; 2342 case 'l': size = 4; break; 2343 case 'd': size = 8; break; 2344 case 'r': brev = !brev; break; 2345 case 'n': mnoread = 1; break; 2346 case '.': mnoread = 0; break; 2347 } 2348 } 2349 if( size <= 0 ) 2350 size = 1; 2351 else if( size > 8 ) 2352 size = 8; 2353 for(;;){ 2354 if (!mnoread) 2355 n = mread(adrs, val, size); 2356 printf(REG"%c", adrs, brev? 'r': ' '); 2357 if (!mnoread) { 2358 if (brev) 2359 byterev(val, size); 2360 putchar(' '); 2361 for (i = 0; i < n; ++i) 2362 printf("%.2x", val[i]); 2363 for (; i < size; ++i) 2364 printf("%s", fault_chars[fault_type]); 2365 } 2366 putchar(' '); 2367 inc = size; 2368 nslash = 0; 2369 for(;;){ 2370 if( scanhex(&n) ){ 2371 for (i = 0; i < size; ++i) 2372 val[i] = n >> (i * 8); 2373 if (!brev) 2374 byterev(val, size); 2375 mwrite(adrs, val, size); 2376 inc = size; 2377 } 2378 cmd = skipbl(); 2379 if (cmd == '\n') 2380 break; 2381 inc = 0; 2382 switch (cmd) { 2383 case '\'': 2384 for(;;){ 2385 n = inchar(); 2386 if( n == '\\' ) 2387 n = bsesc(); 2388 else if( n == '\'' ) 2389 break; 2390 for (i = 0; i < size; ++i) 2391 val[i] = n >> (i * 8); 2392 if (!brev) 2393 byterev(val, size); 2394 mwrite(adrs, val, size); 2395 adrs += size; 2396 } 2397 adrs -= size; 2398 inc = size; 2399 break; 2400 case ',': 2401 adrs += size; 2402 break; 2403 case '.': 2404 mnoread = 0; 2405 break; 2406 case ';': 2407 break; 2408 case 'x': 2409 case EOF: 2410 scannl(); 2411 return; 2412 case 'b': 2413 case 'v': 2414 size = 1; 2415 break; 2416 case 'w': 2417 size = 2; 2418 break; 2419 case 'l': 2420 size = 4; 2421 break; 2422 case 'u': 2423 size = 8; 2424 break; 2425 case '^': 2426 adrs -= size; 2427 break; 2428 case '/': 2429 if (nslash > 0) 2430 adrs -= 1 << nslash; 2431 else 2432 nslash = 0; 2433 nslash += 4; 2434 adrs += 1 << nslash; 2435 break; 2436 case '\\': 2437 if (nslash < 0) 2438 adrs += 1 << -nslash; 2439 else 2440 nslash = 0; 2441 nslash -= 4; 2442 adrs -= 1 << -nslash; 2443 break; 2444 case 'm': 2445 scanhex((void *)&adrs); 2446 break; 2447 case 'n': 2448 mnoread = 1; 2449 break; 2450 case 'r': 2451 brev = !brev; 2452 break; 2453 case '<': 2454 n = size; 2455 scanhex(&n); 2456 adrs -= n; 2457 break; 2458 case '>': 2459 n = size; 2460 scanhex(&n); 2461 adrs += n; 2462 break; 2463 case '?': 2464 printf(memex_subcmd_help_string); 2465 break; 2466 } 2467 } 2468 adrs += inc; 2469 } 2470 } 2471 2472 static int 2473 bsesc(void) 2474 { 2475 int c; 2476 2477 c = inchar(); 2478 switch( c ){ 2479 case 'n': c = '\n'; break; 2480 case 'r': c = '\r'; break; 2481 case 'b': c = '\b'; break; 2482 case 't': c = '\t'; break; 2483 } 2484 return c; 2485 } 2486 2487 static void xmon_rawdump (unsigned long adrs, long ndump) 2488 { 2489 long n, m, r, nr; 2490 unsigned char temp[16]; 2491 2492 for (n = ndump; n > 0;) { 2493 r = n < 16? n: 16; 2494 nr = mread(adrs, temp, r); 2495 adrs += nr; 2496 for (m = 0; m < r; ++m) { 2497 if (m < nr) 2498 printf("%.2x", temp[m]); 2499 else 2500 printf("%s", fault_chars[fault_type]); 2501 } 2502 n -= r; 2503 if (nr < r) 2504 break; 2505 } 2506 printf("\n"); 2507 } 2508 2509 static void dump_tracing(void) 2510 { 2511 int c; 2512 2513 c = inchar(); 2514 if (c == 'c') 2515 ftrace_dump(DUMP_ORIG); 2516 else 2517 ftrace_dump(DUMP_ALL); 2518 } 2519 2520 #ifdef CONFIG_PPC64 2521 static void dump_one_paca(int cpu) 2522 { 2523 struct paca_struct *p; 2524 #ifdef CONFIG_PPC_BOOK3S_64 2525 int i = 0; 2526 #endif 2527 2528 if (setjmp(bus_error_jmp) != 0) { 2529 printf("*** Error dumping paca for cpu 0x%x!\n", cpu); 2530 return; 2531 } 2532 2533 catch_memory_errors = 1; 2534 sync(); 2535 2536 p = paca_ptrs[cpu]; 2537 2538 printf("paca for cpu 0x%x @ %px:\n", cpu, p); 2539 2540 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no"); 2541 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no"); 2542 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no"); 2543 2544 #define DUMP(paca, name, format) \ 2545 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \ 2546 offsetof(struct paca_struct, name)); 2547 2548 DUMP(p, lock_token, "%#-*x"); 2549 DUMP(p, paca_index, "%#-*x"); 2550 DUMP(p, kernel_toc, "%#-*llx"); 2551 DUMP(p, kernelbase, "%#-*llx"); 2552 DUMP(p, kernel_msr, "%#-*llx"); 2553 DUMP(p, emergency_sp, "%-*px"); 2554 #ifdef CONFIG_PPC_BOOK3S_64 2555 DUMP(p, nmi_emergency_sp, "%-*px"); 2556 DUMP(p, mc_emergency_sp, "%-*px"); 2557 DUMP(p, in_nmi, "%#-*x"); 2558 DUMP(p, in_mce, "%#-*x"); 2559 DUMP(p, hmi_event_available, "%#-*x"); 2560 #endif 2561 DUMP(p, data_offset, "%#-*llx"); 2562 DUMP(p, hw_cpu_id, "%#-*x"); 2563 DUMP(p, cpu_start, "%#-*x"); 2564 DUMP(p, kexec_state, "%#-*x"); 2565 #ifdef CONFIG_PPC_BOOK3S_64 2566 if (!early_radix_enabled()) { 2567 for (i = 0; i < SLB_NUM_BOLTED; i++) { 2568 u64 esid, vsid; 2569 2570 if (!p->slb_shadow_ptr) 2571 continue; 2572 2573 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid); 2574 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid); 2575 2576 if (esid || vsid) { 2577 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n", 2578 22, "slb_shadow", i, esid, vsid); 2579 } 2580 } 2581 DUMP(p, vmalloc_sllp, "%#-*x"); 2582 DUMP(p, stab_rr, "%#-*x"); 2583 DUMP(p, slb_used_bitmap, "%#-*x"); 2584 DUMP(p, slb_kern_bitmap, "%#-*x"); 2585 2586 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2587 DUMP(p, slb_cache_ptr, "%#-*x"); 2588 for (i = 0; i < SLB_CACHE_ENTRIES; i++) 2589 printf(" %-*s[%d] = 0x%016x\n", 2590 22, "slb_cache", i, p->slb_cache[i]); 2591 } 2592 } 2593 2594 DUMP(p, rfi_flush_fallback_area, "%-*px"); 2595 #endif 2596 DUMP(p, dscr_default, "%#-*llx"); 2597 #ifdef CONFIG_PPC_BOOK3E 2598 DUMP(p, pgd, "%-*px"); 2599 DUMP(p, kernel_pgd, "%-*px"); 2600 DUMP(p, tcd_ptr, "%-*px"); 2601 DUMP(p, mc_kstack, "%-*px"); 2602 DUMP(p, crit_kstack, "%-*px"); 2603 DUMP(p, dbg_kstack, "%-*px"); 2604 #endif 2605 DUMP(p, __current, "%-*px"); 2606 DUMP(p, kstack, "%#-*llx"); 2607 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1)); 2608 #ifdef CONFIG_STACKPROTECTOR 2609 DUMP(p, canary, "%#-*lx"); 2610 #endif 2611 DUMP(p, saved_r1, "%#-*llx"); 2612 #ifdef CONFIG_PPC_BOOK3E 2613 DUMP(p, trap_save, "%#-*x"); 2614 #endif 2615 DUMP(p, irq_soft_mask, "%#-*x"); 2616 DUMP(p, irq_happened, "%#-*x"); 2617 #ifdef CONFIG_MMIOWB 2618 DUMP(p, mmiowb_state.nesting_count, "%#-*x"); 2619 DUMP(p, mmiowb_state.mmiowb_pending, "%#-*x"); 2620 #endif 2621 DUMP(p, irq_work_pending, "%#-*x"); 2622 DUMP(p, sprg_vdso, "%#-*llx"); 2623 2624 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2625 DUMP(p, tm_scratch, "%#-*llx"); 2626 #endif 2627 2628 #ifdef CONFIG_PPC_POWERNV 2629 DUMP(p, idle_state, "%#-*lx"); 2630 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2631 DUMP(p, thread_idle_state, "%#-*x"); 2632 DUMP(p, subcore_sibling_mask, "%#-*x"); 2633 } else { 2634 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 2635 DUMP(p, requested_psscr, "%#-*llx"); 2636 DUMP(p, dont_stop.counter, "%#-*x"); 2637 #endif 2638 } 2639 #endif 2640 2641 DUMP(p, accounting.utime, "%#-*lx"); 2642 DUMP(p, accounting.stime, "%#-*lx"); 2643 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2644 DUMP(p, accounting.utime_scaled, "%#-*lx"); 2645 #endif 2646 DUMP(p, accounting.starttime, "%#-*lx"); 2647 DUMP(p, accounting.starttime_user, "%#-*lx"); 2648 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2649 DUMP(p, accounting.startspurr, "%#-*lx"); 2650 DUMP(p, accounting.utime_sspurr, "%#-*lx"); 2651 #endif 2652 DUMP(p, accounting.steal_time, "%#-*lx"); 2653 #undef DUMP 2654 2655 catch_memory_errors = 0; 2656 sync(); 2657 } 2658 2659 static void dump_all_pacas(void) 2660 { 2661 int cpu; 2662 2663 if (num_possible_cpus() == 0) { 2664 printf("No possible cpus, use 'dp #' to dump individual cpus\n"); 2665 return; 2666 } 2667 2668 for_each_possible_cpu(cpu) 2669 dump_one_paca(cpu); 2670 } 2671 2672 static void dump_pacas(void) 2673 { 2674 unsigned long num; 2675 int c; 2676 2677 c = inchar(); 2678 if (c == 'a') { 2679 dump_all_pacas(); 2680 return; 2681 } 2682 2683 termch = c; /* Put c back, it wasn't 'a' */ 2684 2685 if (scanhex(&num)) 2686 dump_one_paca(num); 2687 else 2688 dump_one_paca(xmon_owner); 2689 } 2690 #endif 2691 2692 #ifdef CONFIG_PPC_POWERNV 2693 static void dump_one_xive(int cpu) 2694 { 2695 unsigned int hwid = get_hard_smp_processor_id(cpu); 2696 bool hv = cpu_has_feature(CPU_FTR_HVMODE); 2697 2698 if (hv) { 2699 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid); 2700 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid); 2701 opal_xive_dump(XIVE_DUMP_TM_OS, hwid); 2702 opal_xive_dump(XIVE_DUMP_TM_USER, hwid); 2703 opal_xive_dump(XIVE_DUMP_VP, hwid); 2704 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid); 2705 } 2706 2707 if (setjmp(bus_error_jmp) != 0) { 2708 catch_memory_errors = 0; 2709 printf("*** Error dumping xive on cpu %d\n", cpu); 2710 return; 2711 } 2712 2713 catch_memory_errors = 1; 2714 sync(); 2715 xmon_xive_do_dump(cpu); 2716 sync(); 2717 __delay(200); 2718 catch_memory_errors = 0; 2719 } 2720 2721 static void dump_all_xives(void) 2722 { 2723 int cpu; 2724 2725 if (num_possible_cpus() == 0) { 2726 printf("No possible cpus, use 'dx #' to dump individual cpus\n"); 2727 return; 2728 } 2729 2730 for_each_possible_cpu(cpu) 2731 dump_one_xive(cpu); 2732 } 2733 2734 static void dump_one_xive_irq(u32 num, struct irq_data *d) 2735 { 2736 xmon_xive_get_irq_config(num, d); 2737 } 2738 2739 static void dump_all_xive_irq(void) 2740 { 2741 unsigned int i; 2742 struct irq_desc *desc; 2743 2744 for_each_irq_desc(i, desc) { 2745 struct irq_data *d = irq_desc_get_irq_data(desc); 2746 unsigned int hwirq; 2747 2748 if (!d) 2749 continue; 2750 2751 hwirq = (unsigned int)irqd_to_hwirq(d); 2752 /* IPIs are special (HW number 0) */ 2753 if (hwirq) 2754 dump_one_xive_irq(hwirq, d); 2755 } 2756 } 2757 2758 static void dump_xives(void) 2759 { 2760 unsigned long num; 2761 int c; 2762 2763 if (!xive_enabled()) { 2764 printf("Xive disabled on this system\n"); 2765 return; 2766 } 2767 2768 c = inchar(); 2769 if (c == 'a') { 2770 dump_all_xives(); 2771 return; 2772 } else if (c == 'i') { 2773 if (scanhex(&num)) 2774 dump_one_xive_irq(num, NULL); 2775 else 2776 dump_all_xive_irq(); 2777 return; 2778 } 2779 2780 termch = c; /* Put c back, it wasn't 'a' */ 2781 2782 if (scanhex(&num)) 2783 dump_one_xive(num); 2784 else 2785 dump_one_xive(xmon_owner); 2786 } 2787 #endif /* CONFIG_PPC_POWERNV */ 2788 2789 static void dump_by_size(unsigned long addr, long count, int size) 2790 { 2791 unsigned char temp[16]; 2792 int i, j; 2793 u64 val; 2794 2795 count = ALIGN(count, 16); 2796 2797 for (i = 0; i < count; i += 16, addr += 16) { 2798 printf(REG, addr); 2799 2800 if (mread(addr, temp, 16) != 16) { 2801 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr); 2802 return; 2803 } 2804 2805 for (j = 0; j < 16; j += size) { 2806 putchar(' '); 2807 switch (size) { 2808 case 1: val = temp[j]; break; 2809 case 2: val = *(u16 *)&temp[j]; break; 2810 case 4: val = *(u32 *)&temp[j]; break; 2811 case 8: val = *(u64 *)&temp[j]; break; 2812 default: val = 0; 2813 } 2814 2815 printf("%0*llx", size * 2, val); 2816 } 2817 printf(" |"); 2818 for (j = 0; j < 16; ++j) { 2819 val = temp[j]; 2820 putchar(' ' <= val && val <= '~' ? val : '.'); 2821 } 2822 printf("|\n"); 2823 } 2824 } 2825 2826 static void 2827 dump(void) 2828 { 2829 static char last[] = { "d?\n" }; 2830 int c; 2831 2832 c = inchar(); 2833 2834 #ifdef CONFIG_PPC64 2835 if (c == 'p') { 2836 xmon_start_pagination(); 2837 dump_pacas(); 2838 xmon_end_pagination(); 2839 return; 2840 } 2841 #endif 2842 #ifdef CONFIG_PPC_POWERNV 2843 if (c == 'x') { 2844 xmon_start_pagination(); 2845 dump_xives(); 2846 xmon_end_pagination(); 2847 return; 2848 } 2849 #endif 2850 2851 if (c == 't') { 2852 dump_tracing(); 2853 return; 2854 } 2855 2856 if (c == '\n') 2857 termch = c; 2858 2859 scanhex((void *)&adrs); 2860 if (termch != '\n') 2861 termch = 0; 2862 if (c == 'i') { 2863 scanhex(&nidump); 2864 if (nidump == 0) 2865 nidump = 16; 2866 else if (nidump > MAX_IDUMP) 2867 nidump = MAX_IDUMP; 2868 adrs += ppc_inst_dump(adrs, nidump, 1); 2869 last_cmd = "di\n"; 2870 } else if (c == 'l') { 2871 dump_log_buf(); 2872 } else if (c == 'o') { 2873 dump_opal_msglog(); 2874 } else if (c == 'v') { 2875 /* dump virtual to physical translation */ 2876 show_pte(adrs); 2877 } else if (c == 'r') { 2878 scanhex(&ndump); 2879 if (ndump == 0) 2880 ndump = 64; 2881 xmon_rawdump(adrs, ndump); 2882 adrs += ndump; 2883 last_cmd = "dr\n"; 2884 } else { 2885 scanhex(&ndump); 2886 if (ndump == 0) 2887 ndump = 64; 2888 else if (ndump > MAX_DUMP) 2889 ndump = MAX_DUMP; 2890 2891 switch (c) { 2892 case '8': 2893 case '4': 2894 case '2': 2895 case '1': 2896 ndump = ALIGN(ndump, 16); 2897 dump_by_size(adrs, ndump, c - '0'); 2898 last[1] = c; 2899 last_cmd = last; 2900 break; 2901 default: 2902 prdump(adrs, ndump); 2903 last_cmd = "d\n"; 2904 } 2905 2906 adrs += ndump; 2907 } 2908 } 2909 2910 static void 2911 prdump(unsigned long adrs, long ndump) 2912 { 2913 long n, m, c, r, nr; 2914 unsigned char temp[16]; 2915 2916 for (n = ndump; n > 0;) { 2917 printf(REG, adrs); 2918 putchar(' '); 2919 r = n < 16? n: 16; 2920 nr = mread(adrs, temp, r); 2921 adrs += nr; 2922 for (m = 0; m < r; ++m) { 2923 if ((m & (sizeof(long) - 1)) == 0 && m > 0) 2924 putchar(' '); 2925 if (m < nr) 2926 printf("%.2x", temp[m]); 2927 else 2928 printf("%s", fault_chars[fault_type]); 2929 } 2930 for (; m < 16; ++m) { 2931 if ((m & (sizeof(long) - 1)) == 0) 2932 putchar(' '); 2933 printf(" "); 2934 } 2935 printf(" |"); 2936 for (m = 0; m < r; ++m) { 2937 if (m < nr) { 2938 c = temp[m]; 2939 putchar(' ' <= c && c <= '~'? c: '.'); 2940 } else 2941 putchar(' '); 2942 } 2943 n -= r; 2944 for (; m < 16; ++m) 2945 putchar(' '); 2946 printf("|\n"); 2947 if (nr < r) 2948 break; 2949 } 2950 } 2951 2952 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); 2953 2954 static int 2955 generic_inst_dump(unsigned long adr, long count, int praddr, 2956 instruction_dump_func dump_func) 2957 { 2958 int nr, dotted; 2959 unsigned long first_adr; 2960 struct ppc_inst inst, last_inst = ppc_inst(0); 2961 2962 dotted = 0; 2963 for (first_adr = adr; count > 0; --count, adr += ppc_inst_len(inst)) { 2964 nr = mread_instr(adr, &inst); 2965 if (nr == 0) { 2966 if (praddr) { 2967 const char *x = fault_chars[fault_type]; 2968 printf(REG" %s%s%s%s\n", adr, x, x, x, x); 2969 } 2970 break; 2971 } 2972 if (adr > first_adr && ppc_inst_equal(inst, last_inst)) { 2973 if (!dotted) { 2974 printf(" ...\n"); 2975 dotted = 1; 2976 } 2977 continue; 2978 } 2979 dotted = 0; 2980 last_inst = inst; 2981 if (praddr) 2982 printf(REG" %s", adr, ppc_inst_as_str(inst)); 2983 printf("\t"); 2984 if (!ppc_inst_prefixed(inst)) 2985 dump_func(ppc_inst_val(inst), adr); 2986 else 2987 dump_func(ppc_inst_as_u64(inst), adr); 2988 printf("\n"); 2989 } 2990 return adr - first_adr; 2991 } 2992 2993 static int 2994 ppc_inst_dump(unsigned long adr, long count, int praddr) 2995 { 2996 return generic_inst_dump(adr, count, praddr, print_insn_powerpc); 2997 } 2998 2999 void 3000 print_address(unsigned long addr) 3001 { 3002 xmon_print_symbol(addr, "\t# ", ""); 3003 } 3004 3005 static void 3006 dump_log_buf(void) 3007 { 3008 struct kmsg_dumper dumper = { .active = 1 }; 3009 unsigned char buf[128]; 3010 size_t len; 3011 3012 if (setjmp(bus_error_jmp) != 0) { 3013 printf("Error dumping printk buffer!\n"); 3014 return; 3015 } 3016 3017 catch_memory_errors = 1; 3018 sync(); 3019 3020 kmsg_dump_rewind_nolock(&dumper); 3021 xmon_start_pagination(); 3022 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) { 3023 buf[len] = '\0'; 3024 printf("%s", buf); 3025 } 3026 xmon_end_pagination(); 3027 3028 sync(); 3029 /* wait a little while to see if we get a machine check */ 3030 __delay(200); 3031 catch_memory_errors = 0; 3032 } 3033 3034 #ifdef CONFIG_PPC_POWERNV 3035 static void dump_opal_msglog(void) 3036 { 3037 unsigned char buf[128]; 3038 ssize_t res; 3039 loff_t pos = 0; 3040 3041 if (!firmware_has_feature(FW_FEATURE_OPAL)) { 3042 printf("Machine is not running OPAL firmware.\n"); 3043 return; 3044 } 3045 3046 if (setjmp(bus_error_jmp) != 0) { 3047 printf("Error dumping OPAL msglog!\n"); 3048 return; 3049 } 3050 3051 catch_memory_errors = 1; 3052 sync(); 3053 3054 xmon_start_pagination(); 3055 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) { 3056 if (res < 0) { 3057 printf("Error dumping OPAL msglog! Error: %zd\n", res); 3058 break; 3059 } 3060 buf[res] = '\0'; 3061 printf("%s", buf); 3062 pos += res; 3063 } 3064 xmon_end_pagination(); 3065 3066 sync(); 3067 /* wait a little while to see if we get a machine check */ 3068 __delay(200); 3069 catch_memory_errors = 0; 3070 } 3071 #endif 3072 3073 /* 3074 * Memory operations - move, set, print differences 3075 */ 3076 static unsigned long mdest; /* destination address */ 3077 static unsigned long msrc; /* source address */ 3078 static unsigned long mval; /* byte value to set memory to */ 3079 static unsigned long mcount; /* # bytes to affect */ 3080 static unsigned long mdiffs; /* max # differences to print */ 3081 3082 static void 3083 memops(int cmd) 3084 { 3085 scanhex((void *)&mdest); 3086 if( termch != '\n' ) 3087 termch = 0; 3088 scanhex((void *)(cmd == 's'? &mval: &msrc)); 3089 if( termch != '\n' ) 3090 termch = 0; 3091 scanhex((void *)&mcount); 3092 switch( cmd ){ 3093 case 'm': 3094 if (xmon_is_ro) { 3095 printf(xmon_ro_msg); 3096 break; 3097 } 3098 memmove((void *)mdest, (void *)msrc, mcount); 3099 break; 3100 case 's': 3101 if (xmon_is_ro) { 3102 printf(xmon_ro_msg); 3103 break; 3104 } 3105 memset((void *)mdest, mval, mcount); 3106 break; 3107 case 'd': 3108 if( termch != '\n' ) 3109 termch = 0; 3110 scanhex((void *)&mdiffs); 3111 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs); 3112 break; 3113 } 3114 } 3115 3116 static void 3117 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) 3118 { 3119 unsigned n, prt; 3120 3121 prt = 0; 3122 for( n = nb; n > 0; --n ) 3123 if( *p1++ != *p2++ ) 3124 if( ++prt <= maxpr ) 3125 printf("%px %.2x # %px %.2x\n", p1 - 1, 3126 p1[-1], p2 - 1, p2[-1]); 3127 if( prt > maxpr ) 3128 printf("Total of %d differences\n", prt); 3129 } 3130 3131 static unsigned mend; 3132 static unsigned mask; 3133 3134 static void 3135 memlocate(void) 3136 { 3137 unsigned a, n; 3138 unsigned char val[4]; 3139 3140 last_cmd = "ml"; 3141 scanhex((void *)&mdest); 3142 if (termch != '\n') { 3143 termch = 0; 3144 scanhex((void *)&mend); 3145 if (termch != '\n') { 3146 termch = 0; 3147 scanhex((void *)&mval); 3148 mask = ~0; 3149 if (termch != '\n') termch = 0; 3150 scanhex((void *)&mask); 3151 } 3152 } 3153 n = 0; 3154 for (a = mdest; a < mend; a += 4) { 3155 if (mread(a, val, 4) == 4 3156 && ((GETWORD(val) ^ mval) & mask) == 0) { 3157 printf("%.16x: %.16x\n", a, GETWORD(val)); 3158 if (++n >= 10) 3159 break; 3160 } 3161 } 3162 } 3163 3164 static unsigned long mskip = 0x1000; 3165 static unsigned long mlim = 0xffffffff; 3166 3167 static void 3168 memzcan(void) 3169 { 3170 unsigned char v; 3171 unsigned a; 3172 int ok, ook; 3173 3174 scanhex(&mdest); 3175 if (termch != '\n') termch = 0; 3176 scanhex(&mskip); 3177 if (termch != '\n') termch = 0; 3178 scanhex(&mlim); 3179 ook = 0; 3180 for (a = mdest; a < mlim; a += mskip) { 3181 ok = mread(a, &v, 1); 3182 if (ok && !ook) { 3183 printf("%.8x .. ", a); 3184 } else if (!ok && ook) 3185 printf("%.8lx\n", a - mskip); 3186 ook = ok; 3187 if (a + mskip < a) 3188 break; 3189 } 3190 if (ook) 3191 printf("%.8lx\n", a - mskip); 3192 } 3193 3194 static void show_task(struct task_struct *tsk) 3195 { 3196 char state; 3197 3198 /* 3199 * Cloned from kdb_task_state_char(), which is not entirely 3200 * appropriate for calling from xmon. This could be moved 3201 * to a common, generic, routine used by both. 3202 */ 3203 state = (tsk->state == 0) ? 'R' : 3204 (tsk->state < 0) ? 'U' : 3205 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' : 3206 (tsk->state & TASK_STOPPED) ? 'T' : 3207 (tsk->state & TASK_TRACED) ? 'C' : 3208 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' : 3209 (tsk->exit_state & EXIT_DEAD) ? 'E' : 3210 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?'; 3211 3212 printf("%16px %16lx %16px %6d %6d %c %2d %s\n", tsk, 3213 tsk->thread.ksp, tsk->thread.regs, 3214 tsk->pid, rcu_dereference(tsk->parent)->pid, 3215 state, task_cpu(tsk), 3216 tsk->comm); 3217 } 3218 3219 #ifdef CONFIG_PPC_BOOK3S_64 3220 static void format_pte(void *ptep, unsigned long pte) 3221 { 3222 pte_t entry = __pte(pte); 3223 3224 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte); 3225 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK); 3226 3227 printf("Flags = %s%s%s%s%s\n", 3228 pte_young(entry) ? "Accessed " : "", 3229 pte_dirty(entry) ? "Dirty " : "", 3230 pte_read(entry) ? "Read " : "", 3231 pte_write(entry) ? "Write " : "", 3232 pte_exec(entry) ? "Exec " : ""); 3233 } 3234 3235 static void show_pte(unsigned long addr) 3236 { 3237 unsigned long tskv = 0; 3238 struct task_struct *tsk = NULL; 3239 struct mm_struct *mm; 3240 pgd_t *pgdp; 3241 p4d_t *p4dp; 3242 pud_t *pudp; 3243 pmd_t *pmdp; 3244 pte_t *ptep; 3245 3246 if (!scanhex(&tskv)) 3247 mm = &init_mm; 3248 else 3249 tsk = (struct task_struct *)tskv; 3250 3251 if (tsk == NULL) 3252 mm = &init_mm; 3253 else 3254 mm = tsk->active_mm; 3255 3256 if (setjmp(bus_error_jmp) != 0) { 3257 catch_memory_errors = 0; 3258 printf("*** Error dumping pte for task %px\n", tsk); 3259 return; 3260 } 3261 3262 catch_memory_errors = 1; 3263 sync(); 3264 3265 if (mm == &init_mm) 3266 pgdp = pgd_offset_k(addr); 3267 else 3268 pgdp = pgd_offset(mm, addr); 3269 3270 p4dp = p4d_offset(pgdp, addr); 3271 3272 if (p4d_none(*p4dp)) { 3273 printf("No valid P4D\n"); 3274 return; 3275 } 3276 3277 if (p4d_is_leaf(*p4dp)) { 3278 format_pte(p4dp, p4d_val(*p4dp)); 3279 return; 3280 } 3281 3282 printf("p4dp @ 0x%px = 0x%016lx\n", p4dp, p4d_val(*p4dp)); 3283 3284 pudp = pud_offset(p4dp, addr); 3285 3286 if (pud_none(*pudp)) { 3287 printf("No valid PUD\n"); 3288 return; 3289 } 3290 3291 if (pud_is_leaf(*pudp)) { 3292 format_pte(pudp, pud_val(*pudp)); 3293 return; 3294 } 3295 3296 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp)); 3297 3298 pmdp = pmd_offset(pudp, addr); 3299 3300 if (pmd_none(*pmdp)) { 3301 printf("No valid PMD\n"); 3302 return; 3303 } 3304 3305 if (pmd_is_leaf(*pmdp)) { 3306 format_pte(pmdp, pmd_val(*pmdp)); 3307 return; 3308 } 3309 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp)); 3310 3311 ptep = pte_offset_map(pmdp, addr); 3312 if (pte_none(*ptep)) { 3313 printf("no valid PTE\n"); 3314 return; 3315 } 3316 3317 format_pte(ptep, pte_val(*ptep)); 3318 3319 sync(); 3320 __delay(200); 3321 catch_memory_errors = 0; 3322 } 3323 #else 3324 static void show_pte(unsigned long addr) 3325 { 3326 printf("show_pte not yet implemented\n"); 3327 } 3328 #endif /* CONFIG_PPC_BOOK3S_64 */ 3329 3330 static void show_tasks(void) 3331 { 3332 unsigned long tskv; 3333 struct task_struct *tsk = NULL; 3334 3335 printf(" task_struct ->thread.ksp ->thread.regs PID PPID S P CMD\n"); 3336 3337 if (scanhex(&tskv)) 3338 tsk = (struct task_struct *)tskv; 3339 3340 if (setjmp(bus_error_jmp) != 0) { 3341 catch_memory_errors = 0; 3342 printf("*** Error dumping task %px\n", tsk); 3343 return; 3344 } 3345 3346 catch_memory_errors = 1; 3347 sync(); 3348 3349 if (tsk) 3350 show_task(tsk); 3351 else 3352 for_each_process(tsk) 3353 show_task(tsk); 3354 3355 sync(); 3356 __delay(200); 3357 catch_memory_errors = 0; 3358 } 3359 3360 static void proccall(void) 3361 { 3362 unsigned long args[8]; 3363 unsigned long ret; 3364 int i; 3365 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long, 3366 unsigned long, unsigned long, unsigned long, 3367 unsigned long, unsigned long, unsigned long); 3368 callfunc_t func; 3369 3370 if (!scanhex(&adrs)) 3371 return; 3372 if (termch != '\n') 3373 termch = 0; 3374 for (i = 0; i < 8; ++i) 3375 args[i] = 0; 3376 for (i = 0; i < 8; ++i) { 3377 if (!scanhex(&args[i]) || termch == '\n') 3378 break; 3379 termch = 0; 3380 } 3381 func = (callfunc_t) adrs; 3382 ret = 0; 3383 if (setjmp(bus_error_jmp) == 0) { 3384 catch_memory_errors = 1; 3385 sync(); 3386 ret = func(args[0], args[1], args[2], args[3], 3387 args[4], args[5], args[6], args[7]); 3388 sync(); 3389 printf("return value is 0x%lx\n", ret); 3390 } else { 3391 printf("*** %x exception occurred\n", fault_except); 3392 } 3393 catch_memory_errors = 0; 3394 } 3395 3396 /* Input scanning routines */ 3397 int 3398 skipbl(void) 3399 { 3400 int c; 3401 3402 if( termch != 0 ){ 3403 c = termch; 3404 termch = 0; 3405 } else 3406 c = inchar(); 3407 while( c == ' ' || c == '\t' ) 3408 c = inchar(); 3409 return c; 3410 } 3411 3412 #define N_PTREGS 44 3413 static const char *regnames[N_PTREGS] = { 3414 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3415 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3416 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3417 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3418 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", 3419 #ifdef CONFIG_PPC64 3420 "softe", 3421 #else 3422 "mq", 3423 #endif 3424 "trap", "dar", "dsisr", "res" 3425 }; 3426 3427 int 3428 scanhex(unsigned long *vp) 3429 { 3430 int c, d; 3431 unsigned long v; 3432 3433 c = skipbl(); 3434 if (c == '%') { 3435 /* parse register name */ 3436 char regname[8]; 3437 int i; 3438 3439 for (i = 0; i < sizeof(regname) - 1; ++i) { 3440 c = inchar(); 3441 if (!isalnum(c)) { 3442 termch = c; 3443 break; 3444 } 3445 regname[i] = c; 3446 } 3447 regname[i] = 0; 3448 i = match_string(regnames, N_PTREGS, regname); 3449 if (i < 0) { 3450 printf("invalid register name '%%%s'\n", regname); 3451 return 0; 3452 } 3453 if (xmon_regs == NULL) { 3454 printf("regs not available\n"); 3455 return 0; 3456 } 3457 *vp = ((unsigned long *)xmon_regs)[i]; 3458 return 1; 3459 } 3460 3461 /* skip leading "0x" if any */ 3462 3463 if (c == '0') { 3464 c = inchar(); 3465 if (c == 'x') { 3466 c = inchar(); 3467 } else { 3468 d = hexdigit(c); 3469 if (d == EOF) { 3470 termch = c; 3471 *vp = 0; 3472 return 1; 3473 } 3474 } 3475 } else if (c == '$') { 3476 int i; 3477 for (i=0; i<63; i++) { 3478 c = inchar(); 3479 if (isspace(c) || c == '\0') { 3480 termch = c; 3481 break; 3482 } 3483 tmpstr[i] = c; 3484 } 3485 tmpstr[i++] = 0; 3486 *vp = 0; 3487 if (setjmp(bus_error_jmp) == 0) { 3488 catch_memory_errors = 1; 3489 sync(); 3490 *vp = kallsyms_lookup_name(tmpstr); 3491 sync(); 3492 } 3493 catch_memory_errors = 0; 3494 if (!(*vp)) { 3495 printf("unknown symbol '%s'\n", tmpstr); 3496 return 0; 3497 } 3498 return 1; 3499 } 3500 3501 d = hexdigit(c); 3502 if (d == EOF) { 3503 termch = c; 3504 return 0; 3505 } 3506 v = 0; 3507 do { 3508 v = (v << 4) + d; 3509 c = inchar(); 3510 d = hexdigit(c); 3511 } while (d != EOF); 3512 termch = c; 3513 *vp = v; 3514 return 1; 3515 } 3516 3517 static void 3518 scannl(void) 3519 { 3520 int c; 3521 3522 c = termch; 3523 termch = 0; 3524 while( c != '\n' ) 3525 c = inchar(); 3526 } 3527 3528 static int hexdigit(int c) 3529 { 3530 if( '0' <= c && c <= '9' ) 3531 return c - '0'; 3532 if( 'A' <= c && c <= 'F' ) 3533 return c - ('A' - 10); 3534 if( 'a' <= c && c <= 'f' ) 3535 return c - ('a' - 10); 3536 return EOF; 3537 } 3538 3539 void 3540 getstring(char *s, int size) 3541 { 3542 int c; 3543 3544 c = skipbl(); 3545 if (c == '\n') { 3546 *s = 0; 3547 return; 3548 } 3549 3550 do { 3551 if( size > 1 ){ 3552 *s++ = c; 3553 --size; 3554 } 3555 c = inchar(); 3556 } while( c != ' ' && c != '\t' && c != '\n' ); 3557 termch = c; 3558 *s = 0; 3559 } 3560 3561 static char line[256]; 3562 static char *lineptr; 3563 3564 static void 3565 flush_input(void) 3566 { 3567 lineptr = NULL; 3568 } 3569 3570 static int 3571 inchar(void) 3572 { 3573 if (lineptr == NULL || *lineptr == 0) { 3574 if (xmon_gets(line, sizeof(line)) == NULL) { 3575 lineptr = NULL; 3576 return EOF; 3577 } 3578 lineptr = line; 3579 } 3580 return *lineptr++; 3581 } 3582 3583 static void 3584 take_input(char *str) 3585 { 3586 lineptr = str; 3587 } 3588 3589 3590 static void 3591 symbol_lookup(void) 3592 { 3593 int type = inchar(); 3594 unsigned long addr, cpu; 3595 void __percpu *ptr = NULL; 3596 static char tmp[64]; 3597 3598 switch (type) { 3599 case 'a': 3600 if (scanhex(&addr)) 3601 xmon_print_symbol(addr, ": ", "\n"); 3602 termch = 0; 3603 break; 3604 case 's': 3605 getstring(tmp, 64); 3606 if (setjmp(bus_error_jmp) == 0) { 3607 catch_memory_errors = 1; 3608 sync(); 3609 addr = kallsyms_lookup_name(tmp); 3610 if (addr) 3611 printf("%s: %lx\n", tmp, addr); 3612 else 3613 printf("Symbol '%s' not found.\n", tmp); 3614 sync(); 3615 } 3616 catch_memory_errors = 0; 3617 termch = 0; 3618 break; 3619 case 'p': 3620 getstring(tmp, 64); 3621 if (setjmp(bus_error_jmp) == 0) { 3622 catch_memory_errors = 1; 3623 sync(); 3624 ptr = (void __percpu *)kallsyms_lookup_name(tmp); 3625 sync(); 3626 } 3627 3628 if (ptr && 3629 ptr >= (void __percpu *)__per_cpu_start && 3630 ptr < (void __percpu *)__per_cpu_end) 3631 { 3632 if (scanhex(&cpu) && cpu < num_possible_cpus()) { 3633 addr = (unsigned long)per_cpu_ptr(ptr, cpu); 3634 } else { 3635 cpu = raw_smp_processor_id(); 3636 addr = (unsigned long)this_cpu_ptr(ptr); 3637 } 3638 3639 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr); 3640 } else { 3641 printf("Percpu symbol '%s' not found.\n", tmp); 3642 } 3643 3644 catch_memory_errors = 0; 3645 termch = 0; 3646 break; 3647 } 3648 } 3649 3650 3651 /* Print an address in numeric and symbolic form (if possible) */ 3652 static void xmon_print_symbol(unsigned long address, const char *mid, 3653 const char *after) 3654 { 3655 char *modname; 3656 const char *name = NULL; 3657 unsigned long offset, size; 3658 3659 printf(REG, address); 3660 if (setjmp(bus_error_jmp) == 0) { 3661 catch_memory_errors = 1; 3662 sync(); 3663 name = kallsyms_lookup(address, &size, &offset, &modname, 3664 tmpstr); 3665 sync(); 3666 /* wait a little while to see if we get a machine check */ 3667 __delay(200); 3668 } 3669 3670 catch_memory_errors = 0; 3671 3672 if (name) { 3673 printf("%s%s+%#lx/%#lx", mid, name, offset, size); 3674 if (modname) 3675 printf(" [%s]", modname); 3676 } 3677 printf("%s", after); 3678 } 3679 3680 #ifdef CONFIG_PPC_BOOK3S_64 3681 void dump_segments(void) 3682 { 3683 int i; 3684 unsigned long esid,vsid; 3685 unsigned long llp; 3686 3687 printf("SLB contents of cpu 0x%x\n", smp_processor_id()); 3688 3689 for (i = 0; i < mmu_slb_size; i++) { 3690 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i)); 3691 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i)); 3692 3693 if (!esid && !vsid) 3694 continue; 3695 3696 printf("%02d %016lx %016lx", i, esid, vsid); 3697 3698 if (!(esid & SLB_ESID_V)) { 3699 printf("\n"); 3700 continue; 3701 } 3702 3703 llp = vsid & SLB_VSID_LLP; 3704 if (vsid & SLB_VSID_B_1T) { 3705 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n", 3706 GET_ESID_1T(esid), 3707 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T, 3708 llp); 3709 } else { 3710 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n", 3711 GET_ESID(esid), 3712 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT, 3713 llp); 3714 } 3715 } 3716 } 3717 #endif 3718 3719 #ifdef CONFIG_PPC_BOOK3S_32 3720 void dump_segments(void) 3721 { 3722 int i; 3723 3724 printf("sr0-15 ="); 3725 for (i = 0; i < 16; ++i) 3726 printf(" %x", mfsrin(i << 28)); 3727 printf("\n"); 3728 } 3729 #endif 3730 3731 #ifdef CONFIG_44x 3732 static void dump_tlb_44x(void) 3733 { 3734 int i; 3735 3736 for (i = 0; i < PPC44x_TLB_SIZE; i++) { 3737 unsigned long w0,w1,w2; 3738 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i)); 3739 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i)); 3740 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i)); 3741 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2); 3742 if (w0 & PPC44x_TLB_VALID) { 3743 printf("V %08lx -> %01lx%08lx %c%c%c%c%c", 3744 w0 & PPC44x_TLB_EPN_MASK, 3745 w1 & PPC44x_TLB_ERPN_MASK, 3746 w1 & PPC44x_TLB_RPN_MASK, 3747 (w2 & PPC44x_TLB_W) ? 'W' : 'w', 3748 (w2 & PPC44x_TLB_I) ? 'I' : 'i', 3749 (w2 & PPC44x_TLB_M) ? 'M' : 'm', 3750 (w2 & PPC44x_TLB_G) ? 'G' : 'g', 3751 (w2 & PPC44x_TLB_E) ? 'E' : 'e'); 3752 } 3753 printf("\n"); 3754 } 3755 } 3756 #endif /* CONFIG_44x */ 3757 3758 #ifdef CONFIG_PPC_BOOK3E 3759 static void dump_tlb_book3e(void) 3760 { 3761 u32 mmucfg, pidmask, lpidmask; 3762 u64 ramask; 3763 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0; 3764 int mmu_version; 3765 static const char *pgsz_names[] = { 3766 " 1K", 3767 " 2K", 3768 " 4K", 3769 " 8K", 3770 " 16K", 3771 " 32K", 3772 " 64K", 3773 "128K", 3774 "256K", 3775 "512K", 3776 " 1M", 3777 " 2M", 3778 " 4M", 3779 " 8M", 3780 " 16M", 3781 " 32M", 3782 " 64M", 3783 "128M", 3784 "256M", 3785 "512M", 3786 " 1G", 3787 " 2G", 3788 " 4G", 3789 " 8G", 3790 " 16G", 3791 " 32G", 3792 " 64G", 3793 "128G", 3794 "256G", 3795 "512G", 3796 " 1T", 3797 " 2T", 3798 }; 3799 3800 /* Gather some infos about the MMU */ 3801 mmucfg = mfspr(SPRN_MMUCFG); 3802 mmu_version = (mmucfg & 3) + 1; 3803 ntlbs = ((mmucfg >> 2) & 3) + 1; 3804 pidsz = ((mmucfg >> 6) & 0x1f) + 1; 3805 lpidsz = (mmucfg >> 24) & 0xf; 3806 rasz = (mmucfg >> 16) & 0x7f; 3807 if ((mmu_version > 1) && (mmucfg & 0x10000)) 3808 lrat = 1; 3809 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n", 3810 mmu_version, ntlbs, pidsz, lpidsz, rasz); 3811 pidmask = (1ul << pidsz) - 1; 3812 lpidmask = (1ul << lpidsz) - 1; 3813 ramask = (1ull << rasz) - 1; 3814 3815 for (tlb = 0; tlb < ntlbs; tlb++) { 3816 u32 tlbcfg; 3817 int nent, assoc, new_cc = 1; 3818 printf("TLB %d:\n------\n", tlb); 3819 switch(tlb) { 3820 case 0: 3821 tlbcfg = mfspr(SPRN_TLB0CFG); 3822 break; 3823 case 1: 3824 tlbcfg = mfspr(SPRN_TLB1CFG); 3825 break; 3826 case 2: 3827 tlbcfg = mfspr(SPRN_TLB2CFG); 3828 break; 3829 case 3: 3830 tlbcfg = mfspr(SPRN_TLB3CFG); 3831 break; 3832 default: 3833 printf("Unsupported TLB number !\n"); 3834 continue; 3835 } 3836 nent = tlbcfg & 0xfff; 3837 assoc = (tlbcfg >> 24) & 0xff; 3838 for (i = 0; i < nent; i++) { 3839 u32 mas0 = MAS0_TLBSEL(tlb); 3840 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K); 3841 u64 mas2 = 0; 3842 u64 mas7_mas3; 3843 int esel = i, cc = i; 3844 3845 if (assoc != 0) { 3846 cc = i / assoc; 3847 esel = i % assoc; 3848 mas2 = cc * 0x1000; 3849 } 3850 3851 mas0 |= MAS0_ESEL(esel); 3852 mtspr(SPRN_MAS0, mas0); 3853 mtspr(SPRN_MAS1, mas1); 3854 mtspr(SPRN_MAS2, mas2); 3855 asm volatile("tlbre 0,0,0" : : : "memory"); 3856 mas1 = mfspr(SPRN_MAS1); 3857 mas2 = mfspr(SPRN_MAS2); 3858 mas7_mas3 = mfspr(SPRN_MAS7_MAS3); 3859 if (assoc && (i % assoc) == 0) 3860 new_cc = 1; 3861 if (!(mas1 & MAS1_VALID)) 3862 continue; 3863 if (assoc == 0) 3864 printf("%04x- ", i); 3865 else if (new_cc) 3866 printf("%04x-%c", cc, 'A' + esel); 3867 else 3868 printf(" |%c", 'A' + esel); 3869 new_cc = 0; 3870 printf(" %016llx %04x %s %c%c AS%c", 3871 mas2 & ~0x3ffull, 3872 (mas1 >> 16) & 0x3fff, 3873 pgsz_names[(mas1 >> 7) & 0x1f], 3874 mas1 & MAS1_IND ? 'I' : ' ', 3875 mas1 & MAS1_IPROT ? 'P' : ' ', 3876 mas1 & MAS1_TS ? '1' : '0'); 3877 printf(" %c%c%c%c%c%c%c", 3878 mas2 & MAS2_X0 ? 'a' : ' ', 3879 mas2 & MAS2_X1 ? 'v' : ' ', 3880 mas2 & MAS2_W ? 'w' : ' ', 3881 mas2 & MAS2_I ? 'i' : ' ', 3882 mas2 & MAS2_M ? 'm' : ' ', 3883 mas2 & MAS2_G ? 'g' : ' ', 3884 mas2 & MAS2_E ? 'e' : ' '); 3885 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull); 3886 if (mas1 & MAS1_IND) 3887 printf(" %s\n", 3888 pgsz_names[(mas7_mas3 >> 1) & 0x1f]); 3889 else 3890 printf(" U%c%c%c S%c%c%c\n", 3891 mas7_mas3 & MAS3_UX ? 'x' : ' ', 3892 mas7_mas3 & MAS3_UW ? 'w' : ' ', 3893 mas7_mas3 & MAS3_UR ? 'r' : ' ', 3894 mas7_mas3 & MAS3_SX ? 'x' : ' ', 3895 mas7_mas3 & MAS3_SW ? 'w' : ' ', 3896 mas7_mas3 & MAS3_SR ? 'r' : ' '); 3897 } 3898 } 3899 } 3900 #endif /* CONFIG_PPC_BOOK3E */ 3901 3902 static void xmon_init(int enable) 3903 { 3904 if (enable) { 3905 __debugger = xmon; 3906 __debugger_ipi = xmon_ipi; 3907 __debugger_bpt = xmon_bpt; 3908 __debugger_sstep = xmon_sstep; 3909 __debugger_iabr_match = xmon_iabr_match; 3910 __debugger_break_match = xmon_break_match; 3911 __debugger_fault_handler = xmon_fault_handler; 3912 3913 #ifdef CONFIG_PPC_PSERIES 3914 /* 3915 * Get the token here to avoid trying to get a lock 3916 * during the crash, causing a deadlock. 3917 */ 3918 set_indicator_token = rtas_token("set-indicator"); 3919 #endif 3920 } else { 3921 __debugger = NULL; 3922 __debugger_ipi = NULL; 3923 __debugger_bpt = NULL; 3924 __debugger_sstep = NULL; 3925 __debugger_iabr_match = NULL; 3926 __debugger_break_match = NULL; 3927 __debugger_fault_handler = NULL; 3928 } 3929 } 3930 3931 #ifdef CONFIG_MAGIC_SYSRQ 3932 static void sysrq_handle_xmon(int key) 3933 { 3934 if (xmon_is_locked_down()) { 3935 clear_all_bpt(); 3936 xmon_init(0); 3937 return; 3938 } 3939 /* ensure xmon is enabled */ 3940 xmon_init(1); 3941 debugger(get_irq_regs()); 3942 if (!xmon_on) 3943 xmon_init(0); 3944 } 3945 3946 static const struct sysrq_key_op sysrq_xmon_op = { 3947 .handler = sysrq_handle_xmon, 3948 .help_msg = "xmon(x)", 3949 .action_msg = "Entering xmon", 3950 }; 3951 3952 static int __init setup_xmon_sysrq(void) 3953 { 3954 register_sysrq_key('x', &sysrq_xmon_op); 3955 return 0; 3956 } 3957 device_initcall(setup_xmon_sysrq); 3958 #endif /* CONFIG_MAGIC_SYSRQ */ 3959 3960 static void clear_all_bpt(void) 3961 { 3962 int i; 3963 3964 /* clear/unpatch all breakpoints */ 3965 remove_bpts(); 3966 remove_cpu_bpts(); 3967 3968 /* Disable all breakpoints */ 3969 for (i = 0; i < NBPTS; ++i) 3970 bpts[i].enabled = 0; 3971 3972 /* Clear any data or iabr breakpoints */ 3973 iabr = NULL; 3974 for (i = 0; i < nr_wp_slots(); i++) 3975 dabr[i].enabled = 0; 3976 } 3977 3978 #ifdef CONFIG_DEBUG_FS 3979 static int xmon_dbgfs_set(void *data, u64 val) 3980 { 3981 xmon_on = !!val; 3982 xmon_init(xmon_on); 3983 3984 /* make sure all breakpoints removed when disabling */ 3985 if (!xmon_on) { 3986 clear_all_bpt(); 3987 get_output_lock(); 3988 printf("xmon: All breakpoints cleared\n"); 3989 release_output_lock(); 3990 } 3991 3992 return 0; 3993 } 3994 3995 static int xmon_dbgfs_get(void *data, u64 *val) 3996 { 3997 *val = xmon_on; 3998 return 0; 3999 } 4000 4001 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get, 4002 xmon_dbgfs_set, "%llu\n"); 4003 4004 static int __init setup_xmon_dbgfs(void) 4005 { 4006 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL, 4007 &xmon_dbgfs_ops); 4008 return 0; 4009 } 4010 device_initcall(setup_xmon_dbgfs); 4011 #endif /* CONFIG_DEBUG_FS */ 4012 4013 static int xmon_early __initdata; 4014 4015 static int __init early_parse_xmon(char *p) 4016 { 4017 if (xmon_is_locked_down()) { 4018 xmon_init(0); 4019 xmon_early = 0; 4020 xmon_on = 0; 4021 } else if (!p || strncmp(p, "early", 5) == 0) { 4022 /* just "xmon" is equivalent to "xmon=early" */ 4023 xmon_init(1); 4024 xmon_early = 1; 4025 xmon_on = 1; 4026 } else if (strncmp(p, "on", 2) == 0) { 4027 xmon_init(1); 4028 xmon_on = 1; 4029 } else if (strncmp(p, "rw", 2) == 0) { 4030 xmon_init(1); 4031 xmon_on = 1; 4032 xmon_is_ro = false; 4033 } else if (strncmp(p, "ro", 2) == 0) { 4034 xmon_init(1); 4035 xmon_on = 1; 4036 xmon_is_ro = true; 4037 } else if (strncmp(p, "off", 3) == 0) 4038 xmon_on = 0; 4039 else 4040 return 1; 4041 4042 return 0; 4043 } 4044 early_param("xmon", early_parse_xmon); 4045 4046 void __init xmon_setup(void) 4047 { 4048 if (xmon_on) 4049 xmon_init(1); 4050 if (xmon_early) 4051 debugger(NULL); 4052 } 4053 4054 #ifdef CONFIG_SPU_BASE 4055 4056 struct spu_info { 4057 struct spu *spu; 4058 u64 saved_mfc_sr1_RW; 4059 u32 saved_spu_runcntl_RW; 4060 unsigned long dump_addr; 4061 u8 stopped_ok; 4062 }; 4063 4064 #define XMON_NUM_SPUS 16 /* Enough for current hardware */ 4065 4066 static struct spu_info spu_info[XMON_NUM_SPUS]; 4067 4068 void xmon_register_spus(struct list_head *list) 4069 { 4070 struct spu *spu; 4071 4072 list_for_each_entry(spu, list, full_list) { 4073 if (spu->number >= XMON_NUM_SPUS) { 4074 WARN_ON(1); 4075 continue; 4076 } 4077 4078 spu_info[spu->number].spu = spu; 4079 spu_info[spu->number].stopped_ok = 0; 4080 spu_info[spu->number].dump_addr = (unsigned long) 4081 spu_info[spu->number].spu->local_store; 4082 } 4083 } 4084 4085 static void stop_spus(void) 4086 { 4087 struct spu *spu; 4088 int i; 4089 u64 tmp; 4090 4091 for (i = 0; i < XMON_NUM_SPUS; i++) { 4092 if (!spu_info[i].spu) 4093 continue; 4094 4095 if (setjmp(bus_error_jmp) == 0) { 4096 catch_memory_errors = 1; 4097 sync(); 4098 4099 spu = spu_info[i].spu; 4100 4101 spu_info[i].saved_spu_runcntl_RW = 4102 in_be32(&spu->problem->spu_runcntl_RW); 4103 4104 tmp = spu_mfc_sr1_get(spu); 4105 spu_info[i].saved_mfc_sr1_RW = tmp; 4106 4107 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 4108 spu_mfc_sr1_set(spu, tmp); 4109 4110 sync(); 4111 __delay(200); 4112 4113 spu_info[i].stopped_ok = 1; 4114 4115 printf("Stopped spu %.2d (was %s)\n", i, 4116 spu_info[i].saved_spu_runcntl_RW ? 4117 "running" : "stopped"); 4118 } else { 4119 catch_memory_errors = 0; 4120 printf("*** Error stopping spu %.2d\n", i); 4121 } 4122 catch_memory_errors = 0; 4123 } 4124 } 4125 4126 static void restart_spus(void) 4127 { 4128 struct spu *spu; 4129 int i; 4130 4131 for (i = 0; i < XMON_NUM_SPUS; i++) { 4132 if (!spu_info[i].spu) 4133 continue; 4134 4135 if (!spu_info[i].stopped_ok) { 4136 printf("*** Error, spu %d was not successfully stopped" 4137 ", not restarting\n", i); 4138 continue; 4139 } 4140 4141 if (setjmp(bus_error_jmp) == 0) { 4142 catch_memory_errors = 1; 4143 sync(); 4144 4145 spu = spu_info[i].spu; 4146 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW); 4147 out_be32(&spu->problem->spu_runcntl_RW, 4148 spu_info[i].saved_spu_runcntl_RW); 4149 4150 sync(); 4151 __delay(200); 4152 4153 printf("Restarted spu %.2d\n", i); 4154 } else { 4155 catch_memory_errors = 0; 4156 printf("*** Error restarting spu %.2d\n", i); 4157 } 4158 catch_memory_errors = 0; 4159 } 4160 } 4161 4162 #define DUMP_WIDTH 23 4163 #define DUMP_VALUE(format, field, value) \ 4164 do { \ 4165 if (setjmp(bus_error_jmp) == 0) { \ 4166 catch_memory_errors = 1; \ 4167 sync(); \ 4168 printf(" %-*s = "format"\n", DUMP_WIDTH, \ 4169 #field, value); \ 4170 sync(); \ 4171 __delay(200); \ 4172 } else { \ 4173 catch_memory_errors = 0; \ 4174 printf(" %-*s = *** Error reading field.\n", \ 4175 DUMP_WIDTH, #field); \ 4176 } \ 4177 catch_memory_errors = 0; \ 4178 } while (0) 4179 4180 #define DUMP_FIELD(obj, format, field) \ 4181 DUMP_VALUE(format, field, obj->field) 4182 4183 static void dump_spu_fields(struct spu *spu) 4184 { 4185 printf("Dumping spu fields at address %p:\n", spu); 4186 4187 DUMP_FIELD(spu, "0x%x", number); 4188 DUMP_FIELD(spu, "%s", name); 4189 DUMP_FIELD(spu, "0x%lx", local_store_phys); 4190 DUMP_FIELD(spu, "0x%p", local_store); 4191 DUMP_FIELD(spu, "0x%lx", ls_size); 4192 DUMP_FIELD(spu, "0x%x", node); 4193 DUMP_FIELD(spu, "0x%lx", flags); 4194 DUMP_FIELD(spu, "%llu", class_0_pending); 4195 DUMP_FIELD(spu, "0x%llx", class_0_dar); 4196 DUMP_FIELD(spu, "0x%llx", class_1_dar); 4197 DUMP_FIELD(spu, "0x%llx", class_1_dsisr); 4198 DUMP_FIELD(spu, "0x%x", irqs[0]); 4199 DUMP_FIELD(spu, "0x%x", irqs[1]); 4200 DUMP_FIELD(spu, "0x%x", irqs[2]); 4201 DUMP_FIELD(spu, "0x%x", slb_replace); 4202 DUMP_FIELD(spu, "%d", pid); 4203 DUMP_FIELD(spu, "0x%p", mm); 4204 DUMP_FIELD(spu, "0x%p", ctx); 4205 DUMP_FIELD(spu, "0x%p", rq); 4206 DUMP_FIELD(spu, "0x%llx", timestamp); 4207 DUMP_FIELD(spu, "0x%lx", problem_phys); 4208 DUMP_FIELD(spu, "0x%p", problem); 4209 DUMP_VALUE("0x%x", problem->spu_runcntl_RW, 4210 in_be32(&spu->problem->spu_runcntl_RW)); 4211 DUMP_VALUE("0x%x", problem->spu_status_R, 4212 in_be32(&spu->problem->spu_status_R)); 4213 DUMP_VALUE("0x%x", problem->spu_npc_RW, 4214 in_be32(&spu->problem->spu_npc_RW)); 4215 DUMP_FIELD(spu, "0x%p", priv2); 4216 DUMP_FIELD(spu, "0x%p", pdata); 4217 } 4218 4219 int 4220 spu_inst_dump(unsigned long adr, long count, int praddr) 4221 { 4222 return generic_inst_dump(adr, count, praddr, print_insn_spu); 4223 } 4224 4225 static void dump_spu_ls(unsigned long num, int subcmd) 4226 { 4227 unsigned long offset, addr, ls_addr; 4228 4229 if (setjmp(bus_error_jmp) == 0) { 4230 catch_memory_errors = 1; 4231 sync(); 4232 ls_addr = (unsigned long)spu_info[num].spu->local_store; 4233 sync(); 4234 __delay(200); 4235 } else { 4236 catch_memory_errors = 0; 4237 printf("*** Error: accessing spu info for spu %ld\n", num); 4238 return; 4239 } 4240 catch_memory_errors = 0; 4241 4242 if (scanhex(&offset)) 4243 addr = ls_addr + offset; 4244 else 4245 addr = spu_info[num].dump_addr; 4246 4247 if (addr >= ls_addr + LS_SIZE) { 4248 printf("*** Error: address outside of local store\n"); 4249 return; 4250 } 4251 4252 switch (subcmd) { 4253 case 'i': 4254 addr += spu_inst_dump(addr, 16, 1); 4255 last_cmd = "sdi\n"; 4256 break; 4257 default: 4258 prdump(addr, 64); 4259 addr += 64; 4260 last_cmd = "sd\n"; 4261 break; 4262 } 4263 4264 spu_info[num].dump_addr = addr; 4265 } 4266 4267 static int do_spu_cmd(void) 4268 { 4269 static unsigned long num = 0; 4270 int cmd, subcmd = 0; 4271 4272 cmd = inchar(); 4273 switch (cmd) { 4274 case 's': 4275 stop_spus(); 4276 break; 4277 case 'r': 4278 restart_spus(); 4279 break; 4280 case 'd': 4281 subcmd = inchar(); 4282 if (isxdigit(subcmd) || subcmd == '\n') 4283 termch = subcmd; 4284 fallthrough; 4285 case 'f': 4286 scanhex(&num); 4287 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) { 4288 printf("*** Error: invalid spu number\n"); 4289 return 0; 4290 } 4291 4292 switch (cmd) { 4293 case 'f': 4294 dump_spu_fields(spu_info[num].spu); 4295 break; 4296 default: 4297 dump_spu_ls(num, subcmd); 4298 break; 4299 } 4300 4301 break; 4302 default: 4303 return -1; 4304 } 4305 4306 return 0; 4307 } 4308 #else /* ! CONFIG_SPU_BASE */ 4309 static int do_spu_cmd(void) 4310 { 4311 return -1; 4312 } 4313 #endif 4314