1 /* 2 * Routines providing a simple monitor for use on the PowerMac. 3 * 4 * Copyright (C) 1996-2005 Paul Mackerras. 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 11 * 2 of the License, or (at your option) any later version. 12 */ 13 14 #include <linux/kernel.h> 15 #include <linux/errno.h> 16 #include <linux/sched/signal.h> 17 #include <linux/smp.h> 18 #include <linux/mm.h> 19 #include <linux/reboot.h> 20 #include <linux/delay.h> 21 #include <linux/kallsyms.h> 22 #include <linux/kmsg_dump.h> 23 #include <linux/cpumask.h> 24 #include <linux/export.h> 25 #include <linux/sysrq.h> 26 #include <linux/interrupt.h> 27 #include <linux/irq.h> 28 #include <linux/bug.h> 29 #include <linux/nmi.h> 30 #include <linux/ctype.h> 31 #include <linux/highmem.h> 32 33 #include <asm/debugfs.h> 34 #include <asm/ptrace.h> 35 #include <asm/smp.h> 36 #include <asm/string.h> 37 #include <asm/prom.h> 38 #include <asm/machdep.h> 39 #include <asm/xmon.h> 40 #include <asm/processor.h> 41 #include <asm/pgtable.h> 42 #include <asm/mmu.h> 43 #include <asm/mmu_context.h> 44 #include <asm/plpar_wrappers.h> 45 #include <asm/cputable.h> 46 #include <asm/rtas.h> 47 #include <asm/sstep.h> 48 #include <asm/irq_regs.h> 49 #include <asm/spu.h> 50 #include <asm/spu_priv1.h> 51 #include <asm/setjmp.h> 52 #include <asm/reg.h> 53 #include <asm/debug.h> 54 #include <asm/hw_breakpoint.h> 55 #include <asm/xive.h> 56 #include <asm/opal.h> 57 #include <asm/firmware.h> 58 #include <asm/code-patching.h> 59 #include <asm/sections.h> 60 61 #ifdef CONFIG_PPC64 62 #include <asm/hvcall.h> 63 #include <asm/paca.h> 64 #endif 65 66 #include "nonstdio.h" 67 #include "dis-asm.h" 68 69 #ifdef CONFIG_SMP 70 static cpumask_t cpus_in_xmon = CPU_MASK_NONE; 71 static unsigned long xmon_taken = 1; 72 static int xmon_owner; 73 static int xmon_gate; 74 #else 75 #define xmon_owner 0 76 #endif /* CONFIG_SMP */ 77 78 static unsigned long in_xmon __read_mostly = 0; 79 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT); 80 81 static unsigned long adrs; 82 static int size = 1; 83 #define MAX_DUMP (128 * 1024) 84 static unsigned long ndump = 64; 85 static unsigned long nidump = 16; 86 static unsigned long ncsum = 4096; 87 static int termch; 88 static char tmpstr[128]; 89 static int tracing_enabled; 90 91 static long bus_error_jmp[JMP_BUF_LEN]; 92 static int catch_memory_errors; 93 static int catch_spr_faults; 94 static long *xmon_fault_jmp[NR_CPUS]; 95 96 /* Breakpoint stuff */ 97 struct bpt { 98 unsigned long address; 99 unsigned int instr[2]; 100 atomic_t ref_count; 101 int enabled; 102 unsigned long pad; 103 }; 104 105 /* Bits in bpt.enabled */ 106 #define BP_CIABR 1 107 #define BP_TRAP 2 108 #define BP_DABR 4 109 110 #define NBPTS 256 111 static struct bpt bpts[NBPTS]; 112 static struct bpt dabr; 113 static struct bpt *iabr; 114 static unsigned bpinstr = 0x7fe00008; /* trap */ 115 116 #define BP_NUM(bp) ((bp) - bpts + 1) 117 118 /* Prototypes */ 119 static int cmds(struct pt_regs *); 120 static int mread(unsigned long, void *, int); 121 static int mwrite(unsigned long, void *, int); 122 static int handle_fault(struct pt_regs *); 123 static void byterev(unsigned char *, int); 124 static void memex(void); 125 static int bsesc(void); 126 static void dump(void); 127 static void show_pte(unsigned long); 128 static void prdump(unsigned long, long); 129 static int ppc_inst_dump(unsigned long, long, int); 130 static void dump_log_buf(void); 131 132 #ifdef CONFIG_PPC_POWERNV 133 static void dump_opal_msglog(void); 134 #else 135 static inline void dump_opal_msglog(void) 136 { 137 printf("Machine is not running OPAL firmware.\n"); 138 } 139 #endif 140 141 static void backtrace(struct pt_regs *); 142 static void excprint(struct pt_regs *); 143 static void prregs(struct pt_regs *); 144 static void memops(int); 145 static void memlocate(void); 146 static void memzcan(void); 147 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned); 148 int skipbl(void); 149 int scanhex(unsigned long *valp); 150 static void scannl(void); 151 static int hexdigit(int); 152 void getstring(char *, int); 153 static void flush_input(void); 154 static int inchar(void); 155 static void take_input(char *); 156 static int read_spr(int, unsigned long *); 157 static void write_spr(int, unsigned long); 158 static void super_regs(void); 159 static void remove_bpts(void); 160 static void insert_bpts(void); 161 static void remove_cpu_bpts(void); 162 static void insert_cpu_bpts(void); 163 static struct bpt *at_breakpoint(unsigned long pc); 164 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp); 165 static int do_step(struct pt_regs *); 166 static void bpt_cmds(void); 167 static void cacheflush(void); 168 static int cpu_cmd(void); 169 static void csum(void); 170 static void bootcmds(void); 171 static void proccall(void); 172 static void show_tasks(void); 173 void dump_segments(void); 174 static void symbol_lookup(void); 175 static void xmon_show_stack(unsigned long sp, unsigned long lr, 176 unsigned long pc); 177 static void xmon_print_symbol(unsigned long address, const char *mid, 178 const char *after); 179 static const char *getvecname(unsigned long vec); 180 181 static int do_spu_cmd(void); 182 183 #ifdef CONFIG_44x 184 static void dump_tlb_44x(void); 185 #endif 186 #ifdef CONFIG_PPC_BOOK3E 187 static void dump_tlb_book3e(void); 188 #endif 189 190 #ifdef CONFIG_PPC64 191 #define REG "%.16lx" 192 #else 193 #define REG "%.8lx" 194 #endif 195 196 #ifdef __LITTLE_ENDIAN__ 197 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0]) 198 #else 199 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3]) 200 #endif 201 202 static char *help_string = "\ 203 Commands:\n\ 204 b show breakpoints\n\ 205 bd set data breakpoint\n\ 206 bi set instruction breakpoint\n\ 207 bc clear breakpoint\n" 208 #ifdef CONFIG_SMP 209 "\ 210 c print cpus stopped in xmon\n\ 211 c# try to switch to cpu number h (in hex)\n" 212 #endif 213 "\ 214 C checksum\n\ 215 d dump bytes\n\ 216 d1 dump 1 byte values\n\ 217 d2 dump 2 byte values\n\ 218 d4 dump 4 byte values\n\ 219 d8 dump 8 byte values\n\ 220 di dump instructions\n\ 221 df dump float values\n\ 222 dd dump double values\n\ 223 dl dump the kernel log buffer\n" 224 #ifdef CONFIG_PPC_POWERNV 225 "\ 226 do dump the OPAL message log\n" 227 #endif 228 #ifdef CONFIG_PPC64 229 "\ 230 dp[#] dump paca for current cpu, or cpu #\n\ 231 dpa dump paca for all possible cpus\n" 232 #endif 233 "\ 234 dr dump stream of raw bytes\n\ 235 dv dump virtual address translation \n\ 236 dt dump the tracing buffers (uses printk)\n\ 237 dtc dump the tracing buffers for current CPU (uses printk)\n\ 238 " 239 #ifdef CONFIG_PPC_POWERNV 240 " dx# dump xive on CPU #\n\ 241 dxi# dump xive irq state #\n\ 242 dxa dump xive on all CPUs\n" 243 #endif 244 " e print exception information\n\ 245 f flush cache\n\ 246 la lookup symbol+offset of specified address\n\ 247 ls lookup address of specified symbol\n\ 248 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\ 249 m examine/change memory\n\ 250 mm move a block of memory\n\ 251 ms set a block of memory\n\ 252 md compare two blocks of memory\n\ 253 ml locate a block of memory\n\ 254 mz zero a block of memory\n\ 255 mi show information about memory allocation\n\ 256 p call a procedure\n\ 257 P list processes/tasks\n\ 258 r print registers\n\ 259 s single step\n" 260 #ifdef CONFIG_SPU_BASE 261 " ss stop execution on all spus\n\ 262 sr restore execution on stopped spus\n\ 263 sf # dump spu fields for spu # (in hex)\n\ 264 sd # dump spu local store for spu # (in hex)\n\ 265 sdi # disassemble spu local store for spu # (in hex)\n" 266 #endif 267 " S print special registers\n\ 268 Sa print all SPRs\n\ 269 Sr # read SPR #\n\ 270 Sw #v write v to SPR #\n\ 271 t print backtrace\n\ 272 x exit monitor and recover\n\ 273 X exit monitor and don't recover\n" 274 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E) 275 " u dump segment table or SLB\n" 276 #elif defined(CONFIG_PPC_STD_MMU_32) 277 " u dump segment registers\n" 278 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E) 279 " u dump TLB\n" 280 #endif 281 " U show uptime information\n" 282 " ? help\n" 283 " # n limit output to n lines per page (for dp, dpa, dl)\n" 284 " zr reboot\n\ 285 zh halt\n" 286 ; 287 288 static struct pt_regs *xmon_regs; 289 290 static inline void sync(void) 291 { 292 asm volatile("sync; isync"); 293 } 294 295 static inline void store_inst(void *p) 296 { 297 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p)); 298 } 299 300 static inline void cflush(void *p) 301 { 302 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p)); 303 } 304 305 static inline void cinval(void *p) 306 { 307 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p)); 308 } 309 310 /** 311 * write_ciabr() - write the CIABR SPR 312 * @ciabr: The value to write. 313 * 314 * This function writes a value to the CIARB register either directly 315 * through mtspr instruction if the kernel is in HV privilege mode or 316 * call a hypervisor function to achieve the same in case the kernel 317 * is in supervisor privilege mode. 318 */ 319 static void write_ciabr(unsigned long ciabr) 320 { 321 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 322 return; 323 324 if (cpu_has_feature(CPU_FTR_HVMODE)) { 325 mtspr(SPRN_CIABR, ciabr); 326 return; 327 } 328 plpar_set_ciabr(ciabr); 329 } 330 331 /** 332 * set_ciabr() - set the CIABR 333 * @addr: The value to set. 334 * 335 * This function sets the correct privilege value into the the HW 336 * breakpoint address before writing it up in the CIABR register. 337 */ 338 static void set_ciabr(unsigned long addr) 339 { 340 addr &= ~CIABR_PRIV; 341 342 if (cpu_has_feature(CPU_FTR_HVMODE)) 343 addr |= CIABR_PRIV_HYPER; 344 else 345 addr |= CIABR_PRIV_SUPER; 346 write_ciabr(addr); 347 } 348 349 /* 350 * Disable surveillance (the service processor watchdog function) 351 * while we are in xmon. 352 * XXX we should re-enable it when we leave. :) 353 */ 354 #define SURVEILLANCE_TOKEN 9000 355 356 static inline void disable_surveillance(void) 357 { 358 #ifdef CONFIG_PPC_PSERIES 359 /* Since this can't be a module, args should end up below 4GB. */ 360 static struct rtas_args args; 361 int token; 362 363 /* 364 * At this point we have got all the cpus we can into 365 * xmon, so there is hopefully no other cpu calling RTAS 366 * at the moment, even though we don't take rtas.lock. 367 * If we did try to take rtas.lock there would be a 368 * real possibility of deadlock. 369 */ 370 token = rtas_token("set-indicator"); 371 if (token == RTAS_UNKNOWN_SERVICE) 372 return; 373 374 rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0); 375 376 #endif /* CONFIG_PPC_PSERIES */ 377 } 378 379 #ifdef CONFIG_SMP 380 static int xmon_speaker; 381 382 static void get_output_lock(void) 383 { 384 int me = smp_processor_id() + 0x100; 385 int last_speaker = 0, prev; 386 long timeout; 387 388 if (xmon_speaker == me) 389 return; 390 391 for (;;) { 392 last_speaker = cmpxchg(&xmon_speaker, 0, me); 393 if (last_speaker == 0) 394 return; 395 396 /* 397 * Wait a full second for the lock, we might be on a slow 398 * console, but check every 100us. 399 */ 400 timeout = 10000; 401 while (xmon_speaker == last_speaker) { 402 if (--timeout > 0) { 403 udelay(100); 404 continue; 405 } 406 407 /* hostile takeover */ 408 prev = cmpxchg(&xmon_speaker, last_speaker, me); 409 if (prev == last_speaker) 410 return; 411 break; 412 } 413 } 414 } 415 416 static void release_output_lock(void) 417 { 418 xmon_speaker = 0; 419 } 420 421 int cpus_are_in_xmon(void) 422 { 423 return !cpumask_empty(&cpus_in_xmon); 424 } 425 426 static bool wait_for_other_cpus(int ncpus) 427 { 428 unsigned long timeout; 429 430 /* We wait for 2s, which is a metric "little while" */ 431 for (timeout = 20000; timeout != 0; --timeout) { 432 if (cpumask_weight(&cpus_in_xmon) >= ncpus) 433 return true; 434 udelay(100); 435 barrier(); 436 } 437 438 return false; 439 } 440 #endif /* CONFIG_SMP */ 441 442 static inline int unrecoverable_excp(struct pt_regs *regs) 443 { 444 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E) 445 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */ 446 return 0; 447 #else 448 return ((regs->msr & MSR_RI) == 0); 449 #endif 450 } 451 452 static int xmon_core(struct pt_regs *regs, int fromipi) 453 { 454 int cmd = 0; 455 struct bpt *bp; 456 long recurse_jmp[JMP_BUF_LEN]; 457 unsigned long offset; 458 unsigned long flags; 459 #ifdef CONFIG_SMP 460 int cpu; 461 int secondary; 462 #endif 463 464 local_irq_save(flags); 465 hard_irq_disable(); 466 467 tracing_enabled = tracing_is_on(); 468 tracing_off(); 469 470 bp = in_breakpoint_table(regs->nip, &offset); 471 if (bp != NULL) { 472 regs->nip = bp->address + offset; 473 atomic_dec(&bp->ref_count); 474 } 475 476 remove_cpu_bpts(); 477 478 #ifdef CONFIG_SMP 479 cpu = smp_processor_id(); 480 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 481 /* 482 * We catch SPR read/write faults here because the 0x700, 0xf60 483 * etc. handlers don't call debugger_fault_handler(). 484 */ 485 if (catch_spr_faults) 486 longjmp(bus_error_jmp, 1); 487 get_output_lock(); 488 excprint(regs); 489 printf("cpu 0x%x: Exception %lx %s in xmon, " 490 "returning to main loop\n", 491 cpu, regs->trap, getvecname(TRAP(regs))); 492 release_output_lock(); 493 longjmp(xmon_fault_jmp[cpu], 1); 494 } 495 496 if (setjmp(recurse_jmp) != 0) { 497 if (!in_xmon || !xmon_gate) { 498 get_output_lock(); 499 printf("xmon: WARNING: bad recursive fault " 500 "on cpu 0x%x\n", cpu); 501 release_output_lock(); 502 goto waiting; 503 } 504 secondary = !(xmon_taken && cpu == xmon_owner); 505 goto cmdloop; 506 } 507 508 xmon_fault_jmp[cpu] = recurse_jmp; 509 510 bp = NULL; 511 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) 512 bp = at_breakpoint(regs->nip); 513 if (bp || unrecoverable_excp(regs)) 514 fromipi = 0; 515 516 if (!fromipi) { 517 get_output_lock(); 518 excprint(regs); 519 if (bp) { 520 printf("cpu 0x%x stopped at breakpoint 0x%tx (", 521 cpu, BP_NUM(bp)); 522 xmon_print_symbol(regs->nip, " ", ")\n"); 523 } 524 if (unrecoverable_excp(regs)) 525 printf("WARNING: exception is not recoverable, " 526 "can't continue\n"); 527 release_output_lock(); 528 } 529 530 cpumask_set_cpu(cpu, &cpus_in_xmon); 531 532 waiting: 533 secondary = 1; 534 spin_begin(); 535 while (secondary && !xmon_gate) { 536 if (in_xmon == 0) { 537 if (fromipi) { 538 spin_end(); 539 goto leave; 540 } 541 secondary = test_and_set_bit(0, &in_xmon); 542 } 543 spin_cpu_relax(); 544 touch_nmi_watchdog(); 545 } 546 spin_end(); 547 548 if (!secondary && !xmon_gate) { 549 /* we are the first cpu to come in */ 550 /* interrupt other cpu(s) */ 551 int ncpus = num_online_cpus(); 552 553 xmon_owner = cpu; 554 mb(); 555 if (ncpus > 1) { 556 /* 557 * A system reset (trap == 0x100) can be triggered on 558 * all CPUs, so when we come in via 0x100 try waiting 559 * for the other CPUs to come in before we send the 560 * debugger break (IPI). This is similar to 561 * crash_kexec_secondary(). 562 */ 563 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus)) 564 smp_send_debugger_break(); 565 566 wait_for_other_cpus(ncpus); 567 } 568 remove_bpts(); 569 disable_surveillance(); 570 /* for breakpoint or single step, print the current instr. */ 571 if (bp || TRAP(regs) == 0xd00) 572 ppc_inst_dump(regs->nip, 1, 0); 573 printf("enter ? for help\n"); 574 mb(); 575 xmon_gate = 1; 576 barrier(); 577 touch_nmi_watchdog(); 578 } 579 580 cmdloop: 581 while (in_xmon) { 582 if (secondary) { 583 spin_begin(); 584 if (cpu == xmon_owner) { 585 if (!test_and_set_bit(0, &xmon_taken)) { 586 secondary = 0; 587 spin_end(); 588 continue; 589 } 590 /* missed it */ 591 while (cpu == xmon_owner) 592 spin_cpu_relax(); 593 } 594 spin_cpu_relax(); 595 touch_nmi_watchdog(); 596 } else { 597 cmd = cmds(regs); 598 if (cmd != 0) { 599 /* exiting xmon */ 600 insert_bpts(); 601 xmon_gate = 0; 602 wmb(); 603 in_xmon = 0; 604 break; 605 } 606 /* have switched to some other cpu */ 607 secondary = 1; 608 } 609 } 610 leave: 611 cpumask_clear_cpu(cpu, &cpus_in_xmon); 612 xmon_fault_jmp[cpu] = NULL; 613 #else 614 /* UP is simple... */ 615 if (in_xmon) { 616 printf("Exception %lx %s in xmon, returning to main loop\n", 617 regs->trap, getvecname(TRAP(regs))); 618 longjmp(xmon_fault_jmp[0], 1); 619 } 620 if (setjmp(recurse_jmp) == 0) { 621 xmon_fault_jmp[0] = recurse_jmp; 622 in_xmon = 1; 623 624 excprint(regs); 625 bp = at_breakpoint(regs->nip); 626 if (bp) { 627 printf("Stopped at breakpoint %tx (", BP_NUM(bp)); 628 xmon_print_symbol(regs->nip, " ", ")\n"); 629 } 630 if (unrecoverable_excp(regs)) 631 printf("WARNING: exception is not recoverable, " 632 "can't continue\n"); 633 remove_bpts(); 634 disable_surveillance(); 635 /* for breakpoint or single step, print the current instr. */ 636 if (bp || TRAP(regs) == 0xd00) 637 ppc_inst_dump(regs->nip, 1, 0); 638 printf("enter ? for help\n"); 639 } 640 641 cmd = cmds(regs); 642 643 insert_bpts(); 644 in_xmon = 0; 645 #endif 646 647 #ifdef CONFIG_BOOKE 648 if (regs->msr & MSR_DE) { 649 bp = at_breakpoint(regs->nip); 650 if (bp != NULL) { 651 regs->nip = (unsigned long) &bp->instr[0]; 652 atomic_inc(&bp->ref_count); 653 } 654 } 655 #else 656 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 657 bp = at_breakpoint(regs->nip); 658 if (bp != NULL) { 659 int stepped = emulate_step(regs, bp->instr[0]); 660 if (stepped == 0) { 661 regs->nip = (unsigned long) &bp->instr[0]; 662 atomic_inc(&bp->ref_count); 663 } else if (stepped < 0) { 664 printf("Couldn't single-step %s instruction\n", 665 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd")); 666 } 667 } 668 } 669 #endif 670 insert_cpu_bpts(); 671 672 touch_nmi_watchdog(); 673 local_irq_restore(flags); 674 675 return cmd != 'X' && cmd != EOF; 676 } 677 678 int xmon(struct pt_regs *excp) 679 { 680 struct pt_regs regs; 681 682 if (excp == NULL) { 683 ppc_save_regs(®s); 684 excp = ®s; 685 } 686 687 return xmon_core(excp, 0); 688 } 689 EXPORT_SYMBOL(xmon); 690 691 irqreturn_t xmon_irq(int irq, void *d) 692 { 693 unsigned long flags; 694 local_irq_save(flags); 695 printf("Keyboard interrupt\n"); 696 xmon(get_irq_regs()); 697 local_irq_restore(flags); 698 return IRQ_HANDLED; 699 } 700 701 static int xmon_bpt(struct pt_regs *regs) 702 { 703 struct bpt *bp; 704 unsigned long offset; 705 706 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 707 return 0; 708 709 /* Are we at the trap at bp->instr[1] for some bp? */ 710 bp = in_breakpoint_table(regs->nip, &offset); 711 if (bp != NULL && offset == 4) { 712 regs->nip = bp->address + 4; 713 atomic_dec(&bp->ref_count); 714 return 1; 715 } 716 717 /* Are we at a breakpoint? */ 718 bp = at_breakpoint(regs->nip); 719 if (!bp) 720 return 0; 721 722 xmon_core(regs, 0); 723 724 return 1; 725 } 726 727 static int xmon_sstep(struct pt_regs *regs) 728 { 729 if (user_mode(regs)) 730 return 0; 731 xmon_core(regs, 0); 732 return 1; 733 } 734 735 static int xmon_break_match(struct pt_regs *regs) 736 { 737 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 738 return 0; 739 if (dabr.enabled == 0) 740 return 0; 741 xmon_core(regs, 0); 742 return 1; 743 } 744 745 static int xmon_iabr_match(struct pt_regs *regs) 746 { 747 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 748 return 0; 749 if (iabr == NULL) 750 return 0; 751 xmon_core(regs, 0); 752 return 1; 753 } 754 755 static int xmon_ipi(struct pt_regs *regs) 756 { 757 #ifdef CONFIG_SMP 758 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon)) 759 xmon_core(regs, 1); 760 #endif 761 return 0; 762 } 763 764 static int xmon_fault_handler(struct pt_regs *regs) 765 { 766 struct bpt *bp; 767 unsigned long offset; 768 769 if (in_xmon && catch_memory_errors) 770 handle_fault(regs); /* doesn't return */ 771 772 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 773 bp = in_breakpoint_table(regs->nip, &offset); 774 if (bp != NULL) { 775 regs->nip = bp->address + offset; 776 atomic_dec(&bp->ref_count); 777 } 778 } 779 780 return 0; 781 } 782 783 /* Force enable xmon if not already enabled */ 784 static inline void force_enable_xmon(void) 785 { 786 /* Enable xmon hooks if needed */ 787 if (!xmon_on) { 788 printf("xmon: Enabling debugger hooks\n"); 789 xmon_on = 1; 790 } 791 } 792 793 static struct bpt *at_breakpoint(unsigned long pc) 794 { 795 int i; 796 struct bpt *bp; 797 798 bp = bpts; 799 for (i = 0; i < NBPTS; ++i, ++bp) 800 if (bp->enabled && pc == bp->address) 801 return bp; 802 return NULL; 803 } 804 805 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp) 806 { 807 unsigned long off; 808 809 off = nip - (unsigned long) bpts; 810 if (off >= sizeof(bpts)) 811 return NULL; 812 off %= sizeof(struct bpt); 813 if (off != offsetof(struct bpt, instr[0]) 814 && off != offsetof(struct bpt, instr[1])) 815 return NULL; 816 *offp = off - offsetof(struct bpt, instr[0]); 817 return (struct bpt *) (nip - off); 818 } 819 820 static struct bpt *new_breakpoint(unsigned long a) 821 { 822 struct bpt *bp; 823 824 a &= ~3UL; 825 bp = at_breakpoint(a); 826 if (bp) 827 return bp; 828 829 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 830 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) { 831 bp->address = a; 832 bp->instr[1] = bpinstr; 833 store_inst(&bp->instr[1]); 834 return bp; 835 } 836 } 837 838 printf("Sorry, no free breakpoints. Please clear one first.\n"); 839 return NULL; 840 } 841 842 static void insert_bpts(void) 843 { 844 int i; 845 struct bpt *bp; 846 847 bp = bpts; 848 for (i = 0; i < NBPTS; ++i, ++bp) { 849 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0) 850 continue; 851 if (mread(bp->address, &bp->instr[0], 4) != 4) { 852 printf("Couldn't read instruction at %lx, " 853 "disabling breakpoint there\n", bp->address); 854 bp->enabled = 0; 855 continue; 856 } 857 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) { 858 printf("Breakpoint at %lx is on an mtmsrd or rfid " 859 "instruction, disabling it\n", bp->address); 860 bp->enabled = 0; 861 continue; 862 } 863 store_inst(&bp->instr[0]); 864 if (bp->enabled & BP_CIABR) 865 continue; 866 if (patch_instruction((unsigned int *)bp->address, 867 bpinstr) != 0) { 868 printf("Couldn't write instruction at %lx, " 869 "disabling breakpoint there\n", bp->address); 870 bp->enabled &= ~BP_TRAP; 871 continue; 872 } 873 store_inst((void *)bp->address); 874 } 875 } 876 877 static void insert_cpu_bpts(void) 878 { 879 struct arch_hw_breakpoint brk; 880 881 if (dabr.enabled) { 882 brk.address = dabr.address; 883 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL; 884 brk.len = 8; 885 __set_breakpoint(&brk); 886 } 887 888 if (iabr) 889 set_ciabr(iabr->address); 890 } 891 892 static void remove_bpts(void) 893 { 894 int i; 895 struct bpt *bp; 896 unsigned instr; 897 898 bp = bpts; 899 for (i = 0; i < NBPTS; ++i, ++bp) { 900 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) 901 continue; 902 if (mread(bp->address, &instr, 4) == 4 903 && instr == bpinstr 904 && patch_instruction( 905 (unsigned int *)bp->address, bp->instr[0]) != 0) 906 printf("Couldn't remove breakpoint at %lx\n", 907 bp->address); 908 else 909 store_inst((void *)bp->address); 910 } 911 } 912 913 static void remove_cpu_bpts(void) 914 { 915 hw_breakpoint_disable(); 916 write_ciabr(0); 917 } 918 919 /* Based on uptime_proc_show(). */ 920 static void 921 show_uptime(void) 922 { 923 struct timespec64 uptime; 924 925 if (setjmp(bus_error_jmp) == 0) { 926 catch_memory_errors = 1; 927 sync(); 928 929 ktime_get_coarse_boottime_ts64(&uptime); 930 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec, 931 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100))); 932 933 sync(); 934 __delay(200); \ 935 } 936 catch_memory_errors = 0; 937 } 938 939 static void set_lpp_cmd(void) 940 { 941 unsigned long lpp; 942 943 if (!scanhex(&lpp)) { 944 printf("Invalid number.\n"); 945 lpp = 0; 946 } 947 xmon_set_pagination_lpp(lpp); 948 } 949 /* Command interpreting routine */ 950 static char *last_cmd; 951 952 static int 953 cmds(struct pt_regs *excp) 954 { 955 int cmd = 0; 956 957 last_cmd = NULL; 958 xmon_regs = excp; 959 960 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 961 962 for(;;) { 963 #ifdef CONFIG_SMP 964 printf("%x:", smp_processor_id()); 965 #endif /* CONFIG_SMP */ 966 printf("mon> "); 967 flush_input(); 968 termch = 0; 969 cmd = skipbl(); 970 if( cmd == '\n' ) { 971 if (last_cmd == NULL) 972 continue; 973 take_input(last_cmd); 974 last_cmd = NULL; 975 cmd = inchar(); 976 } 977 switch (cmd) { 978 case 'm': 979 cmd = inchar(); 980 switch (cmd) { 981 case 'm': 982 case 's': 983 case 'd': 984 memops(cmd); 985 break; 986 case 'l': 987 memlocate(); 988 break; 989 case 'z': 990 memzcan(); 991 break; 992 case 'i': 993 show_mem(0, NULL); 994 break; 995 default: 996 termch = cmd; 997 memex(); 998 } 999 break; 1000 case 'd': 1001 dump(); 1002 break; 1003 case 'l': 1004 symbol_lookup(); 1005 break; 1006 case 'r': 1007 prregs(excp); /* print regs */ 1008 break; 1009 case 'e': 1010 excprint(excp); 1011 break; 1012 case 'S': 1013 super_regs(); 1014 break; 1015 case 't': 1016 backtrace(excp); 1017 break; 1018 case 'f': 1019 cacheflush(); 1020 break; 1021 case 's': 1022 if (do_spu_cmd() == 0) 1023 break; 1024 if (do_step(excp)) 1025 return cmd; 1026 break; 1027 case 'x': 1028 case 'X': 1029 if (tracing_enabled) 1030 tracing_on(); 1031 return cmd; 1032 case EOF: 1033 printf(" <no input ...>\n"); 1034 mdelay(2000); 1035 return cmd; 1036 case '?': 1037 xmon_puts(help_string); 1038 break; 1039 case '#': 1040 set_lpp_cmd(); 1041 break; 1042 case 'b': 1043 bpt_cmds(); 1044 break; 1045 case 'C': 1046 csum(); 1047 break; 1048 case 'c': 1049 if (cpu_cmd()) 1050 return 0; 1051 break; 1052 case 'z': 1053 bootcmds(); 1054 break; 1055 case 'p': 1056 proccall(); 1057 break; 1058 case 'P': 1059 show_tasks(); 1060 break; 1061 #ifdef CONFIG_PPC_STD_MMU 1062 case 'u': 1063 dump_segments(); 1064 break; 1065 #elif defined(CONFIG_44x) 1066 case 'u': 1067 dump_tlb_44x(); 1068 break; 1069 #elif defined(CONFIG_PPC_BOOK3E) 1070 case 'u': 1071 dump_tlb_book3e(); 1072 break; 1073 #endif 1074 case 'U': 1075 show_uptime(); 1076 break; 1077 default: 1078 printf("Unrecognized command: "); 1079 do { 1080 if (' ' < cmd && cmd <= '~') 1081 putchar(cmd); 1082 else 1083 printf("\\x%x", cmd); 1084 cmd = inchar(); 1085 } while (cmd != '\n'); 1086 printf(" (type ? for help)\n"); 1087 break; 1088 } 1089 } 1090 } 1091 1092 #ifdef CONFIG_BOOKE 1093 static int do_step(struct pt_regs *regs) 1094 { 1095 regs->msr |= MSR_DE; 1096 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 1097 return 1; 1098 } 1099 #else 1100 /* 1101 * Step a single instruction. 1102 * Some instructions we emulate, others we execute with MSR_SE set. 1103 */ 1104 static int do_step(struct pt_regs *regs) 1105 { 1106 unsigned int instr; 1107 int stepped; 1108 1109 force_enable_xmon(); 1110 /* check we are in 64-bit kernel mode, translation enabled */ 1111 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { 1112 if (mread(regs->nip, &instr, 4) == 4) { 1113 stepped = emulate_step(regs, instr); 1114 if (stepped < 0) { 1115 printf("Couldn't single-step %s instruction\n", 1116 (IS_RFID(instr)? "rfid": "mtmsrd")); 1117 return 0; 1118 } 1119 if (stepped > 0) { 1120 regs->trap = 0xd00 | (regs->trap & 1); 1121 printf("stepped to "); 1122 xmon_print_symbol(regs->nip, " ", "\n"); 1123 ppc_inst_dump(regs->nip, 1, 0); 1124 return 0; 1125 } 1126 } 1127 } 1128 regs->msr |= MSR_SE; 1129 return 1; 1130 } 1131 #endif 1132 1133 static void bootcmds(void) 1134 { 1135 int cmd; 1136 1137 cmd = inchar(); 1138 if (cmd == 'r') 1139 ppc_md.restart(NULL); 1140 else if (cmd == 'h') 1141 ppc_md.halt(); 1142 else if (cmd == 'p') 1143 if (pm_power_off) 1144 pm_power_off(); 1145 } 1146 1147 static int cpu_cmd(void) 1148 { 1149 #ifdef CONFIG_SMP 1150 unsigned long cpu, first_cpu, last_cpu; 1151 int timeout; 1152 1153 if (!scanhex(&cpu)) { 1154 /* print cpus waiting or in xmon */ 1155 printf("cpus stopped:"); 1156 last_cpu = first_cpu = NR_CPUS; 1157 for_each_possible_cpu(cpu) { 1158 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1159 if (cpu == last_cpu + 1) { 1160 last_cpu = cpu; 1161 } else { 1162 if (last_cpu != first_cpu) 1163 printf("-0x%lx", last_cpu); 1164 last_cpu = first_cpu = cpu; 1165 printf(" 0x%lx", cpu); 1166 } 1167 } 1168 } 1169 if (last_cpu != first_cpu) 1170 printf("-0x%lx", last_cpu); 1171 printf("\n"); 1172 return 0; 1173 } 1174 /* try to switch to cpu specified */ 1175 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1176 printf("cpu 0x%lx isn't in xmon\n", cpu); 1177 #ifdef CONFIG_PPC64 1178 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu); 1179 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0); 1180 #endif 1181 return 0; 1182 } 1183 xmon_taken = 0; 1184 mb(); 1185 xmon_owner = cpu; 1186 timeout = 10000000; 1187 while (!xmon_taken) { 1188 if (--timeout == 0) { 1189 if (test_and_set_bit(0, &xmon_taken)) 1190 break; 1191 /* take control back */ 1192 mb(); 1193 xmon_owner = smp_processor_id(); 1194 printf("cpu 0x%lx didn't take control\n", cpu); 1195 return 0; 1196 } 1197 barrier(); 1198 } 1199 return 1; 1200 #else 1201 return 0; 1202 #endif /* CONFIG_SMP */ 1203 } 1204 1205 static unsigned short fcstab[256] = { 1206 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 1207 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, 1208 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 1209 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, 1210 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, 1211 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, 1212 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, 1213 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, 1214 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, 1215 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, 1216 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, 1217 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, 1218 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, 1219 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, 1220 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, 1221 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, 1222 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, 1223 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, 1224 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, 1225 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, 1226 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, 1227 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, 1228 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, 1229 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, 1230 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, 1231 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, 1232 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, 1233 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, 1234 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, 1235 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, 1236 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, 1237 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 1238 }; 1239 1240 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) 1241 1242 static void 1243 csum(void) 1244 { 1245 unsigned int i; 1246 unsigned short fcs; 1247 unsigned char v; 1248 1249 if (!scanhex(&adrs)) 1250 return; 1251 if (!scanhex(&ncsum)) 1252 return; 1253 fcs = 0xffff; 1254 for (i = 0; i < ncsum; ++i) { 1255 if (mread(adrs+i, &v, 1) == 0) { 1256 printf("csum stopped at "REG"\n", adrs+i); 1257 break; 1258 } 1259 fcs = FCS(fcs, v); 1260 } 1261 printf("%x\n", fcs); 1262 } 1263 1264 /* 1265 * Check if this is a suitable place to put a breakpoint. 1266 */ 1267 static long check_bp_loc(unsigned long addr) 1268 { 1269 unsigned int instr; 1270 1271 addr &= ~3; 1272 if (!is_kernel_addr(addr)) { 1273 printf("Breakpoints may only be placed at kernel addresses\n"); 1274 return 0; 1275 } 1276 if (!mread(addr, &instr, sizeof(instr))) { 1277 printf("Can't read instruction at address %lx\n", addr); 1278 return 0; 1279 } 1280 if (IS_MTMSRD(instr) || IS_RFID(instr)) { 1281 printf("Breakpoints may not be placed on mtmsrd or rfid " 1282 "instructions\n"); 1283 return 0; 1284 } 1285 return 1; 1286 } 1287 1288 static char *breakpoint_help_string = 1289 "Breakpoint command usage:\n" 1290 "b show breakpoints\n" 1291 "b <addr> [cnt] set breakpoint at given instr addr\n" 1292 "bc clear all breakpoints\n" 1293 "bc <n/addr> clear breakpoint number n or at addr\n" 1294 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n" 1295 "bd <addr> [cnt] set hardware data breakpoint\n" 1296 ""; 1297 1298 static void 1299 bpt_cmds(void) 1300 { 1301 int cmd; 1302 unsigned long a; 1303 int i; 1304 struct bpt *bp; 1305 1306 cmd = inchar(); 1307 switch (cmd) { 1308 #ifndef CONFIG_PPC_8xx 1309 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n"; 1310 int mode; 1311 case 'd': /* bd - hardware data breakpoint */ 1312 if (!ppc_breakpoint_available()) { 1313 printf("Hardware data breakpoint not supported on this cpu\n"); 1314 break; 1315 } 1316 mode = 7; 1317 cmd = inchar(); 1318 if (cmd == 'r') 1319 mode = 5; 1320 else if (cmd == 'w') 1321 mode = 6; 1322 else 1323 termch = cmd; 1324 dabr.address = 0; 1325 dabr.enabled = 0; 1326 if (scanhex(&dabr.address)) { 1327 if (!is_kernel_addr(dabr.address)) { 1328 printf(badaddr); 1329 break; 1330 } 1331 dabr.address &= ~HW_BRK_TYPE_DABR; 1332 dabr.enabled = mode | BP_DABR; 1333 } 1334 1335 force_enable_xmon(); 1336 break; 1337 1338 case 'i': /* bi - hardware instr breakpoint */ 1339 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) { 1340 printf("Hardware instruction breakpoint " 1341 "not supported on this cpu\n"); 1342 break; 1343 } 1344 if (iabr) { 1345 iabr->enabled &= ~BP_CIABR; 1346 iabr = NULL; 1347 } 1348 if (!scanhex(&a)) 1349 break; 1350 if (!check_bp_loc(a)) 1351 break; 1352 bp = new_breakpoint(a); 1353 if (bp != NULL) { 1354 bp->enabled |= BP_CIABR; 1355 iabr = bp; 1356 force_enable_xmon(); 1357 } 1358 break; 1359 #endif 1360 1361 case 'c': 1362 if (!scanhex(&a)) { 1363 /* clear all breakpoints */ 1364 for (i = 0; i < NBPTS; ++i) 1365 bpts[i].enabled = 0; 1366 iabr = NULL; 1367 dabr.enabled = 0; 1368 printf("All breakpoints cleared\n"); 1369 break; 1370 } 1371 1372 if (a <= NBPTS && a >= 1) { 1373 /* assume a breakpoint number */ 1374 bp = &bpts[a-1]; /* bp nums are 1 based */ 1375 } else { 1376 /* assume a breakpoint address */ 1377 bp = at_breakpoint(a); 1378 if (bp == NULL) { 1379 printf("No breakpoint at %lx\n", a); 1380 break; 1381 } 1382 } 1383 1384 printf("Cleared breakpoint %tx (", BP_NUM(bp)); 1385 xmon_print_symbol(bp->address, " ", ")\n"); 1386 bp->enabled = 0; 1387 break; 1388 1389 default: 1390 termch = cmd; 1391 cmd = skipbl(); 1392 if (cmd == '?') { 1393 printf(breakpoint_help_string); 1394 break; 1395 } 1396 termch = cmd; 1397 if (!scanhex(&a)) { 1398 /* print all breakpoints */ 1399 printf(" type address\n"); 1400 if (dabr.enabled) { 1401 printf(" data "REG" [", dabr.address); 1402 if (dabr.enabled & 1) 1403 printf("r"); 1404 if (dabr.enabled & 2) 1405 printf("w"); 1406 printf("]\n"); 1407 } 1408 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 1409 if (!bp->enabled) 1410 continue; 1411 printf("%tx %s ", BP_NUM(bp), 1412 (bp->enabled & BP_CIABR) ? "inst": "trap"); 1413 xmon_print_symbol(bp->address, " ", "\n"); 1414 } 1415 break; 1416 } 1417 1418 if (!check_bp_loc(a)) 1419 break; 1420 bp = new_breakpoint(a); 1421 if (bp != NULL) { 1422 bp->enabled |= BP_TRAP; 1423 force_enable_xmon(); 1424 } 1425 break; 1426 } 1427 } 1428 1429 /* Very cheap human name for vector lookup. */ 1430 static 1431 const char *getvecname(unsigned long vec) 1432 { 1433 char *ret; 1434 1435 switch (vec) { 1436 case 0x100: ret = "(System Reset)"; break; 1437 case 0x200: ret = "(Machine Check)"; break; 1438 case 0x300: ret = "(Data Access)"; break; 1439 case 0x380: 1440 if (radix_enabled()) 1441 ret = "(Data Access Out of Range)"; 1442 else 1443 ret = "(Data SLB Access)"; 1444 break; 1445 case 0x400: ret = "(Instruction Access)"; break; 1446 case 0x480: 1447 if (radix_enabled()) 1448 ret = "(Instruction Access Out of Range)"; 1449 else 1450 ret = "(Instruction SLB Access)"; 1451 break; 1452 case 0x500: ret = "(Hardware Interrupt)"; break; 1453 case 0x600: ret = "(Alignment)"; break; 1454 case 0x700: ret = "(Program Check)"; break; 1455 case 0x800: ret = "(FPU Unavailable)"; break; 1456 case 0x900: ret = "(Decrementer)"; break; 1457 case 0x980: ret = "(Hypervisor Decrementer)"; break; 1458 case 0xa00: ret = "(Doorbell)"; break; 1459 case 0xc00: ret = "(System Call)"; break; 1460 case 0xd00: ret = "(Single Step)"; break; 1461 case 0xe40: ret = "(Emulation Assist)"; break; 1462 case 0xe60: ret = "(HMI)"; break; 1463 case 0xe80: ret = "(Hypervisor Doorbell)"; break; 1464 case 0xf00: ret = "(Performance Monitor)"; break; 1465 case 0xf20: ret = "(Altivec Unavailable)"; break; 1466 case 0x1300: ret = "(Instruction Breakpoint)"; break; 1467 case 0x1500: ret = "(Denormalisation)"; break; 1468 case 0x1700: ret = "(Altivec Assist)"; break; 1469 default: ret = ""; 1470 } 1471 return ret; 1472 } 1473 1474 static void get_function_bounds(unsigned long pc, unsigned long *startp, 1475 unsigned long *endp) 1476 { 1477 unsigned long size, offset; 1478 const char *name; 1479 1480 *startp = *endp = 0; 1481 if (pc == 0) 1482 return; 1483 if (setjmp(bus_error_jmp) == 0) { 1484 catch_memory_errors = 1; 1485 sync(); 1486 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr); 1487 if (name != NULL) { 1488 *startp = pc - offset; 1489 *endp = pc - offset + size; 1490 } 1491 sync(); 1492 } 1493 catch_memory_errors = 0; 1494 } 1495 1496 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long)) 1497 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long)) 1498 1499 static void xmon_show_stack(unsigned long sp, unsigned long lr, 1500 unsigned long pc) 1501 { 1502 int max_to_print = 64; 1503 unsigned long ip; 1504 unsigned long newsp; 1505 unsigned long marker; 1506 struct pt_regs regs; 1507 1508 while (max_to_print--) { 1509 if (!is_kernel_addr(sp)) { 1510 if (sp != 0) 1511 printf("SP (%lx) is in userspace\n", sp); 1512 break; 1513 } 1514 1515 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long)) 1516 || !mread(sp, &newsp, sizeof(unsigned long))) { 1517 printf("Couldn't read stack frame at %lx\n", sp); 1518 break; 1519 } 1520 1521 /* 1522 * For the first stack frame, try to work out if 1523 * LR and/or the saved LR value in the bottommost 1524 * stack frame are valid. 1525 */ 1526 if ((pc | lr) != 0) { 1527 unsigned long fnstart, fnend; 1528 unsigned long nextip; 1529 int printip = 1; 1530 1531 get_function_bounds(pc, &fnstart, &fnend); 1532 nextip = 0; 1533 if (newsp > sp) 1534 mread(newsp + LRSAVE_OFFSET, &nextip, 1535 sizeof(unsigned long)); 1536 if (lr == ip) { 1537 if (!is_kernel_addr(lr) 1538 || (fnstart <= lr && lr < fnend)) 1539 printip = 0; 1540 } else if (lr == nextip) { 1541 printip = 0; 1542 } else if (is_kernel_addr(lr) 1543 && !(fnstart <= lr && lr < fnend)) { 1544 printf("[link register ] "); 1545 xmon_print_symbol(lr, " ", "\n"); 1546 } 1547 if (printip) { 1548 printf("["REG"] ", sp); 1549 xmon_print_symbol(ip, " ", " (unreliable)\n"); 1550 } 1551 pc = lr = 0; 1552 1553 } else { 1554 printf("["REG"] ", sp); 1555 xmon_print_symbol(ip, " ", "\n"); 1556 } 1557 1558 /* Look for "regshere" marker to see if this is 1559 an exception frame. */ 1560 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long)) 1561 && marker == STACK_FRAME_REGS_MARKER) { 1562 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs)) 1563 != sizeof(regs)) { 1564 printf("Couldn't read registers at %lx\n", 1565 sp + STACK_FRAME_OVERHEAD); 1566 break; 1567 } 1568 printf("--- Exception: %lx %s at ", regs.trap, 1569 getvecname(TRAP(®s))); 1570 pc = regs.nip; 1571 lr = regs.link; 1572 xmon_print_symbol(pc, " ", "\n"); 1573 } 1574 1575 if (newsp == 0) 1576 break; 1577 1578 sp = newsp; 1579 } 1580 } 1581 1582 static void backtrace(struct pt_regs *excp) 1583 { 1584 unsigned long sp; 1585 1586 if (scanhex(&sp)) 1587 xmon_show_stack(sp, 0, 0); 1588 else 1589 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1590 scannl(); 1591 } 1592 1593 static void print_bug_trap(struct pt_regs *regs) 1594 { 1595 #ifdef CONFIG_BUG 1596 const struct bug_entry *bug; 1597 unsigned long addr; 1598 1599 if (regs->msr & MSR_PR) 1600 return; /* not in kernel */ 1601 addr = regs->nip; /* address of trap instruction */ 1602 if (!is_kernel_addr(addr)) 1603 return; 1604 bug = find_bug(regs->nip); 1605 if (bug == NULL) 1606 return; 1607 if (is_warning_bug(bug)) 1608 return; 1609 1610 #ifdef CONFIG_DEBUG_BUGVERBOSE 1611 printf("kernel BUG at %s:%u!\n", 1612 bug->file, bug->line); 1613 #else 1614 printf("kernel BUG at %px!\n", (void *)bug->bug_addr); 1615 #endif 1616 #endif /* CONFIG_BUG */ 1617 } 1618 1619 static void excprint(struct pt_regs *fp) 1620 { 1621 unsigned long trap; 1622 1623 #ifdef CONFIG_SMP 1624 printf("cpu 0x%x: ", smp_processor_id()); 1625 #endif /* CONFIG_SMP */ 1626 1627 trap = TRAP(fp); 1628 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp); 1629 printf(" pc: "); 1630 xmon_print_symbol(fp->nip, ": ", "\n"); 1631 1632 printf(" lr: "); 1633 xmon_print_symbol(fp->link, ": ", "\n"); 1634 1635 printf(" sp: %lx\n", fp->gpr[1]); 1636 printf(" msr: %lx\n", fp->msr); 1637 1638 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) { 1639 printf(" dar: %lx\n", fp->dar); 1640 if (trap != 0x380) 1641 printf(" dsisr: %lx\n", fp->dsisr); 1642 } 1643 1644 printf(" current = 0x%px\n", current); 1645 #ifdef CONFIG_PPC64 1646 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n", 1647 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened); 1648 #endif 1649 if (current) { 1650 printf(" pid = %d, comm = %s\n", 1651 current->pid, current->comm); 1652 } 1653 1654 if (trap == 0x700) 1655 print_bug_trap(fp); 1656 1657 printf(linux_banner); 1658 } 1659 1660 static void prregs(struct pt_regs *fp) 1661 { 1662 int n, trap; 1663 unsigned long base; 1664 struct pt_regs regs; 1665 1666 if (scanhex(&base)) { 1667 if (setjmp(bus_error_jmp) == 0) { 1668 catch_memory_errors = 1; 1669 sync(); 1670 regs = *(struct pt_regs *)base; 1671 sync(); 1672 __delay(200); 1673 } else { 1674 catch_memory_errors = 0; 1675 printf("*** Error reading registers from "REG"\n", 1676 base); 1677 return; 1678 } 1679 catch_memory_errors = 0; 1680 fp = ®s; 1681 } 1682 1683 #ifdef CONFIG_PPC64 1684 if (FULL_REGS(fp)) { 1685 for (n = 0; n < 16; ++n) 1686 printf("R%.2d = "REG" R%.2d = "REG"\n", 1687 n, fp->gpr[n], n+16, fp->gpr[n+16]); 1688 } else { 1689 for (n = 0; n < 7; ++n) 1690 printf("R%.2d = "REG" R%.2d = "REG"\n", 1691 n, fp->gpr[n], n+7, fp->gpr[n+7]); 1692 } 1693 #else 1694 for (n = 0; n < 32; ++n) { 1695 printf("R%.2d = %.8lx%s", n, fp->gpr[n], 1696 (n & 3) == 3? "\n": " "); 1697 if (n == 12 && !FULL_REGS(fp)) { 1698 printf("\n"); 1699 break; 1700 } 1701 } 1702 #endif 1703 printf("pc = "); 1704 xmon_print_symbol(fp->nip, " ", "\n"); 1705 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) { 1706 printf("cfar= "); 1707 xmon_print_symbol(fp->orig_gpr3, " ", "\n"); 1708 } 1709 printf("lr = "); 1710 xmon_print_symbol(fp->link, " ", "\n"); 1711 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr); 1712 printf("ctr = "REG" xer = "REG" trap = %4lx\n", 1713 fp->ctr, fp->xer, fp->trap); 1714 trap = TRAP(fp); 1715 if (trap == 0x300 || trap == 0x380 || trap == 0x600) 1716 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); 1717 } 1718 1719 static void cacheflush(void) 1720 { 1721 int cmd; 1722 unsigned long nflush; 1723 1724 cmd = inchar(); 1725 if (cmd != 'i') 1726 termch = cmd; 1727 scanhex((void *)&adrs); 1728 if (termch != '\n') 1729 termch = 0; 1730 nflush = 1; 1731 scanhex(&nflush); 1732 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES; 1733 if (setjmp(bus_error_jmp) == 0) { 1734 catch_memory_errors = 1; 1735 sync(); 1736 1737 if (cmd != 'i') { 1738 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1739 cflush((void *) adrs); 1740 } else { 1741 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1742 cinval((void *) adrs); 1743 } 1744 sync(); 1745 /* wait a little while to see if we get a machine check */ 1746 __delay(200); 1747 } 1748 catch_memory_errors = 0; 1749 } 1750 1751 extern unsigned long xmon_mfspr(int spr, unsigned long default_value); 1752 extern void xmon_mtspr(int spr, unsigned long value); 1753 1754 static int 1755 read_spr(int n, unsigned long *vp) 1756 { 1757 unsigned long ret = -1UL; 1758 int ok = 0; 1759 1760 if (setjmp(bus_error_jmp) == 0) { 1761 catch_spr_faults = 1; 1762 sync(); 1763 1764 ret = xmon_mfspr(n, *vp); 1765 1766 sync(); 1767 *vp = ret; 1768 ok = 1; 1769 } 1770 catch_spr_faults = 0; 1771 1772 return ok; 1773 } 1774 1775 static void 1776 write_spr(int n, unsigned long val) 1777 { 1778 if (setjmp(bus_error_jmp) == 0) { 1779 catch_spr_faults = 1; 1780 sync(); 1781 1782 xmon_mtspr(n, val); 1783 1784 sync(); 1785 } else { 1786 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n); 1787 } 1788 catch_spr_faults = 0; 1789 } 1790 1791 static void dump_206_sprs(void) 1792 { 1793 #ifdef CONFIG_PPC64 1794 if (!cpu_has_feature(CPU_FTR_ARCH_206)) 1795 return; 1796 1797 /* Actually some of these pre-date 2.06, but whatevs */ 1798 1799 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n", 1800 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR)); 1801 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n", 1802 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR)); 1803 printf("amr = %.16lx uamor = %.16lx\n", 1804 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR)); 1805 1806 if (!(mfmsr() & MSR_HV)) 1807 return; 1808 1809 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n", 1810 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR)); 1811 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n", 1812 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC)); 1813 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n", 1814 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID)); 1815 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n", 1816 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR)); 1817 printf("dabr = %.16lx dabrx = %.16lx\n", 1818 mfspr(SPRN_DABR), mfspr(SPRN_DABRX)); 1819 #endif 1820 } 1821 1822 static void dump_207_sprs(void) 1823 { 1824 #ifdef CONFIG_PPC64 1825 unsigned long msr; 1826 1827 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1828 return; 1829 1830 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n", 1831 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR)); 1832 1833 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n", 1834 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB)); 1835 1836 msr = mfmsr(); 1837 if (msr & MSR_TM) { 1838 /* Only if TM has been enabled in the kernel */ 1839 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n", 1840 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR), 1841 mfspr(SPRN_TEXASR)); 1842 } 1843 1844 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n", 1845 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2)); 1846 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n", 1847 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), 1848 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4)); 1849 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n", 1850 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5)); 1851 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n", 1852 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6)); 1853 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n", 1854 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR)); 1855 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR)); 1856 1857 if (!(msr & MSR_HV)) 1858 return; 1859 1860 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n", 1861 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR)); 1862 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n", 1863 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR)); 1864 #endif 1865 } 1866 1867 static void dump_300_sprs(void) 1868 { 1869 #ifdef CONFIG_PPC64 1870 bool hv = mfmsr() & MSR_HV; 1871 1872 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 1873 return; 1874 1875 printf("pidr = %.16lx tidr = %.16lx\n", 1876 mfspr(SPRN_PID), mfspr(SPRN_TIDR)); 1877 printf("asdr = %.16lx psscr = %.16lx\n", 1878 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR) 1879 : mfspr(SPRN_PSSCR_PR)); 1880 1881 if (!hv) 1882 return; 1883 1884 printf("ptcr = %.16lx\n", 1885 mfspr(SPRN_PTCR)); 1886 #endif 1887 } 1888 1889 static void dump_one_spr(int spr, bool show_unimplemented) 1890 { 1891 unsigned long val; 1892 1893 val = 0xdeadbeef; 1894 if (!read_spr(spr, &val)) { 1895 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 1896 return; 1897 } 1898 1899 if (val == 0xdeadbeef) { 1900 /* Looks like read was a nop, confirm */ 1901 val = 0x0badcafe; 1902 if (!read_spr(spr, &val)) { 1903 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 1904 return; 1905 } 1906 1907 if (val == 0x0badcafe) { 1908 if (show_unimplemented) 1909 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr); 1910 return; 1911 } 1912 } 1913 1914 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val); 1915 } 1916 1917 static void super_regs(void) 1918 { 1919 static unsigned long regno; 1920 int cmd; 1921 int spr; 1922 1923 cmd = skipbl(); 1924 1925 switch (cmd) { 1926 case '\n': { 1927 unsigned long sp, toc; 1928 asm("mr %0,1" : "=r" (sp) :); 1929 asm("mr %0,2" : "=r" (toc) :); 1930 1931 printf("msr = "REG" sprg0 = "REG"\n", 1932 mfmsr(), mfspr(SPRN_SPRG0)); 1933 printf("pvr = "REG" sprg1 = "REG"\n", 1934 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); 1935 printf("dec = "REG" sprg2 = "REG"\n", 1936 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); 1937 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3)); 1938 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR)); 1939 1940 dump_206_sprs(); 1941 dump_207_sprs(); 1942 dump_300_sprs(); 1943 1944 return; 1945 } 1946 case 'w': { 1947 unsigned long val; 1948 scanhex(®no); 1949 val = 0; 1950 read_spr(regno, &val); 1951 scanhex(&val); 1952 write_spr(regno, val); 1953 dump_one_spr(regno, true); 1954 break; 1955 } 1956 case 'r': 1957 scanhex(®no); 1958 dump_one_spr(regno, true); 1959 break; 1960 case 'a': 1961 /* dump ALL SPRs */ 1962 for (spr = 1; spr < 1024; ++spr) 1963 dump_one_spr(spr, false); 1964 break; 1965 } 1966 1967 scannl(); 1968 } 1969 1970 /* 1971 * Stuff for reading and writing memory safely 1972 */ 1973 static int 1974 mread(unsigned long adrs, void *buf, int size) 1975 { 1976 volatile int n; 1977 char *p, *q; 1978 1979 n = 0; 1980 if (setjmp(bus_error_jmp) == 0) { 1981 catch_memory_errors = 1; 1982 sync(); 1983 p = (char *)adrs; 1984 q = (char *)buf; 1985 switch (size) { 1986 case 2: 1987 *(u16 *)q = *(u16 *)p; 1988 break; 1989 case 4: 1990 *(u32 *)q = *(u32 *)p; 1991 break; 1992 case 8: 1993 *(u64 *)q = *(u64 *)p; 1994 break; 1995 default: 1996 for( ; n < size; ++n) { 1997 *q++ = *p++; 1998 sync(); 1999 } 2000 } 2001 sync(); 2002 /* wait a little while to see if we get a machine check */ 2003 __delay(200); 2004 n = size; 2005 } 2006 catch_memory_errors = 0; 2007 return n; 2008 } 2009 2010 static int 2011 mwrite(unsigned long adrs, void *buf, int size) 2012 { 2013 volatile int n; 2014 char *p, *q; 2015 2016 n = 0; 2017 if (setjmp(bus_error_jmp) == 0) { 2018 catch_memory_errors = 1; 2019 sync(); 2020 p = (char *) adrs; 2021 q = (char *) buf; 2022 switch (size) { 2023 case 2: 2024 *(u16 *)p = *(u16 *)q; 2025 break; 2026 case 4: 2027 *(u32 *)p = *(u32 *)q; 2028 break; 2029 case 8: 2030 *(u64 *)p = *(u64 *)q; 2031 break; 2032 default: 2033 for ( ; n < size; ++n) { 2034 *p++ = *q++; 2035 sync(); 2036 } 2037 } 2038 sync(); 2039 /* wait a little while to see if we get a machine check */ 2040 __delay(200); 2041 n = size; 2042 } else { 2043 printf("*** Error writing address "REG"\n", adrs + n); 2044 } 2045 catch_memory_errors = 0; 2046 return n; 2047 } 2048 2049 static int fault_type; 2050 static int fault_except; 2051 static char *fault_chars[] = { "--", "**", "##" }; 2052 2053 static int handle_fault(struct pt_regs *regs) 2054 { 2055 fault_except = TRAP(regs); 2056 switch (TRAP(regs)) { 2057 case 0x200: 2058 fault_type = 0; 2059 break; 2060 case 0x300: 2061 case 0x380: 2062 fault_type = 1; 2063 break; 2064 default: 2065 fault_type = 2; 2066 } 2067 2068 longjmp(bus_error_jmp, 1); 2069 2070 return 0; 2071 } 2072 2073 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) 2074 2075 static void 2076 byterev(unsigned char *val, int size) 2077 { 2078 int t; 2079 2080 switch (size) { 2081 case 2: 2082 SWAP(val[0], val[1], t); 2083 break; 2084 case 4: 2085 SWAP(val[0], val[3], t); 2086 SWAP(val[1], val[2], t); 2087 break; 2088 case 8: /* is there really any use for this? */ 2089 SWAP(val[0], val[7], t); 2090 SWAP(val[1], val[6], t); 2091 SWAP(val[2], val[5], t); 2092 SWAP(val[3], val[4], t); 2093 break; 2094 } 2095 } 2096 2097 static int brev; 2098 static int mnoread; 2099 2100 static char *memex_help_string = 2101 "Memory examine command usage:\n" 2102 "m [addr] [flags] examine/change memory\n" 2103 " addr is optional. will start where left off.\n" 2104 " flags may include chars from this set:\n" 2105 " b modify by bytes (default)\n" 2106 " w modify by words (2 byte)\n" 2107 " l modify by longs (4 byte)\n" 2108 " d modify by doubleword (8 byte)\n" 2109 " r toggle reverse byte order mode\n" 2110 " n do not read memory (for i/o spaces)\n" 2111 " . ok to read (default)\n" 2112 "NOTE: flags are saved as defaults\n" 2113 ""; 2114 2115 static char *memex_subcmd_help_string = 2116 "Memory examine subcommands:\n" 2117 " hexval write this val to current location\n" 2118 " 'string' write chars from string to this location\n" 2119 " ' increment address\n" 2120 " ^ decrement address\n" 2121 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n" 2122 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n" 2123 " ` clear no-read flag\n" 2124 " ; stay at this addr\n" 2125 " v change to byte mode\n" 2126 " w change to word (2 byte) mode\n" 2127 " l change to long (4 byte) mode\n" 2128 " u change to doubleword (8 byte) mode\n" 2129 " m addr change current addr\n" 2130 " n toggle no-read flag\n" 2131 " r toggle byte reverse flag\n" 2132 " < count back up count bytes\n" 2133 " > count skip forward count bytes\n" 2134 " x exit this mode\n" 2135 ""; 2136 2137 static void 2138 memex(void) 2139 { 2140 int cmd, inc, i, nslash; 2141 unsigned long n; 2142 unsigned char val[16]; 2143 2144 scanhex((void *)&adrs); 2145 cmd = skipbl(); 2146 if (cmd == '?') { 2147 printf(memex_help_string); 2148 return; 2149 } else { 2150 termch = cmd; 2151 } 2152 last_cmd = "m\n"; 2153 while ((cmd = skipbl()) != '\n') { 2154 switch( cmd ){ 2155 case 'b': size = 1; break; 2156 case 'w': size = 2; break; 2157 case 'l': size = 4; break; 2158 case 'd': size = 8; break; 2159 case 'r': brev = !brev; break; 2160 case 'n': mnoread = 1; break; 2161 case '.': mnoread = 0; break; 2162 } 2163 } 2164 if( size <= 0 ) 2165 size = 1; 2166 else if( size > 8 ) 2167 size = 8; 2168 for(;;){ 2169 if (!mnoread) 2170 n = mread(adrs, val, size); 2171 printf(REG"%c", adrs, brev? 'r': ' '); 2172 if (!mnoread) { 2173 if (brev) 2174 byterev(val, size); 2175 putchar(' '); 2176 for (i = 0; i < n; ++i) 2177 printf("%.2x", val[i]); 2178 for (; i < size; ++i) 2179 printf("%s", fault_chars[fault_type]); 2180 } 2181 putchar(' '); 2182 inc = size; 2183 nslash = 0; 2184 for(;;){ 2185 if( scanhex(&n) ){ 2186 for (i = 0; i < size; ++i) 2187 val[i] = n >> (i * 8); 2188 if (!brev) 2189 byterev(val, size); 2190 mwrite(adrs, val, size); 2191 inc = size; 2192 } 2193 cmd = skipbl(); 2194 if (cmd == '\n') 2195 break; 2196 inc = 0; 2197 switch (cmd) { 2198 case '\'': 2199 for(;;){ 2200 n = inchar(); 2201 if( n == '\\' ) 2202 n = bsesc(); 2203 else if( n == '\'' ) 2204 break; 2205 for (i = 0; i < size; ++i) 2206 val[i] = n >> (i * 8); 2207 if (!brev) 2208 byterev(val, size); 2209 mwrite(adrs, val, size); 2210 adrs += size; 2211 } 2212 adrs -= size; 2213 inc = size; 2214 break; 2215 case ',': 2216 adrs += size; 2217 break; 2218 case '.': 2219 mnoread = 0; 2220 break; 2221 case ';': 2222 break; 2223 case 'x': 2224 case EOF: 2225 scannl(); 2226 return; 2227 case 'b': 2228 case 'v': 2229 size = 1; 2230 break; 2231 case 'w': 2232 size = 2; 2233 break; 2234 case 'l': 2235 size = 4; 2236 break; 2237 case 'u': 2238 size = 8; 2239 break; 2240 case '^': 2241 adrs -= size; 2242 break; 2243 case '/': 2244 if (nslash > 0) 2245 adrs -= 1 << nslash; 2246 else 2247 nslash = 0; 2248 nslash += 4; 2249 adrs += 1 << nslash; 2250 break; 2251 case '\\': 2252 if (nslash < 0) 2253 adrs += 1 << -nslash; 2254 else 2255 nslash = 0; 2256 nslash -= 4; 2257 adrs -= 1 << -nslash; 2258 break; 2259 case 'm': 2260 scanhex((void *)&adrs); 2261 break; 2262 case 'n': 2263 mnoread = 1; 2264 break; 2265 case 'r': 2266 brev = !brev; 2267 break; 2268 case '<': 2269 n = size; 2270 scanhex(&n); 2271 adrs -= n; 2272 break; 2273 case '>': 2274 n = size; 2275 scanhex(&n); 2276 adrs += n; 2277 break; 2278 case '?': 2279 printf(memex_subcmd_help_string); 2280 break; 2281 } 2282 } 2283 adrs += inc; 2284 } 2285 } 2286 2287 static int 2288 bsesc(void) 2289 { 2290 int c; 2291 2292 c = inchar(); 2293 switch( c ){ 2294 case 'n': c = '\n'; break; 2295 case 'r': c = '\r'; break; 2296 case 'b': c = '\b'; break; 2297 case 't': c = '\t'; break; 2298 } 2299 return c; 2300 } 2301 2302 static void xmon_rawdump (unsigned long adrs, long ndump) 2303 { 2304 long n, m, r, nr; 2305 unsigned char temp[16]; 2306 2307 for (n = ndump; n > 0;) { 2308 r = n < 16? n: 16; 2309 nr = mread(adrs, temp, r); 2310 adrs += nr; 2311 for (m = 0; m < r; ++m) { 2312 if (m < nr) 2313 printf("%.2x", temp[m]); 2314 else 2315 printf("%s", fault_chars[fault_type]); 2316 } 2317 n -= r; 2318 if (nr < r) 2319 break; 2320 } 2321 printf("\n"); 2322 } 2323 2324 static void dump_tracing(void) 2325 { 2326 int c; 2327 2328 c = inchar(); 2329 if (c == 'c') 2330 ftrace_dump(DUMP_ORIG); 2331 else 2332 ftrace_dump(DUMP_ALL); 2333 } 2334 2335 #ifdef CONFIG_PPC64 2336 static void dump_one_paca(int cpu) 2337 { 2338 struct paca_struct *p; 2339 #ifdef CONFIG_PPC_BOOK3S_64 2340 int i = 0; 2341 #endif 2342 2343 if (setjmp(bus_error_jmp) != 0) { 2344 printf("*** Error dumping paca for cpu 0x%x!\n", cpu); 2345 return; 2346 } 2347 2348 catch_memory_errors = 1; 2349 sync(); 2350 2351 p = paca_ptrs[cpu]; 2352 2353 printf("paca for cpu 0x%x @ %px:\n", cpu, p); 2354 2355 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no"); 2356 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no"); 2357 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no"); 2358 2359 #define DUMP(paca, name, format) \ 2360 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \ 2361 offsetof(struct paca_struct, name)); 2362 2363 DUMP(p, lock_token, "%#-*x"); 2364 DUMP(p, paca_index, "%#-*x"); 2365 DUMP(p, kernel_toc, "%#-*llx"); 2366 DUMP(p, kernelbase, "%#-*llx"); 2367 DUMP(p, kernel_msr, "%#-*llx"); 2368 DUMP(p, emergency_sp, "%-*px"); 2369 #ifdef CONFIG_PPC_BOOK3S_64 2370 DUMP(p, nmi_emergency_sp, "%-*px"); 2371 DUMP(p, mc_emergency_sp, "%-*px"); 2372 DUMP(p, in_nmi, "%#-*x"); 2373 DUMP(p, in_mce, "%#-*x"); 2374 DUMP(p, hmi_event_available, "%#-*x"); 2375 #endif 2376 DUMP(p, data_offset, "%#-*llx"); 2377 DUMP(p, hw_cpu_id, "%#-*x"); 2378 DUMP(p, cpu_start, "%#-*x"); 2379 DUMP(p, kexec_state, "%#-*x"); 2380 #ifdef CONFIG_PPC_BOOK3S_64 2381 for (i = 0; i < SLB_NUM_BOLTED; i++) { 2382 u64 esid, vsid; 2383 2384 if (!p->slb_shadow_ptr) 2385 continue; 2386 2387 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid); 2388 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid); 2389 2390 if (esid || vsid) { 2391 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n", 2392 22, "slb_shadow", i, esid, vsid); 2393 } 2394 } 2395 DUMP(p, vmalloc_sllp, "%#-*x"); 2396 DUMP(p, slb_cache_ptr, "%#-*x"); 2397 for (i = 0; i < SLB_CACHE_ENTRIES; i++) 2398 printf(" %-*s[%d] = 0x%016x\n", 2399 22, "slb_cache", i, p->slb_cache[i]); 2400 2401 DUMP(p, rfi_flush_fallback_area, "%-*px"); 2402 #endif 2403 DUMP(p, dscr_default, "%#-*llx"); 2404 #ifdef CONFIG_PPC_BOOK3E 2405 DUMP(p, pgd, "%-*px"); 2406 DUMP(p, kernel_pgd, "%-*px"); 2407 DUMP(p, tcd_ptr, "%-*px"); 2408 DUMP(p, mc_kstack, "%-*px"); 2409 DUMP(p, crit_kstack, "%-*px"); 2410 DUMP(p, dbg_kstack, "%-*px"); 2411 #endif 2412 DUMP(p, __current, "%-*px"); 2413 DUMP(p, kstack, "%#-*llx"); 2414 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1)); 2415 DUMP(p, stab_rr, "%#-*llx"); 2416 DUMP(p, saved_r1, "%#-*llx"); 2417 DUMP(p, trap_save, "%#-*x"); 2418 DUMP(p, irq_soft_mask, "%#-*x"); 2419 DUMP(p, irq_happened, "%#-*x"); 2420 DUMP(p, io_sync, "%#-*x"); 2421 DUMP(p, irq_work_pending, "%#-*x"); 2422 DUMP(p, nap_state_lost, "%#-*x"); 2423 DUMP(p, sprg_vdso, "%#-*llx"); 2424 2425 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2426 DUMP(p, tm_scratch, "%#-*llx"); 2427 #endif 2428 2429 #ifdef CONFIG_PPC_POWERNV 2430 DUMP(p, core_idle_state_ptr, "%-*px"); 2431 DUMP(p, thread_idle_state, "%#-*x"); 2432 DUMP(p, thread_mask, "%#-*x"); 2433 DUMP(p, subcore_sibling_mask, "%#-*x"); 2434 DUMP(p, requested_psscr, "%#-*llx"); 2435 DUMP(p, stop_sprs.pid, "%#-*llx"); 2436 DUMP(p, stop_sprs.ldbar, "%#-*llx"); 2437 DUMP(p, stop_sprs.fscr, "%#-*llx"); 2438 DUMP(p, stop_sprs.hfscr, "%#-*llx"); 2439 DUMP(p, stop_sprs.mmcr1, "%#-*llx"); 2440 DUMP(p, stop_sprs.mmcr2, "%#-*llx"); 2441 DUMP(p, stop_sprs.mmcra, "%#-*llx"); 2442 DUMP(p, dont_stop.counter, "%#-*x"); 2443 #endif 2444 2445 DUMP(p, accounting.utime, "%#-*lx"); 2446 DUMP(p, accounting.stime, "%#-*lx"); 2447 DUMP(p, accounting.utime_scaled, "%#-*lx"); 2448 DUMP(p, accounting.starttime, "%#-*lx"); 2449 DUMP(p, accounting.starttime_user, "%#-*lx"); 2450 DUMP(p, accounting.startspurr, "%#-*lx"); 2451 DUMP(p, accounting.utime_sspurr, "%#-*lx"); 2452 DUMP(p, accounting.steal_time, "%#-*lx"); 2453 #undef DUMP 2454 2455 catch_memory_errors = 0; 2456 sync(); 2457 } 2458 2459 static void dump_all_pacas(void) 2460 { 2461 int cpu; 2462 2463 if (num_possible_cpus() == 0) { 2464 printf("No possible cpus, use 'dp #' to dump individual cpus\n"); 2465 return; 2466 } 2467 2468 for_each_possible_cpu(cpu) 2469 dump_one_paca(cpu); 2470 } 2471 2472 static void dump_pacas(void) 2473 { 2474 unsigned long num; 2475 int c; 2476 2477 c = inchar(); 2478 if (c == 'a') { 2479 dump_all_pacas(); 2480 return; 2481 } 2482 2483 termch = c; /* Put c back, it wasn't 'a' */ 2484 2485 if (scanhex(&num)) 2486 dump_one_paca(num); 2487 else 2488 dump_one_paca(xmon_owner); 2489 } 2490 #endif 2491 2492 #ifdef CONFIG_PPC_POWERNV 2493 static void dump_one_xive(int cpu) 2494 { 2495 unsigned int hwid = get_hard_smp_processor_id(cpu); 2496 2497 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid); 2498 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid); 2499 opal_xive_dump(XIVE_DUMP_TM_OS, hwid); 2500 opal_xive_dump(XIVE_DUMP_TM_USER, hwid); 2501 opal_xive_dump(XIVE_DUMP_VP, hwid); 2502 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid); 2503 2504 if (setjmp(bus_error_jmp) != 0) { 2505 catch_memory_errors = 0; 2506 printf("*** Error dumping xive on cpu %d\n", cpu); 2507 return; 2508 } 2509 2510 catch_memory_errors = 1; 2511 sync(); 2512 xmon_xive_do_dump(cpu); 2513 sync(); 2514 __delay(200); 2515 catch_memory_errors = 0; 2516 } 2517 2518 static void dump_all_xives(void) 2519 { 2520 int cpu; 2521 2522 if (num_possible_cpus() == 0) { 2523 printf("No possible cpus, use 'dx #' to dump individual cpus\n"); 2524 return; 2525 } 2526 2527 for_each_possible_cpu(cpu) 2528 dump_one_xive(cpu); 2529 } 2530 2531 static void dump_one_xive_irq(u32 num) 2532 { 2533 s64 rc; 2534 __be64 vp; 2535 u8 prio; 2536 __be32 lirq; 2537 2538 rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq); 2539 xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n", 2540 num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc); 2541 } 2542 2543 static void dump_xives(void) 2544 { 2545 unsigned long num; 2546 int c; 2547 2548 if (!xive_enabled()) { 2549 printf("Xive disabled on this system\n"); 2550 return; 2551 } 2552 2553 c = inchar(); 2554 if (c == 'a') { 2555 dump_all_xives(); 2556 return; 2557 } else if (c == 'i') { 2558 if (scanhex(&num)) 2559 dump_one_xive_irq(num); 2560 return; 2561 } 2562 2563 termch = c; /* Put c back, it wasn't 'a' */ 2564 2565 if (scanhex(&num)) 2566 dump_one_xive(num); 2567 else 2568 dump_one_xive(xmon_owner); 2569 } 2570 #endif /* CONFIG_PPC_POWERNV */ 2571 2572 static void dump_by_size(unsigned long addr, long count, int size) 2573 { 2574 unsigned char temp[16]; 2575 int i, j; 2576 u64 val; 2577 2578 count = ALIGN(count, 16); 2579 2580 for (i = 0; i < count; i += 16, addr += 16) { 2581 printf(REG, addr); 2582 2583 if (mread(addr, temp, 16) != 16) { 2584 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr); 2585 return; 2586 } 2587 2588 for (j = 0; j < 16; j += size) { 2589 putchar(' '); 2590 switch (size) { 2591 case 1: val = temp[j]; break; 2592 case 2: val = *(u16 *)&temp[j]; break; 2593 case 4: val = *(u32 *)&temp[j]; break; 2594 case 8: val = *(u64 *)&temp[j]; break; 2595 default: val = 0; 2596 } 2597 2598 printf("%0*llx", size * 2, val); 2599 } 2600 printf("\n"); 2601 } 2602 } 2603 2604 static void 2605 dump(void) 2606 { 2607 static char last[] = { "d?\n" }; 2608 int c; 2609 2610 c = inchar(); 2611 2612 #ifdef CONFIG_PPC64 2613 if (c == 'p') { 2614 xmon_start_pagination(); 2615 dump_pacas(); 2616 xmon_end_pagination(); 2617 return; 2618 } 2619 #endif 2620 #ifdef CONFIG_PPC_POWERNV 2621 if (c == 'x') { 2622 xmon_start_pagination(); 2623 dump_xives(); 2624 xmon_end_pagination(); 2625 return; 2626 } 2627 #endif 2628 2629 if (c == 't') { 2630 dump_tracing(); 2631 return; 2632 } 2633 2634 if (c == '\n') 2635 termch = c; 2636 2637 scanhex((void *)&adrs); 2638 if (termch != '\n') 2639 termch = 0; 2640 if (c == 'i') { 2641 scanhex(&nidump); 2642 if (nidump == 0) 2643 nidump = 16; 2644 else if (nidump > MAX_DUMP) 2645 nidump = MAX_DUMP; 2646 adrs += ppc_inst_dump(adrs, nidump, 1); 2647 last_cmd = "di\n"; 2648 } else if (c == 'l') { 2649 dump_log_buf(); 2650 } else if (c == 'o') { 2651 dump_opal_msglog(); 2652 } else if (c == 'v') { 2653 /* dump virtual to physical translation */ 2654 show_pte(adrs); 2655 } else if (c == 'r') { 2656 scanhex(&ndump); 2657 if (ndump == 0) 2658 ndump = 64; 2659 xmon_rawdump(adrs, ndump); 2660 adrs += ndump; 2661 last_cmd = "dr\n"; 2662 } else { 2663 scanhex(&ndump); 2664 if (ndump == 0) 2665 ndump = 64; 2666 else if (ndump > MAX_DUMP) 2667 ndump = MAX_DUMP; 2668 2669 switch (c) { 2670 case '8': 2671 case '4': 2672 case '2': 2673 case '1': 2674 ndump = ALIGN(ndump, 16); 2675 dump_by_size(adrs, ndump, c - '0'); 2676 last[1] = c; 2677 last_cmd = last; 2678 break; 2679 default: 2680 prdump(adrs, ndump); 2681 last_cmd = "d\n"; 2682 } 2683 2684 adrs += ndump; 2685 } 2686 } 2687 2688 static void 2689 prdump(unsigned long adrs, long ndump) 2690 { 2691 long n, m, c, r, nr; 2692 unsigned char temp[16]; 2693 2694 for (n = ndump; n > 0;) { 2695 printf(REG, adrs); 2696 putchar(' '); 2697 r = n < 16? n: 16; 2698 nr = mread(adrs, temp, r); 2699 adrs += nr; 2700 for (m = 0; m < r; ++m) { 2701 if ((m & (sizeof(long) - 1)) == 0 && m > 0) 2702 putchar(' '); 2703 if (m < nr) 2704 printf("%.2x", temp[m]); 2705 else 2706 printf("%s", fault_chars[fault_type]); 2707 } 2708 for (; m < 16; ++m) { 2709 if ((m & (sizeof(long) - 1)) == 0) 2710 putchar(' '); 2711 printf(" "); 2712 } 2713 printf(" |"); 2714 for (m = 0; m < r; ++m) { 2715 if (m < nr) { 2716 c = temp[m]; 2717 putchar(' ' <= c && c <= '~'? c: '.'); 2718 } else 2719 putchar(' '); 2720 } 2721 n -= r; 2722 for (; m < 16; ++m) 2723 putchar(' '); 2724 printf("|\n"); 2725 if (nr < r) 2726 break; 2727 } 2728 } 2729 2730 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); 2731 2732 static int 2733 generic_inst_dump(unsigned long adr, long count, int praddr, 2734 instruction_dump_func dump_func) 2735 { 2736 int nr, dotted; 2737 unsigned long first_adr; 2738 unsigned int inst, last_inst = 0; 2739 unsigned char val[4]; 2740 2741 dotted = 0; 2742 for (first_adr = adr; count > 0; --count, adr += 4) { 2743 nr = mread(adr, val, 4); 2744 if (nr == 0) { 2745 if (praddr) { 2746 const char *x = fault_chars[fault_type]; 2747 printf(REG" %s%s%s%s\n", adr, x, x, x, x); 2748 } 2749 break; 2750 } 2751 inst = GETWORD(val); 2752 if (adr > first_adr && inst == last_inst) { 2753 if (!dotted) { 2754 printf(" ...\n"); 2755 dotted = 1; 2756 } 2757 continue; 2758 } 2759 dotted = 0; 2760 last_inst = inst; 2761 if (praddr) 2762 printf(REG" %.8x", adr, inst); 2763 printf("\t"); 2764 dump_func(inst, adr); 2765 printf("\n"); 2766 } 2767 return adr - first_adr; 2768 } 2769 2770 static int 2771 ppc_inst_dump(unsigned long adr, long count, int praddr) 2772 { 2773 return generic_inst_dump(adr, count, praddr, print_insn_powerpc); 2774 } 2775 2776 void 2777 print_address(unsigned long addr) 2778 { 2779 xmon_print_symbol(addr, "\t# ", ""); 2780 } 2781 2782 void 2783 dump_log_buf(void) 2784 { 2785 struct kmsg_dumper dumper = { .active = 1 }; 2786 unsigned char buf[128]; 2787 size_t len; 2788 2789 if (setjmp(bus_error_jmp) != 0) { 2790 printf("Error dumping printk buffer!\n"); 2791 return; 2792 } 2793 2794 catch_memory_errors = 1; 2795 sync(); 2796 2797 kmsg_dump_rewind_nolock(&dumper); 2798 xmon_start_pagination(); 2799 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) { 2800 buf[len] = '\0'; 2801 printf("%s", buf); 2802 } 2803 xmon_end_pagination(); 2804 2805 sync(); 2806 /* wait a little while to see if we get a machine check */ 2807 __delay(200); 2808 catch_memory_errors = 0; 2809 } 2810 2811 #ifdef CONFIG_PPC_POWERNV 2812 static void dump_opal_msglog(void) 2813 { 2814 unsigned char buf[128]; 2815 ssize_t res; 2816 loff_t pos = 0; 2817 2818 if (!firmware_has_feature(FW_FEATURE_OPAL)) { 2819 printf("Machine is not running OPAL firmware.\n"); 2820 return; 2821 } 2822 2823 if (setjmp(bus_error_jmp) != 0) { 2824 printf("Error dumping OPAL msglog!\n"); 2825 return; 2826 } 2827 2828 catch_memory_errors = 1; 2829 sync(); 2830 2831 xmon_start_pagination(); 2832 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) { 2833 if (res < 0) { 2834 printf("Error dumping OPAL msglog! Error: %zd\n", res); 2835 break; 2836 } 2837 buf[res] = '\0'; 2838 printf("%s", buf); 2839 pos += res; 2840 } 2841 xmon_end_pagination(); 2842 2843 sync(); 2844 /* wait a little while to see if we get a machine check */ 2845 __delay(200); 2846 catch_memory_errors = 0; 2847 } 2848 #endif 2849 2850 /* 2851 * Memory operations - move, set, print differences 2852 */ 2853 static unsigned long mdest; /* destination address */ 2854 static unsigned long msrc; /* source address */ 2855 static unsigned long mval; /* byte value to set memory to */ 2856 static unsigned long mcount; /* # bytes to affect */ 2857 static unsigned long mdiffs; /* max # differences to print */ 2858 2859 static void 2860 memops(int cmd) 2861 { 2862 scanhex((void *)&mdest); 2863 if( termch != '\n' ) 2864 termch = 0; 2865 scanhex((void *)(cmd == 's'? &mval: &msrc)); 2866 if( termch != '\n' ) 2867 termch = 0; 2868 scanhex((void *)&mcount); 2869 switch( cmd ){ 2870 case 'm': 2871 memmove((void *)mdest, (void *)msrc, mcount); 2872 break; 2873 case 's': 2874 memset((void *)mdest, mval, mcount); 2875 break; 2876 case 'd': 2877 if( termch != '\n' ) 2878 termch = 0; 2879 scanhex((void *)&mdiffs); 2880 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs); 2881 break; 2882 } 2883 } 2884 2885 static void 2886 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) 2887 { 2888 unsigned n, prt; 2889 2890 prt = 0; 2891 for( n = nb; n > 0; --n ) 2892 if( *p1++ != *p2++ ) 2893 if( ++prt <= maxpr ) 2894 printf("%px %.2x # %px %.2x\n", p1 - 1, 2895 p1[-1], p2 - 1, p2[-1]); 2896 if( prt > maxpr ) 2897 printf("Total of %d differences\n", prt); 2898 } 2899 2900 static unsigned mend; 2901 static unsigned mask; 2902 2903 static void 2904 memlocate(void) 2905 { 2906 unsigned a, n; 2907 unsigned char val[4]; 2908 2909 last_cmd = "ml"; 2910 scanhex((void *)&mdest); 2911 if (termch != '\n') { 2912 termch = 0; 2913 scanhex((void *)&mend); 2914 if (termch != '\n') { 2915 termch = 0; 2916 scanhex((void *)&mval); 2917 mask = ~0; 2918 if (termch != '\n') termch = 0; 2919 scanhex((void *)&mask); 2920 } 2921 } 2922 n = 0; 2923 for (a = mdest; a < mend; a += 4) { 2924 if (mread(a, val, 4) == 4 2925 && ((GETWORD(val) ^ mval) & mask) == 0) { 2926 printf("%.16x: %.16x\n", a, GETWORD(val)); 2927 if (++n >= 10) 2928 break; 2929 } 2930 } 2931 } 2932 2933 static unsigned long mskip = 0x1000; 2934 static unsigned long mlim = 0xffffffff; 2935 2936 static void 2937 memzcan(void) 2938 { 2939 unsigned char v; 2940 unsigned a; 2941 int ok, ook; 2942 2943 scanhex(&mdest); 2944 if (termch != '\n') termch = 0; 2945 scanhex(&mskip); 2946 if (termch != '\n') termch = 0; 2947 scanhex(&mlim); 2948 ook = 0; 2949 for (a = mdest; a < mlim; a += mskip) { 2950 ok = mread(a, &v, 1); 2951 if (ok && !ook) { 2952 printf("%.8x .. ", a); 2953 } else if (!ok && ook) 2954 printf("%.8lx\n", a - mskip); 2955 ook = ok; 2956 if (a + mskip < a) 2957 break; 2958 } 2959 if (ook) 2960 printf("%.8lx\n", a - mskip); 2961 } 2962 2963 static void show_task(struct task_struct *tsk) 2964 { 2965 char state; 2966 2967 /* 2968 * Cloned from kdb_task_state_char(), which is not entirely 2969 * appropriate for calling from xmon. This could be moved 2970 * to a common, generic, routine used by both. 2971 */ 2972 state = (tsk->state == 0) ? 'R' : 2973 (tsk->state < 0) ? 'U' : 2974 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' : 2975 (tsk->state & TASK_STOPPED) ? 'T' : 2976 (tsk->state & TASK_TRACED) ? 'C' : 2977 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' : 2978 (tsk->exit_state & EXIT_DEAD) ? 'E' : 2979 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?'; 2980 2981 printf("%px %016lx %6d %6d %c %2d %s\n", tsk, 2982 tsk->thread.ksp, 2983 tsk->pid, tsk->parent->pid, 2984 state, task_thread_info(tsk)->cpu, 2985 tsk->comm); 2986 } 2987 2988 #ifdef CONFIG_PPC_BOOK3S_64 2989 void format_pte(void *ptep, unsigned long pte) 2990 { 2991 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte); 2992 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK); 2993 2994 printf("Flags = %s%s%s%s%s\n", 2995 (pte & _PAGE_ACCESSED) ? "Accessed " : "", 2996 (pte & _PAGE_DIRTY) ? "Dirty " : "", 2997 (pte & _PAGE_READ) ? "Read " : "", 2998 (pte & _PAGE_WRITE) ? "Write " : "", 2999 (pte & _PAGE_EXEC) ? "Exec " : ""); 3000 } 3001 3002 static void show_pte(unsigned long addr) 3003 { 3004 unsigned long tskv = 0; 3005 struct task_struct *tsk = NULL; 3006 struct mm_struct *mm; 3007 pgd_t *pgdp, *pgdir; 3008 pud_t *pudp; 3009 pmd_t *pmdp; 3010 pte_t *ptep; 3011 3012 if (!scanhex(&tskv)) 3013 mm = &init_mm; 3014 else 3015 tsk = (struct task_struct *)tskv; 3016 3017 if (tsk == NULL) 3018 mm = &init_mm; 3019 else 3020 mm = tsk->active_mm; 3021 3022 if (setjmp(bus_error_jmp) != 0) { 3023 catch_memory_errors = 0; 3024 printf("*** Error dumping pte for task %px\n", tsk); 3025 return; 3026 } 3027 3028 catch_memory_errors = 1; 3029 sync(); 3030 3031 if (mm == &init_mm) { 3032 pgdp = pgd_offset_k(addr); 3033 pgdir = pgd_offset_k(0); 3034 } else { 3035 pgdp = pgd_offset(mm, addr); 3036 pgdir = pgd_offset(mm, 0); 3037 } 3038 3039 if (pgd_none(*pgdp)) { 3040 printf("no linux page table for address\n"); 3041 return; 3042 } 3043 3044 printf("pgd @ 0x%px\n", pgdir); 3045 3046 if (pgd_huge(*pgdp)) { 3047 format_pte(pgdp, pgd_val(*pgdp)); 3048 return; 3049 } 3050 printf("pgdp @ 0x%px = 0x%016lx\n", pgdp, pgd_val(*pgdp)); 3051 3052 pudp = pud_offset(pgdp, addr); 3053 3054 if (pud_none(*pudp)) { 3055 printf("No valid PUD\n"); 3056 return; 3057 } 3058 3059 if (pud_huge(*pudp)) { 3060 format_pte(pudp, pud_val(*pudp)); 3061 return; 3062 } 3063 3064 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp)); 3065 3066 pmdp = pmd_offset(pudp, addr); 3067 3068 if (pmd_none(*pmdp)) { 3069 printf("No valid PMD\n"); 3070 return; 3071 } 3072 3073 if (pmd_huge(*pmdp)) { 3074 format_pte(pmdp, pmd_val(*pmdp)); 3075 return; 3076 } 3077 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp)); 3078 3079 ptep = pte_offset_map(pmdp, addr); 3080 if (pte_none(*ptep)) { 3081 printf("no valid PTE\n"); 3082 return; 3083 } 3084 3085 format_pte(ptep, pte_val(*ptep)); 3086 3087 sync(); 3088 __delay(200); 3089 catch_memory_errors = 0; 3090 } 3091 #else 3092 static void show_pte(unsigned long addr) 3093 { 3094 printf("show_pte not yet implemented\n"); 3095 } 3096 #endif /* CONFIG_PPC_BOOK3S_64 */ 3097 3098 static void show_tasks(void) 3099 { 3100 unsigned long tskv; 3101 struct task_struct *tsk = NULL; 3102 3103 printf(" task_struct ->thread.ksp PID PPID S P CMD\n"); 3104 3105 if (scanhex(&tskv)) 3106 tsk = (struct task_struct *)tskv; 3107 3108 if (setjmp(bus_error_jmp) != 0) { 3109 catch_memory_errors = 0; 3110 printf("*** Error dumping task %px\n", tsk); 3111 return; 3112 } 3113 3114 catch_memory_errors = 1; 3115 sync(); 3116 3117 if (tsk) 3118 show_task(tsk); 3119 else 3120 for_each_process(tsk) 3121 show_task(tsk); 3122 3123 sync(); 3124 __delay(200); 3125 catch_memory_errors = 0; 3126 } 3127 3128 static void proccall(void) 3129 { 3130 unsigned long args[8]; 3131 unsigned long ret; 3132 int i; 3133 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long, 3134 unsigned long, unsigned long, unsigned long, 3135 unsigned long, unsigned long, unsigned long); 3136 callfunc_t func; 3137 3138 if (!scanhex(&adrs)) 3139 return; 3140 if (termch != '\n') 3141 termch = 0; 3142 for (i = 0; i < 8; ++i) 3143 args[i] = 0; 3144 for (i = 0; i < 8; ++i) { 3145 if (!scanhex(&args[i]) || termch == '\n') 3146 break; 3147 termch = 0; 3148 } 3149 func = (callfunc_t) adrs; 3150 ret = 0; 3151 if (setjmp(bus_error_jmp) == 0) { 3152 catch_memory_errors = 1; 3153 sync(); 3154 ret = func(args[0], args[1], args[2], args[3], 3155 args[4], args[5], args[6], args[7]); 3156 sync(); 3157 printf("return value is 0x%lx\n", ret); 3158 } else { 3159 printf("*** %x exception occurred\n", fault_except); 3160 } 3161 catch_memory_errors = 0; 3162 } 3163 3164 /* Input scanning routines */ 3165 int 3166 skipbl(void) 3167 { 3168 int c; 3169 3170 if( termch != 0 ){ 3171 c = termch; 3172 termch = 0; 3173 } else 3174 c = inchar(); 3175 while( c == ' ' || c == '\t' ) 3176 c = inchar(); 3177 return c; 3178 } 3179 3180 #define N_PTREGS 44 3181 static const char *regnames[N_PTREGS] = { 3182 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3183 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3184 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3185 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3186 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", 3187 #ifdef CONFIG_PPC64 3188 "softe", 3189 #else 3190 "mq", 3191 #endif 3192 "trap", "dar", "dsisr", "res" 3193 }; 3194 3195 int 3196 scanhex(unsigned long *vp) 3197 { 3198 int c, d; 3199 unsigned long v; 3200 3201 c = skipbl(); 3202 if (c == '%') { 3203 /* parse register name */ 3204 char regname[8]; 3205 int i; 3206 3207 for (i = 0; i < sizeof(regname) - 1; ++i) { 3208 c = inchar(); 3209 if (!isalnum(c)) { 3210 termch = c; 3211 break; 3212 } 3213 regname[i] = c; 3214 } 3215 regname[i] = 0; 3216 i = match_string(regnames, N_PTREGS, regname); 3217 if (i < 0) { 3218 printf("invalid register name '%%%s'\n", regname); 3219 return 0; 3220 } 3221 if (xmon_regs == NULL) { 3222 printf("regs not available\n"); 3223 return 0; 3224 } 3225 *vp = ((unsigned long *)xmon_regs)[i]; 3226 return 1; 3227 } 3228 3229 /* skip leading "0x" if any */ 3230 3231 if (c == '0') { 3232 c = inchar(); 3233 if (c == 'x') { 3234 c = inchar(); 3235 } else { 3236 d = hexdigit(c); 3237 if (d == EOF) { 3238 termch = c; 3239 *vp = 0; 3240 return 1; 3241 } 3242 } 3243 } else if (c == '$') { 3244 int i; 3245 for (i=0; i<63; i++) { 3246 c = inchar(); 3247 if (isspace(c) || c == '\0') { 3248 termch = c; 3249 break; 3250 } 3251 tmpstr[i] = c; 3252 } 3253 tmpstr[i++] = 0; 3254 *vp = 0; 3255 if (setjmp(bus_error_jmp) == 0) { 3256 catch_memory_errors = 1; 3257 sync(); 3258 *vp = kallsyms_lookup_name(tmpstr); 3259 sync(); 3260 } 3261 catch_memory_errors = 0; 3262 if (!(*vp)) { 3263 printf("unknown symbol '%s'\n", tmpstr); 3264 return 0; 3265 } 3266 return 1; 3267 } 3268 3269 d = hexdigit(c); 3270 if (d == EOF) { 3271 termch = c; 3272 return 0; 3273 } 3274 v = 0; 3275 do { 3276 v = (v << 4) + d; 3277 c = inchar(); 3278 d = hexdigit(c); 3279 } while (d != EOF); 3280 termch = c; 3281 *vp = v; 3282 return 1; 3283 } 3284 3285 static void 3286 scannl(void) 3287 { 3288 int c; 3289 3290 c = termch; 3291 termch = 0; 3292 while( c != '\n' ) 3293 c = inchar(); 3294 } 3295 3296 static int hexdigit(int c) 3297 { 3298 if( '0' <= c && c <= '9' ) 3299 return c - '0'; 3300 if( 'A' <= c && c <= 'F' ) 3301 return c - ('A' - 10); 3302 if( 'a' <= c && c <= 'f' ) 3303 return c - ('a' - 10); 3304 return EOF; 3305 } 3306 3307 void 3308 getstring(char *s, int size) 3309 { 3310 int c; 3311 3312 c = skipbl(); 3313 do { 3314 if( size > 1 ){ 3315 *s++ = c; 3316 --size; 3317 } 3318 c = inchar(); 3319 } while( c != ' ' && c != '\t' && c != '\n' ); 3320 termch = c; 3321 *s = 0; 3322 } 3323 3324 static char line[256]; 3325 static char *lineptr; 3326 3327 static void 3328 flush_input(void) 3329 { 3330 lineptr = NULL; 3331 } 3332 3333 static int 3334 inchar(void) 3335 { 3336 if (lineptr == NULL || *lineptr == 0) { 3337 if (xmon_gets(line, sizeof(line)) == NULL) { 3338 lineptr = NULL; 3339 return EOF; 3340 } 3341 lineptr = line; 3342 } 3343 return *lineptr++; 3344 } 3345 3346 static void 3347 take_input(char *str) 3348 { 3349 lineptr = str; 3350 } 3351 3352 3353 static void 3354 symbol_lookup(void) 3355 { 3356 int type = inchar(); 3357 unsigned long addr, cpu; 3358 void __percpu *ptr = NULL; 3359 static char tmp[64]; 3360 3361 switch (type) { 3362 case 'a': 3363 if (scanhex(&addr)) 3364 xmon_print_symbol(addr, ": ", "\n"); 3365 termch = 0; 3366 break; 3367 case 's': 3368 getstring(tmp, 64); 3369 if (setjmp(bus_error_jmp) == 0) { 3370 catch_memory_errors = 1; 3371 sync(); 3372 addr = kallsyms_lookup_name(tmp); 3373 if (addr) 3374 printf("%s: %lx\n", tmp, addr); 3375 else 3376 printf("Symbol '%s' not found.\n", tmp); 3377 sync(); 3378 } 3379 catch_memory_errors = 0; 3380 termch = 0; 3381 break; 3382 case 'p': 3383 getstring(tmp, 64); 3384 if (setjmp(bus_error_jmp) == 0) { 3385 catch_memory_errors = 1; 3386 sync(); 3387 ptr = (void __percpu *)kallsyms_lookup_name(tmp); 3388 sync(); 3389 } 3390 3391 if (ptr && 3392 ptr >= (void __percpu *)__per_cpu_start && 3393 ptr < (void __percpu *)__per_cpu_end) 3394 { 3395 if (scanhex(&cpu) && cpu < num_possible_cpus()) { 3396 addr = (unsigned long)per_cpu_ptr(ptr, cpu); 3397 } else { 3398 cpu = raw_smp_processor_id(); 3399 addr = (unsigned long)this_cpu_ptr(ptr); 3400 } 3401 3402 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr); 3403 } else { 3404 printf("Percpu symbol '%s' not found.\n", tmp); 3405 } 3406 3407 catch_memory_errors = 0; 3408 termch = 0; 3409 break; 3410 } 3411 } 3412 3413 3414 /* Print an address in numeric and symbolic form (if possible) */ 3415 static void xmon_print_symbol(unsigned long address, const char *mid, 3416 const char *after) 3417 { 3418 char *modname; 3419 const char *name = NULL; 3420 unsigned long offset, size; 3421 3422 printf(REG, address); 3423 if (setjmp(bus_error_jmp) == 0) { 3424 catch_memory_errors = 1; 3425 sync(); 3426 name = kallsyms_lookup(address, &size, &offset, &modname, 3427 tmpstr); 3428 sync(); 3429 /* wait a little while to see if we get a machine check */ 3430 __delay(200); 3431 } 3432 3433 catch_memory_errors = 0; 3434 3435 if (name) { 3436 printf("%s%s+%#lx/%#lx", mid, name, offset, size); 3437 if (modname) 3438 printf(" [%s]", modname); 3439 } 3440 printf("%s", after); 3441 } 3442 3443 #ifdef CONFIG_PPC_BOOK3S_64 3444 void dump_segments(void) 3445 { 3446 int i; 3447 unsigned long esid,vsid; 3448 unsigned long llp; 3449 3450 printf("SLB contents of cpu 0x%x\n", smp_processor_id()); 3451 3452 for (i = 0; i < mmu_slb_size; i++) { 3453 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i)); 3454 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i)); 3455 3456 if (!esid && !vsid) 3457 continue; 3458 3459 printf("%02d %016lx %016lx", i, esid, vsid); 3460 3461 if (!(esid & SLB_ESID_V)) { 3462 printf("\n"); 3463 continue; 3464 } 3465 3466 llp = vsid & SLB_VSID_LLP; 3467 if (vsid & SLB_VSID_B_1T) { 3468 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n", 3469 GET_ESID_1T(esid), 3470 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T, 3471 llp); 3472 } else { 3473 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n", 3474 GET_ESID(esid), 3475 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT, 3476 llp); 3477 } 3478 } 3479 } 3480 #endif 3481 3482 #ifdef CONFIG_PPC_STD_MMU_32 3483 void dump_segments(void) 3484 { 3485 int i; 3486 3487 printf("sr0-15 ="); 3488 for (i = 0; i < 16; ++i) 3489 printf(" %x", mfsrin(i)); 3490 printf("\n"); 3491 } 3492 #endif 3493 3494 #ifdef CONFIG_44x 3495 static void dump_tlb_44x(void) 3496 { 3497 int i; 3498 3499 for (i = 0; i < PPC44x_TLB_SIZE; i++) { 3500 unsigned long w0,w1,w2; 3501 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i)); 3502 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i)); 3503 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i)); 3504 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2); 3505 if (w0 & PPC44x_TLB_VALID) { 3506 printf("V %08lx -> %01lx%08lx %c%c%c%c%c", 3507 w0 & PPC44x_TLB_EPN_MASK, 3508 w1 & PPC44x_TLB_ERPN_MASK, 3509 w1 & PPC44x_TLB_RPN_MASK, 3510 (w2 & PPC44x_TLB_W) ? 'W' : 'w', 3511 (w2 & PPC44x_TLB_I) ? 'I' : 'i', 3512 (w2 & PPC44x_TLB_M) ? 'M' : 'm', 3513 (w2 & PPC44x_TLB_G) ? 'G' : 'g', 3514 (w2 & PPC44x_TLB_E) ? 'E' : 'e'); 3515 } 3516 printf("\n"); 3517 } 3518 } 3519 #endif /* CONFIG_44x */ 3520 3521 #ifdef CONFIG_PPC_BOOK3E 3522 static void dump_tlb_book3e(void) 3523 { 3524 u32 mmucfg, pidmask, lpidmask; 3525 u64 ramask; 3526 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0; 3527 int mmu_version; 3528 static const char *pgsz_names[] = { 3529 " 1K", 3530 " 2K", 3531 " 4K", 3532 " 8K", 3533 " 16K", 3534 " 32K", 3535 " 64K", 3536 "128K", 3537 "256K", 3538 "512K", 3539 " 1M", 3540 " 2M", 3541 " 4M", 3542 " 8M", 3543 " 16M", 3544 " 32M", 3545 " 64M", 3546 "128M", 3547 "256M", 3548 "512M", 3549 " 1G", 3550 " 2G", 3551 " 4G", 3552 " 8G", 3553 " 16G", 3554 " 32G", 3555 " 64G", 3556 "128G", 3557 "256G", 3558 "512G", 3559 " 1T", 3560 " 2T", 3561 }; 3562 3563 /* Gather some infos about the MMU */ 3564 mmucfg = mfspr(SPRN_MMUCFG); 3565 mmu_version = (mmucfg & 3) + 1; 3566 ntlbs = ((mmucfg >> 2) & 3) + 1; 3567 pidsz = ((mmucfg >> 6) & 0x1f) + 1; 3568 lpidsz = (mmucfg >> 24) & 0xf; 3569 rasz = (mmucfg >> 16) & 0x7f; 3570 if ((mmu_version > 1) && (mmucfg & 0x10000)) 3571 lrat = 1; 3572 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n", 3573 mmu_version, ntlbs, pidsz, lpidsz, rasz); 3574 pidmask = (1ul << pidsz) - 1; 3575 lpidmask = (1ul << lpidsz) - 1; 3576 ramask = (1ull << rasz) - 1; 3577 3578 for (tlb = 0; tlb < ntlbs; tlb++) { 3579 u32 tlbcfg; 3580 int nent, assoc, new_cc = 1; 3581 printf("TLB %d:\n------\n", tlb); 3582 switch(tlb) { 3583 case 0: 3584 tlbcfg = mfspr(SPRN_TLB0CFG); 3585 break; 3586 case 1: 3587 tlbcfg = mfspr(SPRN_TLB1CFG); 3588 break; 3589 case 2: 3590 tlbcfg = mfspr(SPRN_TLB2CFG); 3591 break; 3592 case 3: 3593 tlbcfg = mfspr(SPRN_TLB3CFG); 3594 break; 3595 default: 3596 printf("Unsupported TLB number !\n"); 3597 continue; 3598 } 3599 nent = tlbcfg & 0xfff; 3600 assoc = (tlbcfg >> 24) & 0xff; 3601 for (i = 0; i < nent; i++) { 3602 u32 mas0 = MAS0_TLBSEL(tlb); 3603 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K); 3604 u64 mas2 = 0; 3605 u64 mas7_mas3; 3606 int esel = i, cc = i; 3607 3608 if (assoc != 0) { 3609 cc = i / assoc; 3610 esel = i % assoc; 3611 mas2 = cc * 0x1000; 3612 } 3613 3614 mas0 |= MAS0_ESEL(esel); 3615 mtspr(SPRN_MAS0, mas0); 3616 mtspr(SPRN_MAS1, mas1); 3617 mtspr(SPRN_MAS2, mas2); 3618 asm volatile("tlbre 0,0,0" : : : "memory"); 3619 mas1 = mfspr(SPRN_MAS1); 3620 mas2 = mfspr(SPRN_MAS2); 3621 mas7_mas3 = mfspr(SPRN_MAS7_MAS3); 3622 if (assoc && (i % assoc) == 0) 3623 new_cc = 1; 3624 if (!(mas1 & MAS1_VALID)) 3625 continue; 3626 if (assoc == 0) 3627 printf("%04x- ", i); 3628 else if (new_cc) 3629 printf("%04x-%c", cc, 'A' + esel); 3630 else 3631 printf(" |%c", 'A' + esel); 3632 new_cc = 0; 3633 printf(" %016llx %04x %s %c%c AS%c", 3634 mas2 & ~0x3ffull, 3635 (mas1 >> 16) & 0x3fff, 3636 pgsz_names[(mas1 >> 7) & 0x1f], 3637 mas1 & MAS1_IND ? 'I' : ' ', 3638 mas1 & MAS1_IPROT ? 'P' : ' ', 3639 mas1 & MAS1_TS ? '1' : '0'); 3640 printf(" %c%c%c%c%c%c%c", 3641 mas2 & MAS2_X0 ? 'a' : ' ', 3642 mas2 & MAS2_X1 ? 'v' : ' ', 3643 mas2 & MAS2_W ? 'w' : ' ', 3644 mas2 & MAS2_I ? 'i' : ' ', 3645 mas2 & MAS2_M ? 'm' : ' ', 3646 mas2 & MAS2_G ? 'g' : ' ', 3647 mas2 & MAS2_E ? 'e' : ' '); 3648 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull); 3649 if (mas1 & MAS1_IND) 3650 printf(" %s\n", 3651 pgsz_names[(mas7_mas3 >> 1) & 0x1f]); 3652 else 3653 printf(" U%c%c%c S%c%c%c\n", 3654 mas7_mas3 & MAS3_UX ? 'x' : ' ', 3655 mas7_mas3 & MAS3_UW ? 'w' : ' ', 3656 mas7_mas3 & MAS3_UR ? 'r' : ' ', 3657 mas7_mas3 & MAS3_SX ? 'x' : ' ', 3658 mas7_mas3 & MAS3_SW ? 'w' : ' ', 3659 mas7_mas3 & MAS3_SR ? 'r' : ' '); 3660 } 3661 } 3662 } 3663 #endif /* CONFIG_PPC_BOOK3E */ 3664 3665 static void xmon_init(int enable) 3666 { 3667 if (enable) { 3668 __debugger = xmon; 3669 __debugger_ipi = xmon_ipi; 3670 __debugger_bpt = xmon_bpt; 3671 __debugger_sstep = xmon_sstep; 3672 __debugger_iabr_match = xmon_iabr_match; 3673 __debugger_break_match = xmon_break_match; 3674 __debugger_fault_handler = xmon_fault_handler; 3675 } else { 3676 __debugger = NULL; 3677 __debugger_ipi = NULL; 3678 __debugger_bpt = NULL; 3679 __debugger_sstep = NULL; 3680 __debugger_iabr_match = NULL; 3681 __debugger_break_match = NULL; 3682 __debugger_fault_handler = NULL; 3683 } 3684 } 3685 3686 #ifdef CONFIG_MAGIC_SYSRQ 3687 static void sysrq_handle_xmon(int key) 3688 { 3689 /* ensure xmon is enabled */ 3690 xmon_init(1); 3691 debugger(get_irq_regs()); 3692 if (!xmon_on) 3693 xmon_init(0); 3694 } 3695 3696 static struct sysrq_key_op sysrq_xmon_op = { 3697 .handler = sysrq_handle_xmon, 3698 .help_msg = "xmon(x)", 3699 .action_msg = "Entering xmon", 3700 }; 3701 3702 static int __init setup_xmon_sysrq(void) 3703 { 3704 register_sysrq_key('x', &sysrq_xmon_op); 3705 return 0; 3706 } 3707 device_initcall(setup_xmon_sysrq); 3708 #endif /* CONFIG_MAGIC_SYSRQ */ 3709 3710 #ifdef CONFIG_DEBUG_FS 3711 static void clear_all_bpt(void) 3712 { 3713 int i; 3714 3715 /* clear/unpatch all breakpoints */ 3716 remove_bpts(); 3717 remove_cpu_bpts(); 3718 3719 /* Disable all breakpoints */ 3720 for (i = 0; i < NBPTS; ++i) 3721 bpts[i].enabled = 0; 3722 3723 /* Clear any data or iabr breakpoints */ 3724 if (iabr || dabr.enabled) { 3725 iabr = NULL; 3726 dabr.enabled = 0; 3727 } 3728 3729 printf("xmon: All breakpoints cleared\n"); 3730 } 3731 3732 static int xmon_dbgfs_set(void *data, u64 val) 3733 { 3734 xmon_on = !!val; 3735 xmon_init(xmon_on); 3736 3737 /* make sure all breakpoints removed when disabling */ 3738 if (!xmon_on) 3739 clear_all_bpt(); 3740 return 0; 3741 } 3742 3743 static int xmon_dbgfs_get(void *data, u64 *val) 3744 { 3745 *val = xmon_on; 3746 return 0; 3747 } 3748 3749 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get, 3750 xmon_dbgfs_set, "%llu\n"); 3751 3752 static int __init setup_xmon_dbgfs(void) 3753 { 3754 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL, 3755 &xmon_dbgfs_ops); 3756 return 0; 3757 } 3758 device_initcall(setup_xmon_dbgfs); 3759 #endif /* CONFIG_DEBUG_FS */ 3760 3761 static int xmon_early __initdata; 3762 3763 static int __init early_parse_xmon(char *p) 3764 { 3765 if (!p || strncmp(p, "early", 5) == 0) { 3766 /* just "xmon" is equivalent to "xmon=early" */ 3767 xmon_init(1); 3768 xmon_early = 1; 3769 xmon_on = 1; 3770 } else if (strncmp(p, "on", 2) == 0) { 3771 xmon_init(1); 3772 xmon_on = 1; 3773 } else if (strncmp(p, "off", 3) == 0) 3774 xmon_on = 0; 3775 else 3776 return 1; 3777 3778 return 0; 3779 } 3780 early_param("xmon", early_parse_xmon); 3781 3782 void __init xmon_setup(void) 3783 { 3784 if (xmon_on) 3785 xmon_init(1); 3786 if (xmon_early) 3787 debugger(NULL); 3788 } 3789 3790 #ifdef CONFIG_SPU_BASE 3791 3792 struct spu_info { 3793 struct spu *spu; 3794 u64 saved_mfc_sr1_RW; 3795 u32 saved_spu_runcntl_RW; 3796 unsigned long dump_addr; 3797 u8 stopped_ok; 3798 }; 3799 3800 #define XMON_NUM_SPUS 16 /* Enough for current hardware */ 3801 3802 static struct spu_info spu_info[XMON_NUM_SPUS]; 3803 3804 void xmon_register_spus(struct list_head *list) 3805 { 3806 struct spu *spu; 3807 3808 list_for_each_entry(spu, list, full_list) { 3809 if (spu->number >= XMON_NUM_SPUS) { 3810 WARN_ON(1); 3811 continue; 3812 } 3813 3814 spu_info[spu->number].spu = spu; 3815 spu_info[spu->number].stopped_ok = 0; 3816 spu_info[spu->number].dump_addr = (unsigned long) 3817 spu_info[spu->number].spu->local_store; 3818 } 3819 } 3820 3821 static void stop_spus(void) 3822 { 3823 struct spu *spu; 3824 int i; 3825 u64 tmp; 3826 3827 for (i = 0; i < XMON_NUM_SPUS; i++) { 3828 if (!spu_info[i].spu) 3829 continue; 3830 3831 if (setjmp(bus_error_jmp) == 0) { 3832 catch_memory_errors = 1; 3833 sync(); 3834 3835 spu = spu_info[i].spu; 3836 3837 spu_info[i].saved_spu_runcntl_RW = 3838 in_be32(&spu->problem->spu_runcntl_RW); 3839 3840 tmp = spu_mfc_sr1_get(spu); 3841 spu_info[i].saved_mfc_sr1_RW = tmp; 3842 3843 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 3844 spu_mfc_sr1_set(spu, tmp); 3845 3846 sync(); 3847 __delay(200); 3848 3849 spu_info[i].stopped_ok = 1; 3850 3851 printf("Stopped spu %.2d (was %s)\n", i, 3852 spu_info[i].saved_spu_runcntl_RW ? 3853 "running" : "stopped"); 3854 } else { 3855 catch_memory_errors = 0; 3856 printf("*** Error stopping spu %.2d\n", i); 3857 } 3858 catch_memory_errors = 0; 3859 } 3860 } 3861 3862 static void restart_spus(void) 3863 { 3864 struct spu *spu; 3865 int i; 3866 3867 for (i = 0; i < XMON_NUM_SPUS; i++) { 3868 if (!spu_info[i].spu) 3869 continue; 3870 3871 if (!spu_info[i].stopped_ok) { 3872 printf("*** Error, spu %d was not successfully stopped" 3873 ", not restarting\n", i); 3874 continue; 3875 } 3876 3877 if (setjmp(bus_error_jmp) == 0) { 3878 catch_memory_errors = 1; 3879 sync(); 3880 3881 spu = spu_info[i].spu; 3882 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW); 3883 out_be32(&spu->problem->spu_runcntl_RW, 3884 spu_info[i].saved_spu_runcntl_RW); 3885 3886 sync(); 3887 __delay(200); 3888 3889 printf("Restarted spu %.2d\n", i); 3890 } else { 3891 catch_memory_errors = 0; 3892 printf("*** Error restarting spu %.2d\n", i); 3893 } 3894 catch_memory_errors = 0; 3895 } 3896 } 3897 3898 #define DUMP_WIDTH 23 3899 #define DUMP_VALUE(format, field, value) \ 3900 do { \ 3901 if (setjmp(bus_error_jmp) == 0) { \ 3902 catch_memory_errors = 1; \ 3903 sync(); \ 3904 printf(" %-*s = "format"\n", DUMP_WIDTH, \ 3905 #field, value); \ 3906 sync(); \ 3907 __delay(200); \ 3908 } else { \ 3909 catch_memory_errors = 0; \ 3910 printf(" %-*s = *** Error reading field.\n", \ 3911 DUMP_WIDTH, #field); \ 3912 } \ 3913 catch_memory_errors = 0; \ 3914 } while (0) 3915 3916 #define DUMP_FIELD(obj, format, field) \ 3917 DUMP_VALUE(format, field, obj->field) 3918 3919 static void dump_spu_fields(struct spu *spu) 3920 { 3921 printf("Dumping spu fields at address %p:\n", spu); 3922 3923 DUMP_FIELD(spu, "0x%x", number); 3924 DUMP_FIELD(spu, "%s", name); 3925 DUMP_FIELD(spu, "0x%lx", local_store_phys); 3926 DUMP_FIELD(spu, "0x%p", local_store); 3927 DUMP_FIELD(spu, "0x%lx", ls_size); 3928 DUMP_FIELD(spu, "0x%x", node); 3929 DUMP_FIELD(spu, "0x%lx", flags); 3930 DUMP_FIELD(spu, "%llu", class_0_pending); 3931 DUMP_FIELD(spu, "0x%llx", class_0_dar); 3932 DUMP_FIELD(spu, "0x%llx", class_1_dar); 3933 DUMP_FIELD(spu, "0x%llx", class_1_dsisr); 3934 DUMP_FIELD(spu, "0x%x", irqs[0]); 3935 DUMP_FIELD(spu, "0x%x", irqs[1]); 3936 DUMP_FIELD(spu, "0x%x", irqs[2]); 3937 DUMP_FIELD(spu, "0x%x", slb_replace); 3938 DUMP_FIELD(spu, "%d", pid); 3939 DUMP_FIELD(spu, "0x%p", mm); 3940 DUMP_FIELD(spu, "0x%p", ctx); 3941 DUMP_FIELD(spu, "0x%p", rq); 3942 DUMP_FIELD(spu, "0x%llx", timestamp); 3943 DUMP_FIELD(spu, "0x%lx", problem_phys); 3944 DUMP_FIELD(spu, "0x%p", problem); 3945 DUMP_VALUE("0x%x", problem->spu_runcntl_RW, 3946 in_be32(&spu->problem->spu_runcntl_RW)); 3947 DUMP_VALUE("0x%x", problem->spu_status_R, 3948 in_be32(&spu->problem->spu_status_R)); 3949 DUMP_VALUE("0x%x", problem->spu_npc_RW, 3950 in_be32(&spu->problem->spu_npc_RW)); 3951 DUMP_FIELD(spu, "0x%p", priv2); 3952 DUMP_FIELD(spu, "0x%p", pdata); 3953 } 3954 3955 int 3956 spu_inst_dump(unsigned long adr, long count, int praddr) 3957 { 3958 return generic_inst_dump(adr, count, praddr, print_insn_spu); 3959 } 3960 3961 static void dump_spu_ls(unsigned long num, int subcmd) 3962 { 3963 unsigned long offset, addr, ls_addr; 3964 3965 if (setjmp(bus_error_jmp) == 0) { 3966 catch_memory_errors = 1; 3967 sync(); 3968 ls_addr = (unsigned long)spu_info[num].spu->local_store; 3969 sync(); 3970 __delay(200); 3971 } else { 3972 catch_memory_errors = 0; 3973 printf("*** Error: accessing spu info for spu %ld\n", num); 3974 return; 3975 } 3976 catch_memory_errors = 0; 3977 3978 if (scanhex(&offset)) 3979 addr = ls_addr + offset; 3980 else 3981 addr = spu_info[num].dump_addr; 3982 3983 if (addr >= ls_addr + LS_SIZE) { 3984 printf("*** Error: address outside of local store\n"); 3985 return; 3986 } 3987 3988 switch (subcmd) { 3989 case 'i': 3990 addr += spu_inst_dump(addr, 16, 1); 3991 last_cmd = "sdi\n"; 3992 break; 3993 default: 3994 prdump(addr, 64); 3995 addr += 64; 3996 last_cmd = "sd\n"; 3997 break; 3998 } 3999 4000 spu_info[num].dump_addr = addr; 4001 } 4002 4003 static int do_spu_cmd(void) 4004 { 4005 static unsigned long num = 0; 4006 int cmd, subcmd = 0; 4007 4008 cmd = inchar(); 4009 switch (cmd) { 4010 case 's': 4011 stop_spus(); 4012 break; 4013 case 'r': 4014 restart_spus(); 4015 break; 4016 case 'd': 4017 subcmd = inchar(); 4018 if (isxdigit(subcmd) || subcmd == '\n') 4019 termch = subcmd; 4020 case 'f': 4021 scanhex(&num); 4022 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) { 4023 printf("*** Error: invalid spu number\n"); 4024 return 0; 4025 } 4026 4027 switch (cmd) { 4028 case 'f': 4029 dump_spu_fields(spu_info[num].spu); 4030 break; 4031 default: 4032 dump_spu_ls(num, subcmd); 4033 break; 4034 } 4035 4036 break; 4037 default: 4038 return -1; 4039 } 4040 4041 return 0; 4042 } 4043 #else /* ! CONFIG_SPU_BASE */ 4044 static int do_spu_cmd(void) 4045 { 4046 return -1; 4047 } 4048 #endif 4049