1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Routines providing a simple monitor for use on the PowerMac. 4 * 5 * Copyright (C) 1996-2005 Paul Mackerras. 6 * Copyright (C) 2001 PPC64 Team, IBM Corp 7 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/errno.h> 12 #include <linux/sched/signal.h> 13 #include <linux/smp.h> 14 #include <linux/mm.h> 15 #include <linux/reboot.h> 16 #include <linux/delay.h> 17 #include <linux/kallsyms.h> 18 #include <linux/kmsg_dump.h> 19 #include <linux/cpumask.h> 20 #include <linux/export.h> 21 #include <linux/sysrq.h> 22 #include <linux/interrupt.h> 23 #include <linux/irq.h> 24 #include <linux/bug.h> 25 #include <linux/nmi.h> 26 #include <linux/ctype.h> 27 #include <linux/highmem.h> 28 #include <linux/security.h> 29 30 #include <asm/debugfs.h> 31 #include <asm/ptrace.h> 32 #include <asm/smp.h> 33 #include <asm/string.h> 34 #include <asm/prom.h> 35 #include <asm/machdep.h> 36 #include <asm/xmon.h> 37 #include <asm/processor.h> 38 #include <asm/pgtable.h> 39 #include <asm/mmu.h> 40 #include <asm/mmu_context.h> 41 #include <asm/plpar_wrappers.h> 42 #include <asm/cputable.h> 43 #include <asm/rtas.h> 44 #include <asm/sstep.h> 45 #include <asm/irq_regs.h> 46 #include <asm/spu.h> 47 #include <asm/spu_priv1.h> 48 #include <asm/setjmp.h> 49 #include <asm/reg.h> 50 #include <asm/debug.h> 51 #include <asm/hw_breakpoint.h> 52 #include <asm/xive.h> 53 #include <asm/opal.h> 54 #include <asm/firmware.h> 55 #include <asm/code-patching.h> 56 #include <asm/sections.h> 57 58 #ifdef CONFIG_PPC64 59 #include <asm/hvcall.h> 60 #include <asm/paca.h> 61 #endif 62 63 #include "nonstdio.h" 64 #include "dis-asm.h" 65 66 #ifdef CONFIG_SMP 67 static cpumask_t cpus_in_xmon = CPU_MASK_NONE; 68 static unsigned long xmon_taken = 1; 69 static int xmon_owner; 70 static int xmon_gate; 71 #else 72 #define xmon_owner 0 73 #endif /* CONFIG_SMP */ 74 75 #ifdef CONFIG_PPC_PSERIES 76 static int set_indicator_token = RTAS_UNKNOWN_SERVICE; 77 #endif 78 static unsigned long in_xmon __read_mostly = 0; 79 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT); 80 static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE); 81 82 static unsigned long adrs; 83 static int size = 1; 84 #define MAX_DUMP (128 * 1024) 85 static unsigned long ndump = 64; 86 static unsigned long nidump = 16; 87 static unsigned long ncsum = 4096; 88 static int termch; 89 static char tmpstr[128]; 90 static int tracing_enabled; 91 92 static long bus_error_jmp[JMP_BUF_LEN]; 93 static int catch_memory_errors; 94 static int catch_spr_faults; 95 static long *xmon_fault_jmp[NR_CPUS]; 96 97 /* Breakpoint stuff */ 98 struct bpt { 99 unsigned long address; 100 unsigned int instr[2]; 101 atomic_t ref_count; 102 int enabled; 103 unsigned long pad; 104 }; 105 106 /* Bits in bpt.enabled */ 107 #define BP_CIABR 1 108 #define BP_TRAP 2 109 #define BP_DABR 4 110 111 #define NBPTS 256 112 static struct bpt bpts[NBPTS]; 113 static struct bpt dabr; 114 static struct bpt *iabr; 115 static unsigned bpinstr = 0x7fe00008; /* trap */ 116 117 #define BP_NUM(bp) ((bp) - bpts + 1) 118 119 /* Prototypes */ 120 static int cmds(struct pt_regs *); 121 static int mread(unsigned long, void *, int); 122 static int mwrite(unsigned long, void *, int); 123 static int handle_fault(struct pt_regs *); 124 static void byterev(unsigned char *, int); 125 static void memex(void); 126 static int bsesc(void); 127 static void dump(void); 128 static void show_pte(unsigned long); 129 static void prdump(unsigned long, long); 130 static int ppc_inst_dump(unsigned long, long, int); 131 static void dump_log_buf(void); 132 133 #ifdef CONFIG_PPC_POWERNV 134 static void dump_opal_msglog(void); 135 #else 136 static inline void dump_opal_msglog(void) 137 { 138 printf("Machine is not running OPAL firmware.\n"); 139 } 140 #endif 141 142 static void backtrace(struct pt_regs *); 143 static void excprint(struct pt_regs *); 144 static void prregs(struct pt_regs *); 145 static void memops(int); 146 static void memlocate(void); 147 static void memzcan(void); 148 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned); 149 int skipbl(void); 150 int scanhex(unsigned long *valp); 151 static void scannl(void); 152 static int hexdigit(int); 153 void getstring(char *, int); 154 static void flush_input(void); 155 static int inchar(void); 156 static void take_input(char *); 157 static int read_spr(int, unsigned long *); 158 static void write_spr(int, unsigned long); 159 static void super_regs(void); 160 static void remove_bpts(void); 161 static void insert_bpts(void); 162 static void remove_cpu_bpts(void); 163 static void insert_cpu_bpts(void); 164 static struct bpt *at_breakpoint(unsigned long pc); 165 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp); 166 static int do_step(struct pt_regs *); 167 static void bpt_cmds(void); 168 static void cacheflush(void); 169 static int cpu_cmd(void); 170 static void csum(void); 171 static void bootcmds(void); 172 static void proccall(void); 173 static void show_tasks(void); 174 void dump_segments(void); 175 static void symbol_lookup(void); 176 static void xmon_show_stack(unsigned long sp, unsigned long lr, 177 unsigned long pc); 178 static void xmon_print_symbol(unsigned long address, const char *mid, 179 const char *after); 180 static const char *getvecname(unsigned long vec); 181 182 static int do_spu_cmd(void); 183 184 #ifdef CONFIG_44x 185 static void dump_tlb_44x(void); 186 #endif 187 #ifdef CONFIG_PPC_BOOK3E 188 static void dump_tlb_book3e(void); 189 #endif 190 191 static void clear_all_bpt(void); 192 193 #ifdef CONFIG_PPC64 194 #define REG "%.16lx" 195 #else 196 #define REG "%.8lx" 197 #endif 198 199 #ifdef __LITTLE_ENDIAN__ 200 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0]) 201 #else 202 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3]) 203 #endif 204 205 static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n"; 206 207 static char *help_string = "\ 208 Commands:\n\ 209 b show breakpoints\n\ 210 bd set data breakpoint\n\ 211 bi set instruction breakpoint\n\ 212 bc clear breakpoint\n" 213 #ifdef CONFIG_SMP 214 "\ 215 c print cpus stopped in xmon\n\ 216 c# try to switch to cpu number h (in hex)\n" 217 #endif 218 "\ 219 C checksum\n\ 220 d dump bytes\n\ 221 d1 dump 1 byte values\n\ 222 d2 dump 2 byte values\n\ 223 d4 dump 4 byte values\n\ 224 d8 dump 8 byte values\n\ 225 di dump instructions\n\ 226 df dump float values\n\ 227 dd dump double values\n\ 228 dl dump the kernel log buffer\n" 229 #ifdef CONFIG_PPC_POWERNV 230 "\ 231 do dump the OPAL message log\n" 232 #endif 233 #ifdef CONFIG_PPC64 234 "\ 235 dp[#] dump paca for current cpu, or cpu #\n\ 236 dpa dump paca for all possible cpus\n" 237 #endif 238 "\ 239 dr dump stream of raw bytes\n\ 240 dv dump virtual address translation \n\ 241 dt dump the tracing buffers (uses printk)\n\ 242 dtc dump the tracing buffers for current CPU (uses printk)\n\ 243 " 244 #ifdef CONFIG_PPC_POWERNV 245 " dx# dump xive on CPU #\n\ 246 dxi# dump xive irq state #\n\ 247 dxa dump xive on all CPUs\n" 248 #endif 249 " e print exception information\n\ 250 f flush cache\n\ 251 la lookup symbol+offset of specified address\n\ 252 ls lookup address of specified symbol\n\ 253 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\ 254 m examine/change memory\n\ 255 mm move a block of memory\n\ 256 ms set a block of memory\n\ 257 md compare two blocks of memory\n\ 258 ml locate a block of memory\n\ 259 mz zero a block of memory\n\ 260 mi show information about memory allocation\n\ 261 p call a procedure\n\ 262 P list processes/tasks\n\ 263 r print registers\n\ 264 s single step\n" 265 #ifdef CONFIG_SPU_BASE 266 " ss stop execution on all spus\n\ 267 sr restore execution on stopped spus\n\ 268 sf # dump spu fields for spu # (in hex)\n\ 269 sd # dump spu local store for spu # (in hex)\n\ 270 sdi # disassemble spu local store for spu # (in hex)\n" 271 #endif 272 " S print special registers\n\ 273 Sa print all SPRs\n\ 274 Sr # read SPR #\n\ 275 Sw #v write v to SPR #\n\ 276 t print backtrace\n\ 277 x exit monitor and recover\n\ 278 X exit monitor and don't recover\n" 279 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E) 280 " u dump segment table or SLB\n" 281 #elif defined(CONFIG_PPC_BOOK3S_32) 282 " u dump segment registers\n" 283 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E) 284 " u dump TLB\n" 285 #endif 286 " U show uptime information\n" 287 " ? help\n" 288 " # n limit output to n lines per page (for dp, dpa, dl)\n" 289 " zr reboot\n" 290 " zh halt\n" 291 ; 292 293 #ifdef CONFIG_SECURITY 294 static bool xmon_is_locked_down(void) 295 { 296 static bool lockdown; 297 298 if (!lockdown) { 299 lockdown = !!security_locked_down(LOCKDOWN_XMON_RW); 300 if (lockdown) { 301 printf("xmon: Disabled due to kernel lockdown\n"); 302 xmon_is_ro = true; 303 } 304 } 305 306 if (!xmon_is_ro) { 307 xmon_is_ro = !!security_locked_down(LOCKDOWN_XMON_WR); 308 if (xmon_is_ro) 309 printf("xmon: Read-only due to kernel lockdown\n"); 310 } 311 312 return lockdown; 313 } 314 #else /* CONFIG_SECURITY */ 315 static inline bool xmon_is_locked_down(void) 316 { 317 return false; 318 } 319 #endif 320 321 static struct pt_regs *xmon_regs; 322 323 static inline void sync(void) 324 { 325 asm volatile("sync; isync"); 326 } 327 328 static inline void store_inst(void *p) 329 { 330 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p)); 331 } 332 333 static inline void cflush(void *p) 334 { 335 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p)); 336 } 337 338 static inline void cinval(void *p) 339 { 340 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p)); 341 } 342 343 /** 344 * write_ciabr() - write the CIABR SPR 345 * @ciabr: The value to write. 346 * 347 * This function writes a value to the CIARB register either directly 348 * through mtspr instruction if the kernel is in HV privilege mode or 349 * call a hypervisor function to achieve the same in case the kernel 350 * is in supervisor privilege mode. 351 */ 352 static void write_ciabr(unsigned long ciabr) 353 { 354 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 355 return; 356 357 if (cpu_has_feature(CPU_FTR_HVMODE)) { 358 mtspr(SPRN_CIABR, ciabr); 359 return; 360 } 361 plpar_set_ciabr(ciabr); 362 } 363 364 /** 365 * set_ciabr() - set the CIABR 366 * @addr: The value to set. 367 * 368 * This function sets the correct privilege value into the the HW 369 * breakpoint address before writing it up in the CIABR register. 370 */ 371 static void set_ciabr(unsigned long addr) 372 { 373 addr &= ~CIABR_PRIV; 374 375 if (cpu_has_feature(CPU_FTR_HVMODE)) 376 addr |= CIABR_PRIV_HYPER; 377 else 378 addr |= CIABR_PRIV_SUPER; 379 write_ciabr(addr); 380 } 381 382 /* 383 * Disable surveillance (the service processor watchdog function) 384 * while we are in xmon. 385 * XXX we should re-enable it when we leave. :) 386 */ 387 #define SURVEILLANCE_TOKEN 9000 388 389 static inline void disable_surveillance(void) 390 { 391 #ifdef CONFIG_PPC_PSERIES 392 /* Since this can't be a module, args should end up below 4GB. */ 393 static struct rtas_args args; 394 395 /* 396 * At this point we have got all the cpus we can into 397 * xmon, so there is hopefully no other cpu calling RTAS 398 * at the moment, even though we don't take rtas.lock. 399 * If we did try to take rtas.lock there would be a 400 * real possibility of deadlock. 401 */ 402 if (set_indicator_token == RTAS_UNKNOWN_SERVICE) 403 return; 404 405 rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL, 406 SURVEILLANCE_TOKEN, 0, 0); 407 408 #endif /* CONFIG_PPC_PSERIES */ 409 } 410 411 #ifdef CONFIG_SMP 412 static int xmon_speaker; 413 414 static void get_output_lock(void) 415 { 416 int me = smp_processor_id() + 0x100; 417 int last_speaker = 0, prev; 418 long timeout; 419 420 if (xmon_speaker == me) 421 return; 422 423 for (;;) { 424 last_speaker = cmpxchg(&xmon_speaker, 0, me); 425 if (last_speaker == 0) 426 return; 427 428 /* 429 * Wait a full second for the lock, we might be on a slow 430 * console, but check every 100us. 431 */ 432 timeout = 10000; 433 while (xmon_speaker == last_speaker) { 434 if (--timeout > 0) { 435 udelay(100); 436 continue; 437 } 438 439 /* hostile takeover */ 440 prev = cmpxchg(&xmon_speaker, last_speaker, me); 441 if (prev == last_speaker) 442 return; 443 break; 444 } 445 } 446 } 447 448 static void release_output_lock(void) 449 { 450 xmon_speaker = 0; 451 } 452 453 int cpus_are_in_xmon(void) 454 { 455 return !cpumask_empty(&cpus_in_xmon); 456 } 457 458 static bool wait_for_other_cpus(int ncpus) 459 { 460 unsigned long timeout; 461 462 /* We wait for 2s, which is a metric "little while" */ 463 for (timeout = 20000; timeout != 0; --timeout) { 464 if (cpumask_weight(&cpus_in_xmon) >= ncpus) 465 return true; 466 udelay(100); 467 barrier(); 468 } 469 470 return false; 471 } 472 #else /* CONFIG_SMP */ 473 static inline void get_output_lock(void) {} 474 static inline void release_output_lock(void) {} 475 #endif 476 477 static inline int unrecoverable_excp(struct pt_regs *regs) 478 { 479 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E) 480 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */ 481 return 0; 482 #else 483 return ((regs->msr & MSR_RI) == 0); 484 #endif 485 } 486 487 static int xmon_core(struct pt_regs *regs, int fromipi) 488 { 489 int cmd = 0; 490 struct bpt *bp; 491 long recurse_jmp[JMP_BUF_LEN]; 492 bool locked_down; 493 unsigned long offset; 494 unsigned long flags; 495 #ifdef CONFIG_SMP 496 int cpu; 497 int secondary; 498 #endif 499 500 local_irq_save(flags); 501 hard_irq_disable(); 502 503 locked_down = xmon_is_locked_down(); 504 505 if (!fromipi) { 506 tracing_enabled = tracing_is_on(); 507 tracing_off(); 508 } 509 510 bp = in_breakpoint_table(regs->nip, &offset); 511 if (bp != NULL) { 512 regs->nip = bp->address + offset; 513 atomic_dec(&bp->ref_count); 514 } 515 516 remove_cpu_bpts(); 517 518 #ifdef CONFIG_SMP 519 cpu = smp_processor_id(); 520 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 521 /* 522 * We catch SPR read/write faults here because the 0x700, 0xf60 523 * etc. handlers don't call debugger_fault_handler(). 524 */ 525 if (catch_spr_faults) 526 longjmp(bus_error_jmp, 1); 527 get_output_lock(); 528 excprint(regs); 529 printf("cpu 0x%x: Exception %lx %s in xmon, " 530 "returning to main loop\n", 531 cpu, regs->trap, getvecname(TRAP(regs))); 532 release_output_lock(); 533 longjmp(xmon_fault_jmp[cpu], 1); 534 } 535 536 if (setjmp(recurse_jmp) != 0) { 537 if (!in_xmon || !xmon_gate) { 538 get_output_lock(); 539 printf("xmon: WARNING: bad recursive fault " 540 "on cpu 0x%x\n", cpu); 541 release_output_lock(); 542 goto waiting; 543 } 544 secondary = !(xmon_taken && cpu == xmon_owner); 545 goto cmdloop; 546 } 547 548 xmon_fault_jmp[cpu] = recurse_jmp; 549 550 bp = NULL; 551 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) 552 bp = at_breakpoint(regs->nip); 553 if (bp || unrecoverable_excp(regs)) 554 fromipi = 0; 555 556 if (!fromipi) { 557 get_output_lock(); 558 if (!locked_down) 559 excprint(regs); 560 if (bp) { 561 printf("cpu 0x%x stopped at breakpoint 0x%tx (", 562 cpu, BP_NUM(bp)); 563 xmon_print_symbol(regs->nip, " ", ")\n"); 564 } 565 if (unrecoverable_excp(regs)) 566 printf("WARNING: exception is not recoverable, " 567 "can't continue\n"); 568 release_output_lock(); 569 } 570 571 cpumask_set_cpu(cpu, &cpus_in_xmon); 572 573 waiting: 574 secondary = 1; 575 spin_begin(); 576 while (secondary && !xmon_gate) { 577 if (in_xmon == 0) { 578 if (fromipi) { 579 spin_end(); 580 goto leave; 581 } 582 secondary = test_and_set_bit(0, &in_xmon); 583 } 584 spin_cpu_relax(); 585 touch_nmi_watchdog(); 586 } 587 spin_end(); 588 589 if (!secondary && !xmon_gate) { 590 /* we are the first cpu to come in */ 591 /* interrupt other cpu(s) */ 592 int ncpus = num_online_cpus(); 593 594 xmon_owner = cpu; 595 mb(); 596 if (ncpus > 1) { 597 /* 598 * A system reset (trap == 0x100) can be triggered on 599 * all CPUs, so when we come in via 0x100 try waiting 600 * for the other CPUs to come in before we send the 601 * debugger break (IPI). This is similar to 602 * crash_kexec_secondary(). 603 */ 604 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus)) 605 smp_send_debugger_break(); 606 607 wait_for_other_cpus(ncpus); 608 } 609 remove_bpts(); 610 disable_surveillance(); 611 612 if (!locked_down) { 613 /* for breakpoint or single step, print curr insn */ 614 if (bp || TRAP(regs) == 0xd00) 615 ppc_inst_dump(regs->nip, 1, 0); 616 printf("enter ? for help\n"); 617 } 618 619 mb(); 620 xmon_gate = 1; 621 barrier(); 622 touch_nmi_watchdog(); 623 } 624 625 cmdloop: 626 while (in_xmon) { 627 if (secondary) { 628 spin_begin(); 629 if (cpu == xmon_owner) { 630 if (!test_and_set_bit(0, &xmon_taken)) { 631 secondary = 0; 632 spin_end(); 633 continue; 634 } 635 /* missed it */ 636 while (cpu == xmon_owner) 637 spin_cpu_relax(); 638 } 639 spin_cpu_relax(); 640 touch_nmi_watchdog(); 641 } else { 642 if (!locked_down) 643 cmd = cmds(regs); 644 if (locked_down || cmd != 0) { 645 /* exiting xmon */ 646 insert_bpts(); 647 xmon_gate = 0; 648 wmb(); 649 in_xmon = 0; 650 break; 651 } 652 /* have switched to some other cpu */ 653 secondary = 1; 654 } 655 } 656 leave: 657 cpumask_clear_cpu(cpu, &cpus_in_xmon); 658 xmon_fault_jmp[cpu] = NULL; 659 #else 660 /* UP is simple... */ 661 if (in_xmon) { 662 printf("Exception %lx %s in xmon, returning to main loop\n", 663 regs->trap, getvecname(TRAP(regs))); 664 longjmp(xmon_fault_jmp[0], 1); 665 } 666 if (setjmp(recurse_jmp) == 0) { 667 xmon_fault_jmp[0] = recurse_jmp; 668 in_xmon = 1; 669 670 excprint(regs); 671 bp = at_breakpoint(regs->nip); 672 if (bp) { 673 printf("Stopped at breakpoint %tx (", BP_NUM(bp)); 674 xmon_print_symbol(regs->nip, " ", ")\n"); 675 } 676 if (unrecoverable_excp(regs)) 677 printf("WARNING: exception is not recoverable, " 678 "can't continue\n"); 679 remove_bpts(); 680 disable_surveillance(); 681 if (!locked_down) { 682 /* for breakpoint or single step, print current insn */ 683 if (bp || TRAP(regs) == 0xd00) 684 ppc_inst_dump(regs->nip, 1, 0); 685 printf("enter ? for help\n"); 686 } 687 } 688 689 if (!locked_down) 690 cmd = cmds(regs); 691 692 insert_bpts(); 693 in_xmon = 0; 694 #endif 695 696 #ifdef CONFIG_BOOKE 697 if (regs->msr & MSR_DE) { 698 bp = at_breakpoint(regs->nip); 699 if (bp != NULL) { 700 regs->nip = (unsigned long) &bp->instr[0]; 701 atomic_inc(&bp->ref_count); 702 } 703 } 704 #else 705 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 706 bp = at_breakpoint(regs->nip); 707 if (bp != NULL) { 708 int stepped = emulate_step(regs, bp->instr[0]); 709 if (stepped == 0) { 710 regs->nip = (unsigned long) &bp->instr[0]; 711 atomic_inc(&bp->ref_count); 712 } else if (stepped < 0) { 713 printf("Couldn't single-step %s instruction\n", 714 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd")); 715 } 716 } 717 } 718 #endif 719 if (locked_down) 720 clear_all_bpt(); 721 else 722 insert_cpu_bpts(); 723 724 touch_nmi_watchdog(); 725 local_irq_restore(flags); 726 727 return cmd != 'X' && cmd != EOF; 728 } 729 730 int xmon(struct pt_regs *excp) 731 { 732 struct pt_regs regs; 733 734 if (excp == NULL) { 735 ppc_save_regs(®s); 736 excp = ®s; 737 } 738 739 return xmon_core(excp, 0); 740 } 741 EXPORT_SYMBOL(xmon); 742 743 irqreturn_t xmon_irq(int irq, void *d) 744 { 745 unsigned long flags; 746 local_irq_save(flags); 747 printf("Keyboard interrupt\n"); 748 xmon(get_irq_regs()); 749 local_irq_restore(flags); 750 return IRQ_HANDLED; 751 } 752 753 static int xmon_bpt(struct pt_regs *regs) 754 { 755 struct bpt *bp; 756 unsigned long offset; 757 758 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 759 return 0; 760 761 /* Are we at the trap at bp->instr[1] for some bp? */ 762 bp = in_breakpoint_table(regs->nip, &offset); 763 if (bp != NULL && offset == 4) { 764 regs->nip = bp->address + 4; 765 atomic_dec(&bp->ref_count); 766 return 1; 767 } 768 769 /* Are we at a breakpoint? */ 770 bp = at_breakpoint(regs->nip); 771 if (!bp) 772 return 0; 773 774 xmon_core(regs, 0); 775 776 return 1; 777 } 778 779 static int xmon_sstep(struct pt_regs *regs) 780 { 781 if (user_mode(regs)) 782 return 0; 783 xmon_core(regs, 0); 784 return 1; 785 } 786 787 static int xmon_break_match(struct pt_regs *regs) 788 { 789 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 790 return 0; 791 if (dabr.enabled == 0) 792 return 0; 793 xmon_core(regs, 0); 794 return 1; 795 } 796 797 static int xmon_iabr_match(struct pt_regs *regs) 798 { 799 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 800 return 0; 801 if (iabr == NULL) 802 return 0; 803 xmon_core(regs, 0); 804 return 1; 805 } 806 807 static int xmon_ipi(struct pt_regs *regs) 808 { 809 #ifdef CONFIG_SMP 810 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon)) 811 xmon_core(regs, 1); 812 #endif 813 return 0; 814 } 815 816 static int xmon_fault_handler(struct pt_regs *regs) 817 { 818 struct bpt *bp; 819 unsigned long offset; 820 821 if (in_xmon && catch_memory_errors) 822 handle_fault(regs); /* doesn't return */ 823 824 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 825 bp = in_breakpoint_table(regs->nip, &offset); 826 if (bp != NULL) { 827 regs->nip = bp->address + offset; 828 atomic_dec(&bp->ref_count); 829 } 830 } 831 832 return 0; 833 } 834 835 /* Force enable xmon if not already enabled */ 836 static inline void force_enable_xmon(void) 837 { 838 /* Enable xmon hooks if needed */ 839 if (!xmon_on) { 840 printf("xmon: Enabling debugger hooks\n"); 841 xmon_on = 1; 842 } 843 } 844 845 static struct bpt *at_breakpoint(unsigned long pc) 846 { 847 int i; 848 struct bpt *bp; 849 850 bp = bpts; 851 for (i = 0; i < NBPTS; ++i, ++bp) 852 if (bp->enabled && pc == bp->address) 853 return bp; 854 return NULL; 855 } 856 857 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp) 858 { 859 unsigned long off; 860 861 off = nip - (unsigned long) bpts; 862 if (off >= sizeof(bpts)) 863 return NULL; 864 off %= sizeof(struct bpt); 865 if (off != offsetof(struct bpt, instr[0]) 866 && off != offsetof(struct bpt, instr[1])) 867 return NULL; 868 *offp = off - offsetof(struct bpt, instr[0]); 869 return (struct bpt *) (nip - off); 870 } 871 872 static struct bpt *new_breakpoint(unsigned long a) 873 { 874 struct bpt *bp; 875 876 a &= ~3UL; 877 bp = at_breakpoint(a); 878 if (bp) 879 return bp; 880 881 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 882 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) { 883 bp->address = a; 884 bp->instr[1] = bpinstr; 885 store_inst(&bp->instr[1]); 886 return bp; 887 } 888 } 889 890 printf("Sorry, no free breakpoints. Please clear one first.\n"); 891 return NULL; 892 } 893 894 static void insert_bpts(void) 895 { 896 int i; 897 struct bpt *bp; 898 899 bp = bpts; 900 for (i = 0; i < NBPTS; ++i, ++bp) { 901 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0) 902 continue; 903 if (mread(bp->address, &bp->instr[0], 4) != 4) { 904 printf("Couldn't read instruction at %lx, " 905 "disabling breakpoint there\n", bp->address); 906 bp->enabled = 0; 907 continue; 908 } 909 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) { 910 printf("Breakpoint at %lx is on an mtmsrd or rfid " 911 "instruction, disabling it\n", bp->address); 912 bp->enabled = 0; 913 continue; 914 } 915 store_inst(&bp->instr[0]); 916 if (bp->enabled & BP_CIABR) 917 continue; 918 if (patch_instruction((unsigned int *)bp->address, 919 bpinstr) != 0) { 920 printf("Couldn't write instruction at %lx, " 921 "disabling breakpoint there\n", bp->address); 922 bp->enabled &= ~BP_TRAP; 923 continue; 924 } 925 store_inst((void *)bp->address); 926 } 927 } 928 929 static void insert_cpu_bpts(void) 930 { 931 struct arch_hw_breakpoint brk; 932 933 if (dabr.enabled) { 934 brk.address = dabr.address; 935 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL; 936 brk.len = DABR_MAX_LEN; 937 __set_breakpoint(&brk); 938 } 939 940 if (iabr) 941 set_ciabr(iabr->address); 942 } 943 944 static void remove_bpts(void) 945 { 946 int i; 947 struct bpt *bp; 948 unsigned instr; 949 950 bp = bpts; 951 for (i = 0; i < NBPTS; ++i, ++bp) { 952 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) 953 continue; 954 if (mread(bp->address, &instr, 4) == 4 955 && instr == bpinstr 956 && patch_instruction( 957 (unsigned int *)bp->address, bp->instr[0]) != 0) 958 printf("Couldn't remove breakpoint at %lx\n", 959 bp->address); 960 else 961 store_inst((void *)bp->address); 962 } 963 } 964 965 static void remove_cpu_bpts(void) 966 { 967 hw_breakpoint_disable(); 968 write_ciabr(0); 969 } 970 971 /* Based on uptime_proc_show(). */ 972 static void 973 show_uptime(void) 974 { 975 struct timespec64 uptime; 976 977 if (setjmp(bus_error_jmp) == 0) { 978 catch_memory_errors = 1; 979 sync(); 980 981 ktime_get_coarse_boottime_ts64(&uptime); 982 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec, 983 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100))); 984 985 sync(); 986 __delay(200); \ 987 } 988 catch_memory_errors = 0; 989 } 990 991 static void set_lpp_cmd(void) 992 { 993 unsigned long lpp; 994 995 if (!scanhex(&lpp)) { 996 printf("Invalid number.\n"); 997 lpp = 0; 998 } 999 xmon_set_pagination_lpp(lpp); 1000 } 1001 /* Command interpreting routine */ 1002 static char *last_cmd; 1003 1004 static int 1005 cmds(struct pt_regs *excp) 1006 { 1007 int cmd = 0; 1008 1009 last_cmd = NULL; 1010 xmon_regs = excp; 1011 1012 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1013 1014 for(;;) { 1015 #ifdef CONFIG_SMP 1016 printf("%x:", smp_processor_id()); 1017 #endif /* CONFIG_SMP */ 1018 printf("mon> "); 1019 flush_input(); 1020 termch = 0; 1021 cmd = skipbl(); 1022 if( cmd == '\n' ) { 1023 if (last_cmd == NULL) 1024 continue; 1025 take_input(last_cmd); 1026 last_cmd = NULL; 1027 cmd = inchar(); 1028 } 1029 switch (cmd) { 1030 case 'm': 1031 cmd = inchar(); 1032 switch (cmd) { 1033 case 'm': 1034 case 's': 1035 case 'd': 1036 memops(cmd); 1037 break; 1038 case 'l': 1039 memlocate(); 1040 break; 1041 case 'z': 1042 if (xmon_is_ro) { 1043 printf(xmon_ro_msg); 1044 break; 1045 } 1046 memzcan(); 1047 break; 1048 case 'i': 1049 show_mem(0, NULL); 1050 break; 1051 default: 1052 termch = cmd; 1053 memex(); 1054 } 1055 break; 1056 case 'd': 1057 dump(); 1058 break; 1059 case 'l': 1060 symbol_lookup(); 1061 break; 1062 case 'r': 1063 prregs(excp); /* print regs */ 1064 break; 1065 case 'e': 1066 excprint(excp); 1067 break; 1068 case 'S': 1069 super_regs(); 1070 break; 1071 case 't': 1072 backtrace(excp); 1073 break; 1074 case 'f': 1075 cacheflush(); 1076 break; 1077 case 's': 1078 if (do_spu_cmd() == 0) 1079 break; 1080 if (do_step(excp)) 1081 return cmd; 1082 break; 1083 case 'x': 1084 case 'X': 1085 if (tracing_enabled) 1086 tracing_on(); 1087 return cmd; 1088 case EOF: 1089 printf(" <no input ...>\n"); 1090 mdelay(2000); 1091 return cmd; 1092 case '?': 1093 xmon_puts(help_string); 1094 break; 1095 case '#': 1096 set_lpp_cmd(); 1097 break; 1098 case 'b': 1099 bpt_cmds(); 1100 break; 1101 case 'C': 1102 csum(); 1103 break; 1104 case 'c': 1105 if (cpu_cmd()) 1106 return 0; 1107 break; 1108 case 'z': 1109 bootcmds(); 1110 break; 1111 case 'p': 1112 if (xmon_is_ro) { 1113 printf(xmon_ro_msg); 1114 break; 1115 } 1116 proccall(); 1117 break; 1118 case 'P': 1119 show_tasks(); 1120 break; 1121 #ifdef CONFIG_PPC_BOOK3S 1122 case 'u': 1123 dump_segments(); 1124 break; 1125 #elif defined(CONFIG_44x) 1126 case 'u': 1127 dump_tlb_44x(); 1128 break; 1129 #elif defined(CONFIG_PPC_BOOK3E) 1130 case 'u': 1131 dump_tlb_book3e(); 1132 break; 1133 #endif 1134 case 'U': 1135 show_uptime(); 1136 break; 1137 default: 1138 printf("Unrecognized command: "); 1139 do { 1140 if (' ' < cmd && cmd <= '~') 1141 putchar(cmd); 1142 else 1143 printf("\\x%x", cmd); 1144 cmd = inchar(); 1145 } while (cmd != '\n'); 1146 printf(" (type ? for help)\n"); 1147 break; 1148 } 1149 } 1150 } 1151 1152 #ifdef CONFIG_BOOKE 1153 static int do_step(struct pt_regs *regs) 1154 { 1155 regs->msr |= MSR_DE; 1156 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 1157 return 1; 1158 } 1159 #else 1160 /* 1161 * Step a single instruction. 1162 * Some instructions we emulate, others we execute with MSR_SE set. 1163 */ 1164 static int do_step(struct pt_regs *regs) 1165 { 1166 unsigned int instr; 1167 int stepped; 1168 1169 force_enable_xmon(); 1170 /* check we are in 64-bit kernel mode, translation enabled */ 1171 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { 1172 if (mread(regs->nip, &instr, 4) == 4) { 1173 stepped = emulate_step(regs, instr); 1174 if (stepped < 0) { 1175 printf("Couldn't single-step %s instruction\n", 1176 (IS_RFID(instr)? "rfid": "mtmsrd")); 1177 return 0; 1178 } 1179 if (stepped > 0) { 1180 regs->trap = 0xd00 | (regs->trap & 1); 1181 printf("stepped to "); 1182 xmon_print_symbol(regs->nip, " ", "\n"); 1183 ppc_inst_dump(regs->nip, 1, 0); 1184 return 0; 1185 } 1186 } 1187 } 1188 regs->msr |= MSR_SE; 1189 return 1; 1190 } 1191 #endif 1192 1193 static void bootcmds(void) 1194 { 1195 int cmd; 1196 1197 cmd = inchar(); 1198 if (cmd == 'r') 1199 ppc_md.restart(NULL); 1200 else if (cmd == 'h') 1201 ppc_md.halt(); 1202 else if (cmd == 'p') 1203 if (pm_power_off) 1204 pm_power_off(); 1205 } 1206 1207 static int cpu_cmd(void) 1208 { 1209 #ifdef CONFIG_SMP 1210 unsigned long cpu, first_cpu, last_cpu; 1211 int timeout; 1212 1213 if (!scanhex(&cpu)) { 1214 /* print cpus waiting or in xmon */ 1215 printf("cpus stopped:"); 1216 last_cpu = first_cpu = NR_CPUS; 1217 for_each_possible_cpu(cpu) { 1218 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1219 if (cpu == last_cpu + 1) { 1220 last_cpu = cpu; 1221 } else { 1222 if (last_cpu != first_cpu) 1223 printf("-0x%lx", last_cpu); 1224 last_cpu = first_cpu = cpu; 1225 printf(" 0x%lx", cpu); 1226 } 1227 } 1228 } 1229 if (last_cpu != first_cpu) 1230 printf("-0x%lx", last_cpu); 1231 printf("\n"); 1232 return 0; 1233 } 1234 /* try to switch to cpu specified */ 1235 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1236 printf("cpu 0x%lx isn't in xmon\n", cpu); 1237 #ifdef CONFIG_PPC64 1238 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu); 1239 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0); 1240 #endif 1241 return 0; 1242 } 1243 xmon_taken = 0; 1244 mb(); 1245 xmon_owner = cpu; 1246 timeout = 10000000; 1247 while (!xmon_taken) { 1248 if (--timeout == 0) { 1249 if (test_and_set_bit(0, &xmon_taken)) 1250 break; 1251 /* take control back */ 1252 mb(); 1253 xmon_owner = smp_processor_id(); 1254 printf("cpu 0x%lx didn't take control\n", cpu); 1255 return 0; 1256 } 1257 barrier(); 1258 } 1259 return 1; 1260 #else 1261 return 0; 1262 #endif /* CONFIG_SMP */ 1263 } 1264 1265 static unsigned short fcstab[256] = { 1266 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 1267 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, 1268 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 1269 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, 1270 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, 1271 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, 1272 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, 1273 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, 1274 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, 1275 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, 1276 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, 1277 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, 1278 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, 1279 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, 1280 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, 1281 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, 1282 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, 1283 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, 1284 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, 1285 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, 1286 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, 1287 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, 1288 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, 1289 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, 1290 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, 1291 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, 1292 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, 1293 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, 1294 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, 1295 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, 1296 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, 1297 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 1298 }; 1299 1300 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) 1301 1302 static void 1303 csum(void) 1304 { 1305 unsigned int i; 1306 unsigned short fcs; 1307 unsigned char v; 1308 1309 if (!scanhex(&adrs)) 1310 return; 1311 if (!scanhex(&ncsum)) 1312 return; 1313 fcs = 0xffff; 1314 for (i = 0; i < ncsum; ++i) { 1315 if (mread(adrs+i, &v, 1) == 0) { 1316 printf("csum stopped at "REG"\n", adrs+i); 1317 break; 1318 } 1319 fcs = FCS(fcs, v); 1320 } 1321 printf("%x\n", fcs); 1322 } 1323 1324 /* 1325 * Check if this is a suitable place to put a breakpoint. 1326 */ 1327 static long check_bp_loc(unsigned long addr) 1328 { 1329 unsigned int instr; 1330 1331 addr &= ~3; 1332 if (!is_kernel_addr(addr)) { 1333 printf("Breakpoints may only be placed at kernel addresses\n"); 1334 return 0; 1335 } 1336 if (!mread(addr, &instr, sizeof(instr))) { 1337 printf("Can't read instruction at address %lx\n", addr); 1338 return 0; 1339 } 1340 if (IS_MTMSRD(instr) || IS_RFID(instr)) { 1341 printf("Breakpoints may not be placed on mtmsrd or rfid " 1342 "instructions\n"); 1343 return 0; 1344 } 1345 return 1; 1346 } 1347 1348 static char *breakpoint_help_string = 1349 "Breakpoint command usage:\n" 1350 "b show breakpoints\n" 1351 "b <addr> [cnt] set breakpoint at given instr addr\n" 1352 "bc clear all breakpoints\n" 1353 "bc <n/addr> clear breakpoint number n or at addr\n" 1354 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n" 1355 "bd <addr> [cnt] set hardware data breakpoint\n" 1356 ""; 1357 1358 static void 1359 bpt_cmds(void) 1360 { 1361 int cmd; 1362 unsigned long a; 1363 int i; 1364 struct bpt *bp; 1365 1366 cmd = inchar(); 1367 1368 switch (cmd) { 1369 #ifndef CONFIG_PPC_8xx 1370 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n"; 1371 int mode; 1372 case 'd': /* bd - hardware data breakpoint */ 1373 if (xmon_is_ro) { 1374 printf(xmon_ro_msg); 1375 break; 1376 } 1377 if (!ppc_breakpoint_available()) { 1378 printf("Hardware data breakpoint not supported on this cpu\n"); 1379 break; 1380 } 1381 mode = 7; 1382 cmd = inchar(); 1383 if (cmd == 'r') 1384 mode = 5; 1385 else if (cmd == 'w') 1386 mode = 6; 1387 else 1388 termch = cmd; 1389 dabr.address = 0; 1390 dabr.enabled = 0; 1391 if (scanhex(&dabr.address)) { 1392 if (!is_kernel_addr(dabr.address)) { 1393 printf(badaddr); 1394 break; 1395 } 1396 dabr.address &= ~HW_BRK_TYPE_DABR; 1397 dabr.enabled = mode | BP_DABR; 1398 } 1399 1400 force_enable_xmon(); 1401 break; 1402 1403 case 'i': /* bi - hardware instr breakpoint */ 1404 if (xmon_is_ro) { 1405 printf(xmon_ro_msg); 1406 break; 1407 } 1408 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) { 1409 printf("Hardware instruction breakpoint " 1410 "not supported on this cpu\n"); 1411 break; 1412 } 1413 if (iabr) { 1414 iabr->enabled &= ~BP_CIABR; 1415 iabr = NULL; 1416 } 1417 if (!scanhex(&a)) 1418 break; 1419 if (!check_bp_loc(a)) 1420 break; 1421 bp = new_breakpoint(a); 1422 if (bp != NULL) { 1423 bp->enabled |= BP_CIABR; 1424 iabr = bp; 1425 force_enable_xmon(); 1426 } 1427 break; 1428 #endif 1429 1430 case 'c': 1431 if (!scanhex(&a)) { 1432 /* clear all breakpoints */ 1433 for (i = 0; i < NBPTS; ++i) 1434 bpts[i].enabled = 0; 1435 iabr = NULL; 1436 dabr.enabled = 0; 1437 printf("All breakpoints cleared\n"); 1438 break; 1439 } 1440 1441 if (a <= NBPTS && a >= 1) { 1442 /* assume a breakpoint number */ 1443 bp = &bpts[a-1]; /* bp nums are 1 based */ 1444 } else { 1445 /* assume a breakpoint address */ 1446 bp = at_breakpoint(a); 1447 if (bp == NULL) { 1448 printf("No breakpoint at %lx\n", a); 1449 break; 1450 } 1451 } 1452 1453 printf("Cleared breakpoint %tx (", BP_NUM(bp)); 1454 xmon_print_symbol(bp->address, " ", ")\n"); 1455 bp->enabled = 0; 1456 break; 1457 1458 default: 1459 termch = cmd; 1460 cmd = skipbl(); 1461 if (cmd == '?') { 1462 printf(breakpoint_help_string); 1463 break; 1464 } 1465 termch = cmd; 1466 1467 if (xmon_is_ro || !scanhex(&a)) { 1468 /* print all breakpoints */ 1469 printf(" type address\n"); 1470 if (dabr.enabled) { 1471 printf(" data "REG" [", dabr.address); 1472 if (dabr.enabled & 1) 1473 printf("r"); 1474 if (dabr.enabled & 2) 1475 printf("w"); 1476 printf("]\n"); 1477 } 1478 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 1479 if (!bp->enabled) 1480 continue; 1481 printf("%tx %s ", BP_NUM(bp), 1482 (bp->enabled & BP_CIABR) ? "inst": "trap"); 1483 xmon_print_symbol(bp->address, " ", "\n"); 1484 } 1485 break; 1486 } 1487 1488 if (!check_bp_loc(a)) 1489 break; 1490 bp = new_breakpoint(a); 1491 if (bp != NULL) { 1492 bp->enabled |= BP_TRAP; 1493 force_enable_xmon(); 1494 } 1495 break; 1496 } 1497 } 1498 1499 /* Very cheap human name for vector lookup. */ 1500 static 1501 const char *getvecname(unsigned long vec) 1502 { 1503 char *ret; 1504 1505 switch (vec) { 1506 case 0x100: ret = "(System Reset)"; break; 1507 case 0x200: ret = "(Machine Check)"; break; 1508 case 0x300: ret = "(Data Access)"; break; 1509 case 0x380: 1510 if (radix_enabled()) 1511 ret = "(Data Access Out of Range)"; 1512 else 1513 ret = "(Data SLB Access)"; 1514 break; 1515 case 0x400: ret = "(Instruction Access)"; break; 1516 case 0x480: 1517 if (radix_enabled()) 1518 ret = "(Instruction Access Out of Range)"; 1519 else 1520 ret = "(Instruction SLB Access)"; 1521 break; 1522 case 0x500: ret = "(Hardware Interrupt)"; break; 1523 case 0x600: ret = "(Alignment)"; break; 1524 case 0x700: ret = "(Program Check)"; break; 1525 case 0x800: ret = "(FPU Unavailable)"; break; 1526 case 0x900: ret = "(Decrementer)"; break; 1527 case 0x980: ret = "(Hypervisor Decrementer)"; break; 1528 case 0xa00: ret = "(Doorbell)"; break; 1529 case 0xc00: ret = "(System Call)"; break; 1530 case 0xd00: ret = "(Single Step)"; break; 1531 case 0xe40: ret = "(Emulation Assist)"; break; 1532 case 0xe60: ret = "(HMI)"; break; 1533 case 0xe80: ret = "(Hypervisor Doorbell)"; break; 1534 case 0xf00: ret = "(Performance Monitor)"; break; 1535 case 0xf20: ret = "(Altivec Unavailable)"; break; 1536 case 0x1300: ret = "(Instruction Breakpoint)"; break; 1537 case 0x1500: ret = "(Denormalisation)"; break; 1538 case 0x1700: ret = "(Altivec Assist)"; break; 1539 default: ret = ""; 1540 } 1541 return ret; 1542 } 1543 1544 static void get_function_bounds(unsigned long pc, unsigned long *startp, 1545 unsigned long *endp) 1546 { 1547 unsigned long size, offset; 1548 const char *name; 1549 1550 *startp = *endp = 0; 1551 if (pc == 0) 1552 return; 1553 if (setjmp(bus_error_jmp) == 0) { 1554 catch_memory_errors = 1; 1555 sync(); 1556 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr); 1557 if (name != NULL) { 1558 *startp = pc - offset; 1559 *endp = pc - offset + size; 1560 } 1561 sync(); 1562 } 1563 catch_memory_errors = 0; 1564 } 1565 1566 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long)) 1567 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long)) 1568 1569 static void xmon_show_stack(unsigned long sp, unsigned long lr, 1570 unsigned long pc) 1571 { 1572 int max_to_print = 64; 1573 unsigned long ip; 1574 unsigned long newsp; 1575 unsigned long marker; 1576 struct pt_regs regs; 1577 1578 while (max_to_print--) { 1579 if (!is_kernel_addr(sp)) { 1580 if (sp != 0) 1581 printf("SP (%lx) is in userspace\n", sp); 1582 break; 1583 } 1584 1585 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long)) 1586 || !mread(sp, &newsp, sizeof(unsigned long))) { 1587 printf("Couldn't read stack frame at %lx\n", sp); 1588 break; 1589 } 1590 1591 /* 1592 * For the first stack frame, try to work out if 1593 * LR and/or the saved LR value in the bottommost 1594 * stack frame are valid. 1595 */ 1596 if ((pc | lr) != 0) { 1597 unsigned long fnstart, fnend; 1598 unsigned long nextip; 1599 int printip = 1; 1600 1601 get_function_bounds(pc, &fnstart, &fnend); 1602 nextip = 0; 1603 if (newsp > sp) 1604 mread(newsp + LRSAVE_OFFSET, &nextip, 1605 sizeof(unsigned long)); 1606 if (lr == ip) { 1607 if (!is_kernel_addr(lr) 1608 || (fnstart <= lr && lr < fnend)) 1609 printip = 0; 1610 } else if (lr == nextip) { 1611 printip = 0; 1612 } else if (is_kernel_addr(lr) 1613 && !(fnstart <= lr && lr < fnend)) { 1614 printf("[link register ] "); 1615 xmon_print_symbol(lr, " ", "\n"); 1616 } 1617 if (printip) { 1618 printf("["REG"] ", sp); 1619 xmon_print_symbol(ip, " ", " (unreliable)\n"); 1620 } 1621 pc = lr = 0; 1622 1623 } else { 1624 printf("["REG"] ", sp); 1625 xmon_print_symbol(ip, " ", "\n"); 1626 } 1627 1628 /* Look for "regshere" marker to see if this is 1629 an exception frame. */ 1630 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long)) 1631 && marker == STACK_FRAME_REGS_MARKER) { 1632 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs)) 1633 != sizeof(regs)) { 1634 printf("Couldn't read registers at %lx\n", 1635 sp + STACK_FRAME_OVERHEAD); 1636 break; 1637 } 1638 printf("--- Exception: %lx %s at ", regs.trap, 1639 getvecname(TRAP(®s))); 1640 pc = regs.nip; 1641 lr = regs.link; 1642 xmon_print_symbol(pc, " ", "\n"); 1643 } 1644 1645 if (newsp == 0) 1646 break; 1647 1648 sp = newsp; 1649 } 1650 } 1651 1652 static void backtrace(struct pt_regs *excp) 1653 { 1654 unsigned long sp; 1655 1656 if (scanhex(&sp)) 1657 xmon_show_stack(sp, 0, 0); 1658 else 1659 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1660 scannl(); 1661 } 1662 1663 static void print_bug_trap(struct pt_regs *regs) 1664 { 1665 #ifdef CONFIG_BUG 1666 const struct bug_entry *bug; 1667 unsigned long addr; 1668 1669 if (regs->msr & MSR_PR) 1670 return; /* not in kernel */ 1671 addr = regs->nip; /* address of trap instruction */ 1672 if (!is_kernel_addr(addr)) 1673 return; 1674 bug = find_bug(regs->nip); 1675 if (bug == NULL) 1676 return; 1677 if (is_warning_bug(bug)) 1678 return; 1679 1680 #ifdef CONFIG_DEBUG_BUGVERBOSE 1681 printf("kernel BUG at %s:%u!\n", 1682 bug->file, bug->line); 1683 #else 1684 printf("kernel BUG at %px!\n", (void *)bug->bug_addr); 1685 #endif 1686 #endif /* CONFIG_BUG */ 1687 } 1688 1689 static void excprint(struct pt_regs *fp) 1690 { 1691 unsigned long trap; 1692 1693 #ifdef CONFIG_SMP 1694 printf("cpu 0x%x: ", smp_processor_id()); 1695 #endif /* CONFIG_SMP */ 1696 1697 trap = TRAP(fp); 1698 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp); 1699 printf(" pc: "); 1700 xmon_print_symbol(fp->nip, ": ", "\n"); 1701 1702 printf(" lr: "); 1703 xmon_print_symbol(fp->link, ": ", "\n"); 1704 1705 printf(" sp: %lx\n", fp->gpr[1]); 1706 printf(" msr: %lx\n", fp->msr); 1707 1708 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) { 1709 printf(" dar: %lx\n", fp->dar); 1710 if (trap != 0x380) 1711 printf(" dsisr: %lx\n", fp->dsisr); 1712 } 1713 1714 printf(" current = 0x%px\n", current); 1715 #ifdef CONFIG_PPC64 1716 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n", 1717 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened); 1718 #endif 1719 if (current) { 1720 printf(" pid = %d, comm = %s\n", 1721 current->pid, current->comm); 1722 } 1723 1724 if (trap == 0x700) 1725 print_bug_trap(fp); 1726 1727 printf(linux_banner); 1728 } 1729 1730 static void prregs(struct pt_regs *fp) 1731 { 1732 int n, trap; 1733 unsigned long base; 1734 struct pt_regs regs; 1735 1736 if (scanhex(&base)) { 1737 if (setjmp(bus_error_jmp) == 0) { 1738 catch_memory_errors = 1; 1739 sync(); 1740 regs = *(struct pt_regs *)base; 1741 sync(); 1742 __delay(200); 1743 } else { 1744 catch_memory_errors = 0; 1745 printf("*** Error reading registers from "REG"\n", 1746 base); 1747 return; 1748 } 1749 catch_memory_errors = 0; 1750 fp = ®s; 1751 } 1752 1753 #ifdef CONFIG_PPC64 1754 if (FULL_REGS(fp)) { 1755 for (n = 0; n < 16; ++n) 1756 printf("R%.2d = "REG" R%.2d = "REG"\n", 1757 n, fp->gpr[n], n+16, fp->gpr[n+16]); 1758 } else { 1759 for (n = 0; n < 7; ++n) 1760 printf("R%.2d = "REG" R%.2d = "REG"\n", 1761 n, fp->gpr[n], n+7, fp->gpr[n+7]); 1762 } 1763 #else 1764 for (n = 0; n < 32; ++n) { 1765 printf("R%.2d = %.8lx%s", n, fp->gpr[n], 1766 (n & 3) == 3? "\n": " "); 1767 if (n == 12 && !FULL_REGS(fp)) { 1768 printf("\n"); 1769 break; 1770 } 1771 } 1772 #endif 1773 printf("pc = "); 1774 xmon_print_symbol(fp->nip, " ", "\n"); 1775 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) { 1776 printf("cfar= "); 1777 xmon_print_symbol(fp->orig_gpr3, " ", "\n"); 1778 } 1779 printf("lr = "); 1780 xmon_print_symbol(fp->link, " ", "\n"); 1781 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr); 1782 printf("ctr = "REG" xer = "REG" trap = %4lx\n", 1783 fp->ctr, fp->xer, fp->trap); 1784 trap = TRAP(fp); 1785 if (trap == 0x300 || trap == 0x380 || trap == 0x600) 1786 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); 1787 } 1788 1789 static void cacheflush(void) 1790 { 1791 int cmd; 1792 unsigned long nflush; 1793 1794 cmd = inchar(); 1795 if (cmd != 'i') 1796 termch = cmd; 1797 scanhex((void *)&adrs); 1798 if (termch != '\n') 1799 termch = 0; 1800 nflush = 1; 1801 scanhex(&nflush); 1802 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES; 1803 if (setjmp(bus_error_jmp) == 0) { 1804 catch_memory_errors = 1; 1805 sync(); 1806 1807 if (cmd != 'i') { 1808 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1809 cflush((void *) adrs); 1810 } else { 1811 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1812 cinval((void *) adrs); 1813 } 1814 sync(); 1815 /* wait a little while to see if we get a machine check */ 1816 __delay(200); 1817 } 1818 catch_memory_errors = 0; 1819 } 1820 1821 extern unsigned long xmon_mfspr(int spr, unsigned long default_value); 1822 extern void xmon_mtspr(int spr, unsigned long value); 1823 1824 static int 1825 read_spr(int n, unsigned long *vp) 1826 { 1827 unsigned long ret = -1UL; 1828 int ok = 0; 1829 1830 if (setjmp(bus_error_jmp) == 0) { 1831 catch_spr_faults = 1; 1832 sync(); 1833 1834 ret = xmon_mfspr(n, *vp); 1835 1836 sync(); 1837 *vp = ret; 1838 ok = 1; 1839 } 1840 catch_spr_faults = 0; 1841 1842 return ok; 1843 } 1844 1845 static void 1846 write_spr(int n, unsigned long val) 1847 { 1848 if (xmon_is_ro) { 1849 printf(xmon_ro_msg); 1850 return; 1851 } 1852 1853 if (setjmp(bus_error_jmp) == 0) { 1854 catch_spr_faults = 1; 1855 sync(); 1856 1857 xmon_mtspr(n, val); 1858 1859 sync(); 1860 } else { 1861 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n); 1862 } 1863 catch_spr_faults = 0; 1864 } 1865 1866 static void dump_206_sprs(void) 1867 { 1868 #ifdef CONFIG_PPC64 1869 if (!cpu_has_feature(CPU_FTR_ARCH_206)) 1870 return; 1871 1872 /* Actually some of these pre-date 2.06, but whatevs */ 1873 1874 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n", 1875 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR)); 1876 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n", 1877 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR)); 1878 printf("amr = %.16lx uamor = %.16lx\n", 1879 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR)); 1880 1881 if (!(mfmsr() & MSR_HV)) 1882 return; 1883 1884 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n", 1885 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR)); 1886 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n", 1887 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC)); 1888 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n", 1889 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID)); 1890 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n", 1891 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR)); 1892 printf("dabr = %.16lx dabrx = %.16lx\n", 1893 mfspr(SPRN_DABR), mfspr(SPRN_DABRX)); 1894 #endif 1895 } 1896 1897 static void dump_207_sprs(void) 1898 { 1899 #ifdef CONFIG_PPC64 1900 unsigned long msr; 1901 1902 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1903 return; 1904 1905 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n", 1906 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR)); 1907 1908 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n", 1909 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB)); 1910 1911 msr = mfmsr(); 1912 if (msr & MSR_TM) { 1913 /* Only if TM has been enabled in the kernel */ 1914 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n", 1915 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR), 1916 mfspr(SPRN_TEXASR)); 1917 } 1918 1919 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n", 1920 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2)); 1921 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n", 1922 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), 1923 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4)); 1924 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n", 1925 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5)); 1926 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n", 1927 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6)); 1928 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n", 1929 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR)); 1930 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR)); 1931 1932 if (!(msr & MSR_HV)) 1933 return; 1934 1935 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n", 1936 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR)); 1937 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n", 1938 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR)); 1939 #endif 1940 } 1941 1942 static void dump_300_sprs(void) 1943 { 1944 #ifdef CONFIG_PPC64 1945 bool hv = mfmsr() & MSR_HV; 1946 1947 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 1948 return; 1949 1950 printf("pidr = %.16lx tidr = %.16lx\n", 1951 mfspr(SPRN_PID), mfspr(SPRN_TIDR)); 1952 printf("asdr = %.16lx psscr = %.16lx\n", 1953 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR) 1954 : mfspr(SPRN_PSSCR_PR)); 1955 1956 if (!hv) 1957 return; 1958 1959 printf("ptcr = %.16lx\n", 1960 mfspr(SPRN_PTCR)); 1961 #endif 1962 } 1963 1964 static void dump_one_spr(int spr, bool show_unimplemented) 1965 { 1966 unsigned long val; 1967 1968 val = 0xdeadbeef; 1969 if (!read_spr(spr, &val)) { 1970 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 1971 return; 1972 } 1973 1974 if (val == 0xdeadbeef) { 1975 /* Looks like read was a nop, confirm */ 1976 val = 0x0badcafe; 1977 if (!read_spr(spr, &val)) { 1978 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 1979 return; 1980 } 1981 1982 if (val == 0x0badcafe) { 1983 if (show_unimplemented) 1984 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr); 1985 return; 1986 } 1987 } 1988 1989 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val); 1990 } 1991 1992 static void super_regs(void) 1993 { 1994 static unsigned long regno; 1995 int cmd; 1996 int spr; 1997 1998 cmd = skipbl(); 1999 2000 switch (cmd) { 2001 case '\n': { 2002 unsigned long sp, toc; 2003 asm("mr %0,1" : "=r" (sp) :); 2004 asm("mr %0,2" : "=r" (toc) :); 2005 2006 printf("msr = "REG" sprg0 = "REG"\n", 2007 mfmsr(), mfspr(SPRN_SPRG0)); 2008 printf("pvr = "REG" sprg1 = "REG"\n", 2009 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); 2010 printf("dec = "REG" sprg2 = "REG"\n", 2011 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); 2012 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3)); 2013 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR)); 2014 2015 dump_206_sprs(); 2016 dump_207_sprs(); 2017 dump_300_sprs(); 2018 2019 return; 2020 } 2021 case 'w': { 2022 unsigned long val; 2023 scanhex(®no); 2024 val = 0; 2025 read_spr(regno, &val); 2026 scanhex(&val); 2027 write_spr(regno, val); 2028 dump_one_spr(regno, true); 2029 break; 2030 } 2031 case 'r': 2032 scanhex(®no); 2033 dump_one_spr(regno, true); 2034 break; 2035 case 'a': 2036 /* dump ALL SPRs */ 2037 for (spr = 1; spr < 1024; ++spr) 2038 dump_one_spr(spr, false); 2039 break; 2040 } 2041 2042 scannl(); 2043 } 2044 2045 /* 2046 * Stuff for reading and writing memory safely 2047 */ 2048 static int 2049 mread(unsigned long adrs, void *buf, int size) 2050 { 2051 volatile int n; 2052 char *p, *q; 2053 2054 n = 0; 2055 if (setjmp(bus_error_jmp) == 0) { 2056 catch_memory_errors = 1; 2057 sync(); 2058 p = (char *)adrs; 2059 q = (char *)buf; 2060 switch (size) { 2061 case 2: 2062 *(u16 *)q = *(u16 *)p; 2063 break; 2064 case 4: 2065 *(u32 *)q = *(u32 *)p; 2066 break; 2067 case 8: 2068 *(u64 *)q = *(u64 *)p; 2069 break; 2070 default: 2071 for( ; n < size; ++n) { 2072 *q++ = *p++; 2073 sync(); 2074 } 2075 } 2076 sync(); 2077 /* wait a little while to see if we get a machine check */ 2078 __delay(200); 2079 n = size; 2080 } 2081 catch_memory_errors = 0; 2082 return n; 2083 } 2084 2085 static int 2086 mwrite(unsigned long adrs, void *buf, int size) 2087 { 2088 volatile int n; 2089 char *p, *q; 2090 2091 n = 0; 2092 2093 if (xmon_is_ro) { 2094 printf(xmon_ro_msg); 2095 return n; 2096 } 2097 2098 if (setjmp(bus_error_jmp) == 0) { 2099 catch_memory_errors = 1; 2100 sync(); 2101 p = (char *) adrs; 2102 q = (char *) buf; 2103 switch (size) { 2104 case 2: 2105 *(u16 *)p = *(u16 *)q; 2106 break; 2107 case 4: 2108 *(u32 *)p = *(u32 *)q; 2109 break; 2110 case 8: 2111 *(u64 *)p = *(u64 *)q; 2112 break; 2113 default: 2114 for ( ; n < size; ++n) { 2115 *p++ = *q++; 2116 sync(); 2117 } 2118 } 2119 sync(); 2120 /* wait a little while to see if we get a machine check */ 2121 __delay(200); 2122 n = size; 2123 } else { 2124 printf("*** Error writing address "REG"\n", adrs + n); 2125 } 2126 catch_memory_errors = 0; 2127 return n; 2128 } 2129 2130 static int fault_type; 2131 static int fault_except; 2132 static char *fault_chars[] = { "--", "**", "##" }; 2133 2134 static int handle_fault(struct pt_regs *regs) 2135 { 2136 fault_except = TRAP(regs); 2137 switch (TRAP(regs)) { 2138 case 0x200: 2139 fault_type = 0; 2140 break; 2141 case 0x300: 2142 case 0x380: 2143 fault_type = 1; 2144 break; 2145 default: 2146 fault_type = 2; 2147 } 2148 2149 longjmp(bus_error_jmp, 1); 2150 2151 return 0; 2152 } 2153 2154 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) 2155 2156 static void 2157 byterev(unsigned char *val, int size) 2158 { 2159 int t; 2160 2161 switch (size) { 2162 case 2: 2163 SWAP(val[0], val[1], t); 2164 break; 2165 case 4: 2166 SWAP(val[0], val[3], t); 2167 SWAP(val[1], val[2], t); 2168 break; 2169 case 8: /* is there really any use for this? */ 2170 SWAP(val[0], val[7], t); 2171 SWAP(val[1], val[6], t); 2172 SWAP(val[2], val[5], t); 2173 SWAP(val[3], val[4], t); 2174 break; 2175 } 2176 } 2177 2178 static int brev; 2179 static int mnoread; 2180 2181 static char *memex_help_string = 2182 "Memory examine command usage:\n" 2183 "m [addr] [flags] examine/change memory\n" 2184 " addr is optional. will start where left off.\n" 2185 " flags may include chars from this set:\n" 2186 " b modify by bytes (default)\n" 2187 " w modify by words (2 byte)\n" 2188 " l modify by longs (4 byte)\n" 2189 " d modify by doubleword (8 byte)\n" 2190 " r toggle reverse byte order mode\n" 2191 " n do not read memory (for i/o spaces)\n" 2192 " . ok to read (default)\n" 2193 "NOTE: flags are saved as defaults\n" 2194 ""; 2195 2196 static char *memex_subcmd_help_string = 2197 "Memory examine subcommands:\n" 2198 " hexval write this val to current location\n" 2199 " 'string' write chars from string to this location\n" 2200 " ' increment address\n" 2201 " ^ decrement address\n" 2202 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n" 2203 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n" 2204 " ` clear no-read flag\n" 2205 " ; stay at this addr\n" 2206 " v change to byte mode\n" 2207 " w change to word (2 byte) mode\n" 2208 " l change to long (4 byte) mode\n" 2209 " u change to doubleword (8 byte) mode\n" 2210 " m addr change current addr\n" 2211 " n toggle no-read flag\n" 2212 " r toggle byte reverse flag\n" 2213 " < count back up count bytes\n" 2214 " > count skip forward count bytes\n" 2215 " x exit this mode\n" 2216 ""; 2217 2218 static void 2219 memex(void) 2220 { 2221 int cmd, inc, i, nslash; 2222 unsigned long n; 2223 unsigned char val[16]; 2224 2225 scanhex((void *)&adrs); 2226 cmd = skipbl(); 2227 if (cmd == '?') { 2228 printf(memex_help_string); 2229 return; 2230 } else { 2231 termch = cmd; 2232 } 2233 last_cmd = "m\n"; 2234 while ((cmd = skipbl()) != '\n') { 2235 switch( cmd ){ 2236 case 'b': size = 1; break; 2237 case 'w': size = 2; break; 2238 case 'l': size = 4; break; 2239 case 'd': size = 8; break; 2240 case 'r': brev = !brev; break; 2241 case 'n': mnoread = 1; break; 2242 case '.': mnoread = 0; break; 2243 } 2244 } 2245 if( size <= 0 ) 2246 size = 1; 2247 else if( size > 8 ) 2248 size = 8; 2249 for(;;){ 2250 if (!mnoread) 2251 n = mread(adrs, val, size); 2252 printf(REG"%c", adrs, brev? 'r': ' '); 2253 if (!mnoread) { 2254 if (brev) 2255 byterev(val, size); 2256 putchar(' '); 2257 for (i = 0; i < n; ++i) 2258 printf("%.2x", val[i]); 2259 for (; i < size; ++i) 2260 printf("%s", fault_chars[fault_type]); 2261 } 2262 putchar(' '); 2263 inc = size; 2264 nslash = 0; 2265 for(;;){ 2266 if( scanhex(&n) ){ 2267 for (i = 0; i < size; ++i) 2268 val[i] = n >> (i * 8); 2269 if (!brev) 2270 byterev(val, size); 2271 mwrite(adrs, val, size); 2272 inc = size; 2273 } 2274 cmd = skipbl(); 2275 if (cmd == '\n') 2276 break; 2277 inc = 0; 2278 switch (cmd) { 2279 case '\'': 2280 for(;;){ 2281 n = inchar(); 2282 if( n == '\\' ) 2283 n = bsesc(); 2284 else if( n == '\'' ) 2285 break; 2286 for (i = 0; i < size; ++i) 2287 val[i] = n >> (i * 8); 2288 if (!brev) 2289 byterev(val, size); 2290 mwrite(adrs, val, size); 2291 adrs += size; 2292 } 2293 adrs -= size; 2294 inc = size; 2295 break; 2296 case ',': 2297 adrs += size; 2298 break; 2299 case '.': 2300 mnoread = 0; 2301 break; 2302 case ';': 2303 break; 2304 case 'x': 2305 case EOF: 2306 scannl(); 2307 return; 2308 case 'b': 2309 case 'v': 2310 size = 1; 2311 break; 2312 case 'w': 2313 size = 2; 2314 break; 2315 case 'l': 2316 size = 4; 2317 break; 2318 case 'u': 2319 size = 8; 2320 break; 2321 case '^': 2322 adrs -= size; 2323 break; 2324 case '/': 2325 if (nslash > 0) 2326 adrs -= 1 << nslash; 2327 else 2328 nslash = 0; 2329 nslash += 4; 2330 adrs += 1 << nslash; 2331 break; 2332 case '\\': 2333 if (nslash < 0) 2334 adrs += 1 << -nslash; 2335 else 2336 nslash = 0; 2337 nslash -= 4; 2338 adrs -= 1 << -nslash; 2339 break; 2340 case 'm': 2341 scanhex((void *)&adrs); 2342 break; 2343 case 'n': 2344 mnoread = 1; 2345 break; 2346 case 'r': 2347 brev = !brev; 2348 break; 2349 case '<': 2350 n = size; 2351 scanhex(&n); 2352 adrs -= n; 2353 break; 2354 case '>': 2355 n = size; 2356 scanhex(&n); 2357 adrs += n; 2358 break; 2359 case '?': 2360 printf(memex_subcmd_help_string); 2361 break; 2362 } 2363 } 2364 adrs += inc; 2365 } 2366 } 2367 2368 static int 2369 bsesc(void) 2370 { 2371 int c; 2372 2373 c = inchar(); 2374 switch( c ){ 2375 case 'n': c = '\n'; break; 2376 case 'r': c = '\r'; break; 2377 case 'b': c = '\b'; break; 2378 case 't': c = '\t'; break; 2379 } 2380 return c; 2381 } 2382 2383 static void xmon_rawdump (unsigned long adrs, long ndump) 2384 { 2385 long n, m, r, nr; 2386 unsigned char temp[16]; 2387 2388 for (n = ndump; n > 0;) { 2389 r = n < 16? n: 16; 2390 nr = mread(adrs, temp, r); 2391 adrs += nr; 2392 for (m = 0; m < r; ++m) { 2393 if (m < nr) 2394 printf("%.2x", temp[m]); 2395 else 2396 printf("%s", fault_chars[fault_type]); 2397 } 2398 n -= r; 2399 if (nr < r) 2400 break; 2401 } 2402 printf("\n"); 2403 } 2404 2405 static void dump_tracing(void) 2406 { 2407 int c; 2408 2409 c = inchar(); 2410 if (c == 'c') 2411 ftrace_dump(DUMP_ORIG); 2412 else 2413 ftrace_dump(DUMP_ALL); 2414 } 2415 2416 #ifdef CONFIG_PPC64 2417 static void dump_one_paca(int cpu) 2418 { 2419 struct paca_struct *p; 2420 #ifdef CONFIG_PPC_BOOK3S_64 2421 int i = 0; 2422 #endif 2423 2424 if (setjmp(bus_error_jmp) != 0) { 2425 printf("*** Error dumping paca for cpu 0x%x!\n", cpu); 2426 return; 2427 } 2428 2429 catch_memory_errors = 1; 2430 sync(); 2431 2432 p = paca_ptrs[cpu]; 2433 2434 printf("paca for cpu 0x%x @ %px:\n", cpu, p); 2435 2436 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no"); 2437 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no"); 2438 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no"); 2439 2440 #define DUMP(paca, name, format) \ 2441 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \ 2442 offsetof(struct paca_struct, name)); 2443 2444 DUMP(p, lock_token, "%#-*x"); 2445 DUMP(p, paca_index, "%#-*x"); 2446 DUMP(p, kernel_toc, "%#-*llx"); 2447 DUMP(p, kernelbase, "%#-*llx"); 2448 DUMP(p, kernel_msr, "%#-*llx"); 2449 DUMP(p, emergency_sp, "%-*px"); 2450 #ifdef CONFIG_PPC_BOOK3S_64 2451 DUMP(p, nmi_emergency_sp, "%-*px"); 2452 DUMP(p, mc_emergency_sp, "%-*px"); 2453 DUMP(p, in_nmi, "%#-*x"); 2454 DUMP(p, in_mce, "%#-*x"); 2455 DUMP(p, hmi_event_available, "%#-*x"); 2456 #endif 2457 DUMP(p, data_offset, "%#-*llx"); 2458 DUMP(p, hw_cpu_id, "%#-*x"); 2459 DUMP(p, cpu_start, "%#-*x"); 2460 DUMP(p, kexec_state, "%#-*x"); 2461 #ifdef CONFIG_PPC_BOOK3S_64 2462 if (!early_radix_enabled()) { 2463 for (i = 0; i < SLB_NUM_BOLTED; i++) { 2464 u64 esid, vsid; 2465 2466 if (!p->slb_shadow_ptr) 2467 continue; 2468 2469 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid); 2470 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid); 2471 2472 if (esid || vsid) { 2473 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n", 2474 22, "slb_shadow", i, esid, vsid); 2475 } 2476 } 2477 DUMP(p, vmalloc_sllp, "%#-*x"); 2478 DUMP(p, stab_rr, "%#-*x"); 2479 DUMP(p, slb_used_bitmap, "%#-*x"); 2480 DUMP(p, slb_kern_bitmap, "%#-*x"); 2481 2482 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2483 DUMP(p, slb_cache_ptr, "%#-*x"); 2484 for (i = 0; i < SLB_CACHE_ENTRIES; i++) 2485 printf(" %-*s[%d] = 0x%016x\n", 2486 22, "slb_cache", i, p->slb_cache[i]); 2487 } 2488 } 2489 2490 DUMP(p, rfi_flush_fallback_area, "%-*px"); 2491 #endif 2492 DUMP(p, dscr_default, "%#-*llx"); 2493 #ifdef CONFIG_PPC_BOOK3E 2494 DUMP(p, pgd, "%-*px"); 2495 DUMP(p, kernel_pgd, "%-*px"); 2496 DUMP(p, tcd_ptr, "%-*px"); 2497 DUMP(p, mc_kstack, "%-*px"); 2498 DUMP(p, crit_kstack, "%-*px"); 2499 DUMP(p, dbg_kstack, "%-*px"); 2500 #endif 2501 DUMP(p, __current, "%-*px"); 2502 DUMP(p, kstack, "%#-*llx"); 2503 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1)); 2504 #ifdef CONFIG_STACKPROTECTOR 2505 DUMP(p, canary, "%#-*lx"); 2506 #endif 2507 DUMP(p, saved_r1, "%#-*llx"); 2508 #ifdef CONFIG_PPC_BOOK3E 2509 DUMP(p, trap_save, "%#-*x"); 2510 #endif 2511 DUMP(p, irq_soft_mask, "%#-*x"); 2512 DUMP(p, irq_happened, "%#-*x"); 2513 #ifdef CONFIG_MMIOWB 2514 DUMP(p, mmiowb_state.nesting_count, "%#-*x"); 2515 DUMP(p, mmiowb_state.mmiowb_pending, "%#-*x"); 2516 #endif 2517 DUMP(p, irq_work_pending, "%#-*x"); 2518 DUMP(p, sprg_vdso, "%#-*llx"); 2519 2520 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2521 DUMP(p, tm_scratch, "%#-*llx"); 2522 #endif 2523 2524 #ifdef CONFIG_PPC_POWERNV 2525 DUMP(p, idle_state, "%#-*lx"); 2526 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2527 DUMP(p, thread_idle_state, "%#-*x"); 2528 DUMP(p, subcore_sibling_mask, "%#-*x"); 2529 } else { 2530 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 2531 DUMP(p, requested_psscr, "%#-*llx"); 2532 DUMP(p, dont_stop.counter, "%#-*x"); 2533 #endif 2534 } 2535 #endif 2536 2537 DUMP(p, accounting.utime, "%#-*lx"); 2538 DUMP(p, accounting.stime, "%#-*lx"); 2539 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2540 DUMP(p, accounting.utime_scaled, "%#-*lx"); 2541 #endif 2542 DUMP(p, accounting.starttime, "%#-*lx"); 2543 DUMP(p, accounting.starttime_user, "%#-*lx"); 2544 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2545 DUMP(p, accounting.startspurr, "%#-*lx"); 2546 DUMP(p, accounting.utime_sspurr, "%#-*lx"); 2547 #endif 2548 DUMP(p, accounting.steal_time, "%#-*lx"); 2549 #undef DUMP 2550 2551 catch_memory_errors = 0; 2552 sync(); 2553 } 2554 2555 static void dump_all_pacas(void) 2556 { 2557 int cpu; 2558 2559 if (num_possible_cpus() == 0) { 2560 printf("No possible cpus, use 'dp #' to dump individual cpus\n"); 2561 return; 2562 } 2563 2564 for_each_possible_cpu(cpu) 2565 dump_one_paca(cpu); 2566 } 2567 2568 static void dump_pacas(void) 2569 { 2570 unsigned long num; 2571 int c; 2572 2573 c = inchar(); 2574 if (c == 'a') { 2575 dump_all_pacas(); 2576 return; 2577 } 2578 2579 termch = c; /* Put c back, it wasn't 'a' */ 2580 2581 if (scanhex(&num)) 2582 dump_one_paca(num); 2583 else 2584 dump_one_paca(xmon_owner); 2585 } 2586 #endif 2587 2588 #ifdef CONFIG_PPC_POWERNV 2589 static void dump_one_xive(int cpu) 2590 { 2591 unsigned int hwid = get_hard_smp_processor_id(cpu); 2592 bool hv = cpu_has_feature(CPU_FTR_HVMODE); 2593 2594 if (hv) { 2595 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid); 2596 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid); 2597 opal_xive_dump(XIVE_DUMP_TM_OS, hwid); 2598 opal_xive_dump(XIVE_DUMP_TM_USER, hwid); 2599 opal_xive_dump(XIVE_DUMP_VP, hwid); 2600 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid); 2601 } 2602 2603 if (setjmp(bus_error_jmp) != 0) { 2604 catch_memory_errors = 0; 2605 printf("*** Error dumping xive on cpu %d\n", cpu); 2606 return; 2607 } 2608 2609 catch_memory_errors = 1; 2610 sync(); 2611 xmon_xive_do_dump(cpu); 2612 sync(); 2613 __delay(200); 2614 catch_memory_errors = 0; 2615 } 2616 2617 static void dump_all_xives(void) 2618 { 2619 int cpu; 2620 2621 if (num_possible_cpus() == 0) { 2622 printf("No possible cpus, use 'dx #' to dump individual cpus\n"); 2623 return; 2624 } 2625 2626 for_each_possible_cpu(cpu) 2627 dump_one_xive(cpu); 2628 } 2629 2630 static void dump_one_xive_irq(u32 num, struct irq_data *d) 2631 { 2632 xmon_xive_get_irq_config(num, d); 2633 } 2634 2635 static void dump_all_xive_irq(void) 2636 { 2637 unsigned int i; 2638 struct irq_desc *desc; 2639 2640 for_each_irq_desc(i, desc) { 2641 struct irq_data *d = irq_desc_get_irq_data(desc); 2642 unsigned int hwirq; 2643 2644 if (!d) 2645 continue; 2646 2647 hwirq = (unsigned int)irqd_to_hwirq(d); 2648 /* IPIs are special (HW number 0) */ 2649 if (hwirq) 2650 dump_one_xive_irq(hwirq, d); 2651 } 2652 } 2653 2654 static void dump_xives(void) 2655 { 2656 unsigned long num; 2657 int c; 2658 2659 if (!xive_enabled()) { 2660 printf("Xive disabled on this system\n"); 2661 return; 2662 } 2663 2664 c = inchar(); 2665 if (c == 'a') { 2666 dump_all_xives(); 2667 return; 2668 } else if (c == 'i') { 2669 if (scanhex(&num)) 2670 dump_one_xive_irq(num, NULL); 2671 else 2672 dump_all_xive_irq(); 2673 return; 2674 } 2675 2676 termch = c; /* Put c back, it wasn't 'a' */ 2677 2678 if (scanhex(&num)) 2679 dump_one_xive(num); 2680 else 2681 dump_one_xive(xmon_owner); 2682 } 2683 #endif /* CONFIG_PPC_POWERNV */ 2684 2685 static void dump_by_size(unsigned long addr, long count, int size) 2686 { 2687 unsigned char temp[16]; 2688 int i, j; 2689 u64 val; 2690 2691 count = ALIGN(count, 16); 2692 2693 for (i = 0; i < count; i += 16, addr += 16) { 2694 printf(REG, addr); 2695 2696 if (mread(addr, temp, 16) != 16) { 2697 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr); 2698 return; 2699 } 2700 2701 for (j = 0; j < 16; j += size) { 2702 putchar(' '); 2703 switch (size) { 2704 case 1: val = temp[j]; break; 2705 case 2: val = *(u16 *)&temp[j]; break; 2706 case 4: val = *(u32 *)&temp[j]; break; 2707 case 8: val = *(u64 *)&temp[j]; break; 2708 default: val = 0; 2709 } 2710 2711 printf("%0*llx", size * 2, val); 2712 } 2713 printf("\n"); 2714 } 2715 } 2716 2717 static void 2718 dump(void) 2719 { 2720 static char last[] = { "d?\n" }; 2721 int c; 2722 2723 c = inchar(); 2724 2725 #ifdef CONFIG_PPC64 2726 if (c == 'p') { 2727 xmon_start_pagination(); 2728 dump_pacas(); 2729 xmon_end_pagination(); 2730 return; 2731 } 2732 #endif 2733 #ifdef CONFIG_PPC_POWERNV 2734 if (c == 'x') { 2735 xmon_start_pagination(); 2736 dump_xives(); 2737 xmon_end_pagination(); 2738 return; 2739 } 2740 #endif 2741 2742 if (c == 't') { 2743 dump_tracing(); 2744 return; 2745 } 2746 2747 if (c == '\n') 2748 termch = c; 2749 2750 scanhex((void *)&adrs); 2751 if (termch != '\n') 2752 termch = 0; 2753 if (c == 'i') { 2754 scanhex(&nidump); 2755 if (nidump == 0) 2756 nidump = 16; 2757 else if (nidump > MAX_DUMP) 2758 nidump = MAX_DUMP; 2759 adrs += ppc_inst_dump(adrs, nidump, 1); 2760 last_cmd = "di\n"; 2761 } else if (c == 'l') { 2762 dump_log_buf(); 2763 } else if (c == 'o') { 2764 dump_opal_msglog(); 2765 } else if (c == 'v') { 2766 /* dump virtual to physical translation */ 2767 show_pte(adrs); 2768 } else if (c == 'r') { 2769 scanhex(&ndump); 2770 if (ndump == 0) 2771 ndump = 64; 2772 xmon_rawdump(adrs, ndump); 2773 adrs += ndump; 2774 last_cmd = "dr\n"; 2775 } else { 2776 scanhex(&ndump); 2777 if (ndump == 0) 2778 ndump = 64; 2779 else if (ndump > MAX_DUMP) 2780 ndump = MAX_DUMP; 2781 2782 switch (c) { 2783 case '8': 2784 case '4': 2785 case '2': 2786 case '1': 2787 ndump = ALIGN(ndump, 16); 2788 dump_by_size(adrs, ndump, c - '0'); 2789 last[1] = c; 2790 last_cmd = last; 2791 break; 2792 default: 2793 prdump(adrs, ndump); 2794 last_cmd = "d\n"; 2795 } 2796 2797 adrs += ndump; 2798 } 2799 } 2800 2801 static void 2802 prdump(unsigned long adrs, long ndump) 2803 { 2804 long n, m, c, r, nr; 2805 unsigned char temp[16]; 2806 2807 for (n = ndump; n > 0;) { 2808 printf(REG, adrs); 2809 putchar(' '); 2810 r = n < 16? n: 16; 2811 nr = mread(adrs, temp, r); 2812 adrs += nr; 2813 for (m = 0; m < r; ++m) { 2814 if ((m & (sizeof(long) - 1)) == 0 && m > 0) 2815 putchar(' '); 2816 if (m < nr) 2817 printf("%.2x", temp[m]); 2818 else 2819 printf("%s", fault_chars[fault_type]); 2820 } 2821 for (; m < 16; ++m) { 2822 if ((m & (sizeof(long) - 1)) == 0) 2823 putchar(' '); 2824 printf(" "); 2825 } 2826 printf(" |"); 2827 for (m = 0; m < r; ++m) { 2828 if (m < nr) { 2829 c = temp[m]; 2830 putchar(' ' <= c && c <= '~'? c: '.'); 2831 } else 2832 putchar(' '); 2833 } 2834 n -= r; 2835 for (; m < 16; ++m) 2836 putchar(' '); 2837 printf("|\n"); 2838 if (nr < r) 2839 break; 2840 } 2841 } 2842 2843 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); 2844 2845 static int 2846 generic_inst_dump(unsigned long adr, long count, int praddr, 2847 instruction_dump_func dump_func) 2848 { 2849 int nr, dotted; 2850 unsigned long first_adr; 2851 unsigned int inst, last_inst = 0; 2852 unsigned char val[4]; 2853 2854 dotted = 0; 2855 for (first_adr = adr; count > 0; --count, adr += 4) { 2856 nr = mread(adr, val, 4); 2857 if (nr == 0) { 2858 if (praddr) { 2859 const char *x = fault_chars[fault_type]; 2860 printf(REG" %s%s%s%s\n", adr, x, x, x, x); 2861 } 2862 break; 2863 } 2864 inst = GETWORD(val); 2865 if (adr > first_adr && inst == last_inst) { 2866 if (!dotted) { 2867 printf(" ...\n"); 2868 dotted = 1; 2869 } 2870 continue; 2871 } 2872 dotted = 0; 2873 last_inst = inst; 2874 if (praddr) 2875 printf(REG" %.8x", adr, inst); 2876 printf("\t"); 2877 dump_func(inst, adr); 2878 printf("\n"); 2879 } 2880 return adr - first_adr; 2881 } 2882 2883 static int 2884 ppc_inst_dump(unsigned long adr, long count, int praddr) 2885 { 2886 return generic_inst_dump(adr, count, praddr, print_insn_powerpc); 2887 } 2888 2889 void 2890 print_address(unsigned long addr) 2891 { 2892 xmon_print_symbol(addr, "\t# ", ""); 2893 } 2894 2895 static void 2896 dump_log_buf(void) 2897 { 2898 struct kmsg_dumper dumper = { .active = 1 }; 2899 unsigned char buf[128]; 2900 size_t len; 2901 2902 if (setjmp(bus_error_jmp) != 0) { 2903 printf("Error dumping printk buffer!\n"); 2904 return; 2905 } 2906 2907 catch_memory_errors = 1; 2908 sync(); 2909 2910 kmsg_dump_rewind_nolock(&dumper); 2911 xmon_start_pagination(); 2912 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) { 2913 buf[len] = '\0'; 2914 printf("%s", buf); 2915 } 2916 xmon_end_pagination(); 2917 2918 sync(); 2919 /* wait a little while to see if we get a machine check */ 2920 __delay(200); 2921 catch_memory_errors = 0; 2922 } 2923 2924 #ifdef CONFIG_PPC_POWERNV 2925 static void dump_opal_msglog(void) 2926 { 2927 unsigned char buf[128]; 2928 ssize_t res; 2929 loff_t pos = 0; 2930 2931 if (!firmware_has_feature(FW_FEATURE_OPAL)) { 2932 printf("Machine is not running OPAL firmware.\n"); 2933 return; 2934 } 2935 2936 if (setjmp(bus_error_jmp) != 0) { 2937 printf("Error dumping OPAL msglog!\n"); 2938 return; 2939 } 2940 2941 catch_memory_errors = 1; 2942 sync(); 2943 2944 xmon_start_pagination(); 2945 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) { 2946 if (res < 0) { 2947 printf("Error dumping OPAL msglog! Error: %zd\n", res); 2948 break; 2949 } 2950 buf[res] = '\0'; 2951 printf("%s", buf); 2952 pos += res; 2953 } 2954 xmon_end_pagination(); 2955 2956 sync(); 2957 /* wait a little while to see if we get a machine check */ 2958 __delay(200); 2959 catch_memory_errors = 0; 2960 } 2961 #endif 2962 2963 /* 2964 * Memory operations - move, set, print differences 2965 */ 2966 static unsigned long mdest; /* destination address */ 2967 static unsigned long msrc; /* source address */ 2968 static unsigned long mval; /* byte value to set memory to */ 2969 static unsigned long mcount; /* # bytes to affect */ 2970 static unsigned long mdiffs; /* max # differences to print */ 2971 2972 static void 2973 memops(int cmd) 2974 { 2975 scanhex((void *)&mdest); 2976 if( termch != '\n' ) 2977 termch = 0; 2978 scanhex((void *)(cmd == 's'? &mval: &msrc)); 2979 if( termch != '\n' ) 2980 termch = 0; 2981 scanhex((void *)&mcount); 2982 switch( cmd ){ 2983 case 'm': 2984 if (xmon_is_ro) { 2985 printf(xmon_ro_msg); 2986 break; 2987 } 2988 memmove((void *)mdest, (void *)msrc, mcount); 2989 break; 2990 case 's': 2991 if (xmon_is_ro) { 2992 printf(xmon_ro_msg); 2993 break; 2994 } 2995 memset((void *)mdest, mval, mcount); 2996 break; 2997 case 'd': 2998 if( termch != '\n' ) 2999 termch = 0; 3000 scanhex((void *)&mdiffs); 3001 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs); 3002 break; 3003 } 3004 } 3005 3006 static void 3007 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) 3008 { 3009 unsigned n, prt; 3010 3011 prt = 0; 3012 for( n = nb; n > 0; --n ) 3013 if( *p1++ != *p2++ ) 3014 if( ++prt <= maxpr ) 3015 printf("%px %.2x # %px %.2x\n", p1 - 1, 3016 p1[-1], p2 - 1, p2[-1]); 3017 if( prt > maxpr ) 3018 printf("Total of %d differences\n", prt); 3019 } 3020 3021 static unsigned mend; 3022 static unsigned mask; 3023 3024 static void 3025 memlocate(void) 3026 { 3027 unsigned a, n; 3028 unsigned char val[4]; 3029 3030 last_cmd = "ml"; 3031 scanhex((void *)&mdest); 3032 if (termch != '\n') { 3033 termch = 0; 3034 scanhex((void *)&mend); 3035 if (termch != '\n') { 3036 termch = 0; 3037 scanhex((void *)&mval); 3038 mask = ~0; 3039 if (termch != '\n') termch = 0; 3040 scanhex((void *)&mask); 3041 } 3042 } 3043 n = 0; 3044 for (a = mdest; a < mend; a += 4) { 3045 if (mread(a, val, 4) == 4 3046 && ((GETWORD(val) ^ mval) & mask) == 0) { 3047 printf("%.16x: %.16x\n", a, GETWORD(val)); 3048 if (++n >= 10) 3049 break; 3050 } 3051 } 3052 } 3053 3054 static unsigned long mskip = 0x1000; 3055 static unsigned long mlim = 0xffffffff; 3056 3057 static void 3058 memzcan(void) 3059 { 3060 unsigned char v; 3061 unsigned a; 3062 int ok, ook; 3063 3064 scanhex(&mdest); 3065 if (termch != '\n') termch = 0; 3066 scanhex(&mskip); 3067 if (termch != '\n') termch = 0; 3068 scanhex(&mlim); 3069 ook = 0; 3070 for (a = mdest; a < mlim; a += mskip) { 3071 ok = mread(a, &v, 1); 3072 if (ok && !ook) { 3073 printf("%.8x .. ", a); 3074 } else if (!ok && ook) 3075 printf("%.8lx\n", a - mskip); 3076 ook = ok; 3077 if (a + mskip < a) 3078 break; 3079 } 3080 if (ook) 3081 printf("%.8lx\n", a - mskip); 3082 } 3083 3084 static void show_task(struct task_struct *tsk) 3085 { 3086 char state; 3087 3088 /* 3089 * Cloned from kdb_task_state_char(), which is not entirely 3090 * appropriate for calling from xmon. This could be moved 3091 * to a common, generic, routine used by both. 3092 */ 3093 state = (tsk->state == 0) ? 'R' : 3094 (tsk->state < 0) ? 'U' : 3095 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' : 3096 (tsk->state & TASK_STOPPED) ? 'T' : 3097 (tsk->state & TASK_TRACED) ? 'C' : 3098 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' : 3099 (tsk->exit_state & EXIT_DEAD) ? 'E' : 3100 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?'; 3101 3102 printf("%px %016lx %6d %6d %c %2d %s\n", tsk, 3103 tsk->thread.ksp, 3104 tsk->pid, rcu_dereference(tsk->parent)->pid, 3105 state, task_cpu(tsk), 3106 tsk->comm); 3107 } 3108 3109 #ifdef CONFIG_PPC_BOOK3S_64 3110 static void format_pte(void *ptep, unsigned long pte) 3111 { 3112 pte_t entry = __pte(pte); 3113 3114 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte); 3115 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK); 3116 3117 printf("Flags = %s%s%s%s%s\n", 3118 pte_young(entry) ? "Accessed " : "", 3119 pte_dirty(entry) ? "Dirty " : "", 3120 pte_read(entry) ? "Read " : "", 3121 pte_write(entry) ? "Write " : "", 3122 pte_exec(entry) ? "Exec " : ""); 3123 } 3124 3125 static void show_pte(unsigned long addr) 3126 { 3127 unsigned long tskv = 0; 3128 struct task_struct *tsk = NULL; 3129 struct mm_struct *mm; 3130 pgd_t *pgdp, *pgdir; 3131 pud_t *pudp; 3132 pmd_t *pmdp; 3133 pte_t *ptep; 3134 3135 if (!scanhex(&tskv)) 3136 mm = &init_mm; 3137 else 3138 tsk = (struct task_struct *)tskv; 3139 3140 if (tsk == NULL) 3141 mm = &init_mm; 3142 else 3143 mm = tsk->active_mm; 3144 3145 if (setjmp(bus_error_jmp) != 0) { 3146 catch_memory_errors = 0; 3147 printf("*** Error dumping pte for task %px\n", tsk); 3148 return; 3149 } 3150 3151 catch_memory_errors = 1; 3152 sync(); 3153 3154 if (mm == &init_mm) { 3155 pgdp = pgd_offset_k(addr); 3156 pgdir = pgd_offset_k(0); 3157 } else { 3158 pgdp = pgd_offset(mm, addr); 3159 pgdir = pgd_offset(mm, 0); 3160 } 3161 3162 if (pgd_none(*pgdp)) { 3163 printf("no linux page table for address\n"); 3164 return; 3165 } 3166 3167 printf("pgd @ 0x%px\n", pgdir); 3168 3169 if (pgd_is_leaf(*pgdp)) { 3170 format_pte(pgdp, pgd_val(*pgdp)); 3171 return; 3172 } 3173 printf("pgdp @ 0x%px = 0x%016lx\n", pgdp, pgd_val(*pgdp)); 3174 3175 pudp = pud_offset(pgdp, addr); 3176 3177 if (pud_none(*pudp)) { 3178 printf("No valid PUD\n"); 3179 return; 3180 } 3181 3182 if (pud_is_leaf(*pudp)) { 3183 format_pte(pudp, pud_val(*pudp)); 3184 return; 3185 } 3186 3187 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp)); 3188 3189 pmdp = pmd_offset(pudp, addr); 3190 3191 if (pmd_none(*pmdp)) { 3192 printf("No valid PMD\n"); 3193 return; 3194 } 3195 3196 if (pmd_is_leaf(*pmdp)) { 3197 format_pte(pmdp, pmd_val(*pmdp)); 3198 return; 3199 } 3200 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp)); 3201 3202 ptep = pte_offset_map(pmdp, addr); 3203 if (pte_none(*ptep)) { 3204 printf("no valid PTE\n"); 3205 return; 3206 } 3207 3208 format_pte(ptep, pte_val(*ptep)); 3209 3210 sync(); 3211 __delay(200); 3212 catch_memory_errors = 0; 3213 } 3214 #else 3215 static void show_pte(unsigned long addr) 3216 { 3217 printf("show_pte not yet implemented\n"); 3218 } 3219 #endif /* CONFIG_PPC_BOOK3S_64 */ 3220 3221 static void show_tasks(void) 3222 { 3223 unsigned long tskv; 3224 struct task_struct *tsk = NULL; 3225 3226 printf(" task_struct ->thread.ksp PID PPID S P CMD\n"); 3227 3228 if (scanhex(&tskv)) 3229 tsk = (struct task_struct *)tskv; 3230 3231 if (setjmp(bus_error_jmp) != 0) { 3232 catch_memory_errors = 0; 3233 printf("*** Error dumping task %px\n", tsk); 3234 return; 3235 } 3236 3237 catch_memory_errors = 1; 3238 sync(); 3239 3240 if (tsk) 3241 show_task(tsk); 3242 else 3243 for_each_process(tsk) 3244 show_task(tsk); 3245 3246 sync(); 3247 __delay(200); 3248 catch_memory_errors = 0; 3249 } 3250 3251 static void proccall(void) 3252 { 3253 unsigned long args[8]; 3254 unsigned long ret; 3255 int i; 3256 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long, 3257 unsigned long, unsigned long, unsigned long, 3258 unsigned long, unsigned long, unsigned long); 3259 callfunc_t func; 3260 3261 if (!scanhex(&adrs)) 3262 return; 3263 if (termch != '\n') 3264 termch = 0; 3265 for (i = 0; i < 8; ++i) 3266 args[i] = 0; 3267 for (i = 0; i < 8; ++i) { 3268 if (!scanhex(&args[i]) || termch == '\n') 3269 break; 3270 termch = 0; 3271 } 3272 func = (callfunc_t) adrs; 3273 ret = 0; 3274 if (setjmp(bus_error_jmp) == 0) { 3275 catch_memory_errors = 1; 3276 sync(); 3277 ret = func(args[0], args[1], args[2], args[3], 3278 args[4], args[5], args[6], args[7]); 3279 sync(); 3280 printf("return value is 0x%lx\n", ret); 3281 } else { 3282 printf("*** %x exception occurred\n", fault_except); 3283 } 3284 catch_memory_errors = 0; 3285 } 3286 3287 /* Input scanning routines */ 3288 int 3289 skipbl(void) 3290 { 3291 int c; 3292 3293 if( termch != 0 ){ 3294 c = termch; 3295 termch = 0; 3296 } else 3297 c = inchar(); 3298 while( c == ' ' || c == '\t' ) 3299 c = inchar(); 3300 return c; 3301 } 3302 3303 #define N_PTREGS 44 3304 static const char *regnames[N_PTREGS] = { 3305 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3306 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3307 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3308 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3309 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", 3310 #ifdef CONFIG_PPC64 3311 "softe", 3312 #else 3313 "mq", 3314 #endif 3315 "trap", "dar", "dsisr", "res" 3316 }; 3317 3318 int 3319 scanhex(unsigned long *vp) 3320 { 3321 int c, d; 3322 unsigned long v; 3323 3324 c = skipbl(); 3325 if (c == '%') { 3326 /* parse register name */ 3327 char regname[8]; 3328 int i; 3329 3330 for (i = 0; i < sizeof(regname) - 1; ++i) { 3331 c = inchar(); 3332 if (!isalnum(c)) { 3333 termch = c; 3334 break; 3335 } 3336 regname[i] = c; 3337 } 3338 regname[i] = 0; 3339 i = match_string(regnames, N_PTREGS, regname); 3340 if (i < 0) { 3341 printf("invalid register name '%%%s'\n", regname); 3342 return 0; 3343 } 3344 if (xmon_regs == NULL) { 3345 printf("regs not available\n"); 3346 return 0; 3347 } 3348 *vp = ((unsigned long *)xmon_regs)[i]; 3349 return 1; 3350 } 3351 3352 /* skip leading "0x" if any */ 3353 3354 if (c == '0') { 3355 c = inchar(); 3356 if (c == 'x') { 3357 c = inchar(); 3358 } else { 3359 d = hexdigit(c); 3360 if (d == EOF) { 3361 termch = c; 3362 *vp = 0; 3363 return 1; 3364 } 3365 } 3366 } else if (c == '$') { 3367 int i; 3368 for (i=0; i<63; i++) { 3369 c = inchar(); 3370 if (isspace(c) || c == '\0') { 3371 termch = c; 3372 break; 3373 } 3374 tmpstr[i] = c; 3375 } 3376 tmpstr[i++] = 0; 3377 *vp = 0; 3378 if (setjmp(bus_error_jmp) == 0) { 3379 catch_memory_errors = 1; 3380 sync(); 3381 *vp = kallsyms_lookup_name(tmpstr); 3382 sync(); 3383 } 3384 catch_memory_errors = 0; 3385 if (!(*vp)) { 3386 printf("unknown symbol '%s'\n", tmpstr); 3387 return 0; 3388 } 3389 return 1; 3390 } 3391 3392 d = hexdigit(c); 3393 if (d == EOF) { 3394 termch = c; 3395 return 0; 3396 } 3397 v = 0; 3398 do { 3399 v = (v << 4) + d; 3400 c = inchar(); 3401 d = hexdigit(c); 3402 } while (d != EOF); 3403 termch = c; 3404 *vp = v; 3405 return 1; 3406 } 3407 3408 static void 3409 scannl(void) 3410 { 3411 int c; 3412 3413 c = termch; 3414 termch = 0; 3415 while( c != '\n' ) 3416 c = inchar(); 3417 } 3418 3419 static int hexdigit(int c) 3420 { 3421 if( '0' <= c && c <= '9' ) 3422 return c - '0'; 3423 if( 'A' <= c && c <= 'F' ) 3424 return c - ('A' - 10); 3425 if( 'a' <= c && c <= 'f' ) 3426 return c - ('a' - 10); 3427 return EOF; 3428 } 3429 3430 void 3431 getstring(char *s, int size) 3432 { 3433 int c; 3434 3435 c = skipbl(); 3436 do { 3437 if( size > 1 ){ 3438 *s++ = c; 3439 --size; 3440 } 3441 c = inchar(); 3442 } while( c != ' ' && c != '\t' && c != '\n' ); 3443 termch = c; 3444 *s = 0; 3445 } 3446 3447 static char line[256]; 3448 static char *lineptr; 3449 3450 static void 3451 flush_input(void) 3452 { 3453 lineptr = NULL; 3454 } 3455 3456 static int 3457 inchar(void) 3458 { 3459 if (lineptr == NULL || *lineptr == 0) { 3460 if (xmon_gets(line, sizeof(line)) == NULL) { 3461 lineptr = NULL; 3462 return EOF; 3463 } 3464 lineptr = line; 3465 } 3466 return *lineptr++; 3467 } 3468 3469 static void 3470 take_input(char *str) 3471 { 3472 lineptr = str; 3473 } 3474 3475 3476 static void 3477 symbol_lookup(void) 3478 { 3479 int type = inchar(); 3480 unsigned long addr, cpu; 3481 void __percpu *ptr = NULL; 3482 static char tmp[64]; 3483 3484 switch (type) { 3485 case 'a': 3486 if (scanhex(&addr)) 3487 xmon_print_symbol(addr, ": ", "\n"); 3488 termch = 0; 3489 break; 3490 case 's': 3491 getstring(tmp, 64); 3492 if (setjmp(bus_error_jmp) == 0) { 3493 catch_memory_errors = 1; 3494 sync(); 3495 addr = kallsyms_lookup_name(tmp); 3496 if (addr) 3497 printf("%s: %lx\n", tmp, addr); 3498 else 3499 printf("Symbol '%s' not found.\n", tmp); 3500 sync(); 3501 } 3502 catch_memory_errors = 0; 3503 termch = 0; 3504 break; 3505 case 'p': 3506 getstring(tmp, 64); 3507 if (setjmp(bus_error_jmp) == 0) { 3508 catch_memory_errors = 1; 3509 sync(); 3510 ptr = (void __percpu *)kallsyms_lookup_name(tmp); 3511 sync(); 3512 } 3513 3514 if (ptr && 3515 ptr >= (void __percpu *)__per_cpu_start && 3516 ptr < (void __percpu *)__per_cpu_end) 3517 { 3518 if (scanhex(&cpu) && cpu < num_possible_cpus()) { 3519 addr = (unsigned long)per_cpu_ptr(ptr, cpu); 3520 } else { 3521 cpu = raw_smp_processor_id(); 3522 addr = (unsigned long)this_cpu_ptr(ptr); 3523 } 3524 3525 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr); 3526 } else { 3527 printf("Percpu symbol '%s' not found.\n", tmp); 3528 } 3529 3530 catch_memory_errors = 0; 3531 termch = 0; 3532 break; 3533 } 3534 } 3535 3536 3537 /* Print an address in numeric and symbolic form (if possible) */ 3538 static void xmon_print_symbol(unsigned long address, const char *mid, 3539 const char *after) 3540 { 3541 char *modname; 3542 const char *name = NULL; 3543 unsigned long offset, size; 3544 3545 printf(REG, address); 3546 if (setjmp(bus_error_jmp) == 0) { 3547 catch_memory_errors = 1; 3548 sync(); 3549 name = kallsyms_lookup(address, &size, &offset, &modname, 3550 tmpstr); 3551 sync(); 3552 /* wait a little while to see if we get a machine check */ 3553 __delay(200); 3554 } 3555 3556 catch_memory_errors = 0; 3557 3558 if (name) { 3559 printf("%s%s+%#lx/%#lx", mid, name, offset, size); 3560 if (modname) 3561 printf(" [%s]", modname); 3562 } 3563 printf("%s", after); 3564 } 3565 3566 #ifdef CONFIG_PPC_BOOK3S_64 3567 void dump_segments(void) 3568 { 3569 int i; 3570 unsigned long esid,vsid; 3571 unsigned long llp; 3572 3573 printf("SLB contents of cpu 0x%x\n", smp_processor_id()); 3574 3575 for (i = 0; i < mmu_slb_size; i++) { 3576 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i)); 3577 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i)); 3578 3579 if (!esid && !vsid) 3580 continue; 3581 3582 printf("%02d %016lx %016lx", i, esid, vsid); 3583 3584 if (!(esid & SLB_ESID_V)) { 3585 printf("\n"); 3586 continue; 3587 } 3588 3589 llp = vsid & SLB_VSID_LLP; 3590 if (vsid & SLB_VSID_B_1T) { 3591 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n", 3592 GET_ESID_1T(esid), 3593 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T, 3594 llp); 3595 } else { 3596 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n", 3597 GET_ESID(esid), 3598 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT, 3599 llp); 3600 } 3601 } 3602 } 3603 #endif 3604 3605 #ifdef CONFIG_PPC_BOOK3S_32 3606 void dump_segments(void) 3607 { 3608 int i; 3609 3610 printf("sr0-15 ="); 3611 for (i = 0; i < 16; ++i) 3612 printf(" %x", mfsrin(i << 28)); 3613 printf("\n"); 3614 } 3615 #endif 3616 3617 #ifdef CONFIG_44x 3618 static void dump_tlb_44x(void) 3619 { 3620 int i; 3621 3622 for (i = 0; i < PPC44x_TLB_SIZE; i++) { 3623 unsigned long w0,w1,w2; 3624 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i)); 3625 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i)); 3626 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i)); 3627 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2); 3628 if (w0 & PPC44x_TLB_VALID) { 3629 printf("V %08lx -> %01lx%08lx %c%c%c%c%c", 3630 w0 & PPC44x_TLB_EPN_MASK, 3631 w1 & PPC44x_TLB_ERPN_MASK, 3632 w1 & PPC44x_TLB_RPN_MASK, 3633 (w2 & PPC44x_TLB_W) ? 'W' : 'w', 3634 (w2 & PPC44x_TLB_I) ? 'I' : 'i', 3635 (w2 & PPC44x_TLB_M) ? 'M' : 'm', 3636 (w2 & PPC44x_TLB_G) ? 'G' : 'g', 3637 (w2 & PPC44x_TLB_E) ? 'E' : 'e'); 3638 } 3639 printf("\n"); 3640 } 3641 } 3642 #endif /* CONFIG_44x */ 3643 3644 #ifdef CONFIG_PPC_BOOK3E 3645 static void dump_tlb_book3e(void) 3646 { 3647 u32 mmucfg, pidmask, lpidmask; 3648 u64 ramask; 3649 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0; 3650 int mmu_version; 3651 static const char *pgsz_names[] = { 3652 " 1K", 3653 " 2K", 3654 " 4K", 3655 " 8K", 3656 " 16K", 3657 " 32K", 3658 " 64K", 3659 "128K", 3660 "256K", 3661 "512K", 3662 " 1M", 3663 " 2M", 3664 " 4M", 3665 " 8M", 3666 " 16M", 3667 " 32M", 3668 " 64M", 3669 "128M", 3670 "256M", 3671 "512M", 3672 " 1G", 3673 " 2G", 3674 " 4G", 3675 " 8G", 3676 " 16G", 3677 " 32G", 3678 " 64G", 3679 "128G", 3680 "256G", 3681 "512G", 3682 " 1T", 3683 " 2T", 3684 }; 3685 3686 /* Gather some infos about the MMU */ 3687 mmucfg = mfspr(SPRN_MMUCFG); 3688 mmu_version = (mmucfg & 3) + 1; 3689 ntlbs = ((mmucfg >> 2) & 3) + 1; 3690 pidsz = ((mmucfg >> 6) & 0x1f) + 1; 3691 lpidsz = (mmucfg >> 24) & 0xf; 3692 rasz = (mmucfg >> 16) & 0x7f; 3693 if ((mmu_version > 1) && (mmucfg & 0x10000)) 3694 lrat = 1; 3695 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n", 3696 mmu_version, ntlbs, pidsz, lpidsz, rasz); 3697 pidmask = (1ul << pidsz) - 1; 3698 lpidmask = (1ul << lpidsz) - 1; 3699 ramask = (1ull << rasz) - 1; 3700 3701 for (tlb = 0; tlb < ntlbs; tlb++) { 3702 u32 tlbcfg; 3703 int nent, assoc, new_cc = 1; 3704 printf("TLB %d:\n------\n", tlb); 3705 switch(tlb) { 3706 case 0: 3707 tlbcfg = mfspr(SPRN_TLB0CFG); 3708 break; 3709 case 1: 3710 tlbcfg = mfspr(SPRN_TLB1CFG); 3711 break; 3712 case 2: 3713 tlbcfg = mfspr(SPRN_TLB2CFG); 3714 break; 3715 case 3: 3716 tlbcfg = mfspr(SPRN_TLB3CFG); 3717 break; 3718 default: 3719 printf("Unsupported TLB number !\n"); 3720 continue; 3721 } 3722 nent = tlbcfg & 0xfff; 3723 assoc = (tlbcfg >> 24) & 0xff; 3724 for (i = 0; i < nent; i++) { 3725 u32 mas0 = MAS0_TLBSEL(tlb); 3726 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K); 3727 u64 mas2 = 0; 3728 u64 mas7_mas3; 3729 int esel = i, cc = i; 3730 3731 if (assoc != 0) { 3732 cc = i / assoc; 3733 esel = i % assoc; 3734 mas2 = cc * 0x1000; 3735 } 3736 3737 mas0 |= MAS0_ESEL(esel); 3738 mtspr(SPRN_MAS0, mas0); 3739 mtspr(SPRN_MAS1, mas1); 3740 mtspr(SPRN_MAS2, mas2); 3741 asm volatile("tlbre 0,0,0" : : : "memory"); 3742 mas1 = mfspr(SPRN_MAS1); 3743 mas2 = mfspr(SPRN_MAS2); 3744 mas7_mas3 = mfspr(SPRN_MAS7_MAS3); 3745 if (assoc && (i % assoc) == 0) 3746 new_cc = 1; 3747 if (!(mas1 & MAS1_VALID)) 3748 continue; 3749 if (assoc == 0) 3750 printf("%04x- ", i); 3751 else if (new_cc) 3752 printf("%04x-%c", cc, 'A' + esel); 3753 else 3754 printf(" |%c", 'A' + esel); 3755 new_cc = 0; 3756 printf(" %016llx %04x %s %c%c AS%c", 3757 mas2 & ~0x3ffull, 3758 (mas1 >> 16) & 0x3fff, 3759 pgsz_names[(mas1 >> 7) & 0x1f], 3760 mas1 & MAS1_IND ? 'I' : ' ', 3761 mas1 & MAS1_IPROT ? 'P' : ' ', 3762 mas1 & MAS1_TS ? '1' : '0'); 3763 printf(" %c%c%c%c%c%c%c", 3764 mas2 & MAS2_X0 ? 'a' : ' ', 3765 mas2 & MAS2_X1 ? 'v' : ' ', 3766 mas2 & MAS2_W ? 'w' : ' ', 3767 mas2 & MAS2_I ? 'i' : ' ', 3768 mas2 & MAS2_M ? 'm' : ' ', 3769 mas2 & MAS2_G ? 'g' : ' ', 3770 mas2 & MAS2_E ? 'e' : ' '); 3771 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull); 3772 if (mas1 & MAS1_IND) 3773 printf(" %s\n", 3774 pgsz_names[(mas7_mas3 >> 1) & 0x1f]); 3775 else 3776 printf(" U%c%c%c S%c%c%c\n", 3777 mas7_mas3 & MAS3_UX ? 'x' : ' ', 3778 mas7_mas3 & MAS3_UW ? 'w' : ' ', 3779 mas7_mas3 & MAS3_UR ? 'r' : ' ', 3780 mas7_mas3 & MAS3_SX ? 'x' : ' ', 3781 mas7_mas3 & MAS3_SW ? 'w' : ' ', 3782 mas7_mas3 & MAS3_SR ? 'r' : ' '); 3783 } 3784 } 3785 } 3786 #endif /* CONFIG_PPC_BOOK3E */ 3787 3788 static void xmon_init(int enable) 3789 { 3790 if (enable) { 3791 __debugger = xmon; 3792 __debugger_ipi = xmon_ipi; 3793 __debugger_bpt = xmon_bpt; 3794 __debugger_sstep = xmon_sstep; 3795 __debugger_iabr_match = xmon_iabr_match; 3796 __debugger_break_match = xmon_break_match; 3797 __debugger_fault_handler = xmon_fault_handler; 3798 3799 #ifdef CONFIG_PPC_PSERIES 3800 /* 3801 * Get the token here to avoid trying to get a lock 3802 * during the crash, causing a deadlock. 3803 */ 3804 set_indicator_token = rtas_token("set-indicator"); 3805 #endif 3806 } else { 3807 __debugger = NULL; 3808 __debugger_ipi = NULL; 3809 __debugger_bpt = NULL; 3810 __debugger_sstep = NULL; 3811 __debugger_iabr_match = NULL; 3812 __debugger_break_match = NULL; 3813 __debugger_fault_handler = NULL; 3814 } 3815 } 3816 3817 #ifdef CONFIG_MAGIC_SYSRQ 3818 static void sysrq_handle_xmon(int key) 3819 { 3820 if (xmon_is_locked_down()) { 3821 clear_all_bpt(); 3822 xmon_init(0); 3823 return; 3824 } 3825 /* ensure xmon is enabled */ 3826 xmon_init(1); 3827 debugger(get_irq_regs()); 3828 if (!xmon_on) 3829 xmon_init(0); 3830 } 3831 3832 static struct sysrq_key_op sysrq_xmon_op = { 3833 .handler = sysrq_handle_xmon, 3834 .help_msg = "xmon(x)", 3835 .action_msg = "Entering xmon", 3836 }; 3837 3838 static int __init setup_xmon_sysrq(void) 3839 { 3840 register_sysrq_key('x', &sysrq_xmon_op); 3841 return 0; 3842 } 3843 device_initcall(setup_xmon_sysrq); 3844 #endif /* CONFIG_MAGIC_SYSRQ */ 3845 3846 static void clear_all_bpt(void) 3847 { 3848 int i; 3849 3850 /* clear/unpatch all breakpoints */ 3851 remove_bpts(); 3852 remove_cpu_bpts(); 3853 3854 /* Disable all breakpoints */ 3855 for (i = 0; i < NBPTS; ++i) 3856 bpts[i].enabled = 0; 3857 3858 /* Clear any data or iabr breakpoints */ 3859 if (iabr || dabr.enabled) { 3860 iabr = NULL; 3861 dabr.enabled = 0; 3862 } 3863 } 3864 3865 #ifdef CONFIG_DEBUG_FS 3866 static int xmon_dbgfs_set(void *data, u64 val) 3867 { 3868 xmon_on = !!val; 3869 xmon_init(xmon_on); 3870 3871 /* make sure all breakpoints removed when disabling */ 3872 if (!xmon_on) { 3873 clear_all_bpt(); 3874 get_output_lock(); 3875 printf("xmon: All breakpoints cleared\n"); 3876 release_output_lock(); 3877 } 3878 3879 return 0; 3880 } 3881 3882 static int xmon_dbgfs_get(void *data, u64 *val) 3883 { 3884 *val = xmon_on; 3885 return 0; 3886 } 3887 3888 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get, 3889 xmon_dbgfs_set, "%llu\n"); 3890 3891 static int __init setup_xmon_dbgfs(void) 3892 { 3893 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL, 3894 &xmon_dbgfs_ops); 3895 return 0; 3896 } 3897 device_initcall(setup_xmon_dbgfs); 3898 #endif /* CONFIG_DEBUG_FS */ 3899 3900 static int xmon_early __initdata; 3901 3902 static int __init early_parse_xmon(char *p) 3903 { 3904 if (xmon_is_locked_down()) { 3905 xmon_init(0); 3906 xmon_early = 0; 3907 xmon_on = 0; 3908 } else if (!p || strncmp(p, "early", 5) == 0) { 3909 /* just "xmon" is equivalent to "xmon=early" */ 3910 xmon_init(1); 3911 xmon_early = 1; 3912 xmon_on = 1; 3913 } else if (strncmp(p, "on", 2) == 0) { 3914 xmon_init(1); 3915 xmon_on = 1; 3916 } else if (strncmp(p, "rw", 2) == 0) { 3917 xmon_init(1); 3918 xmon_on = 1; 3919 xmon_is_ro = false; 3920 } else if (strncmp(p, "ro", 2) == 0) { 3921 xmon_init(1); 3922 xmon_on = 1; 3923 xmon_is_ro = true; 3924 } else if (strncmp(p, "off", 3) == 0) 3925 xmon_on = 0; 3926 else 3927 return 1; 3928 3929 return 0; 3930 } 3931 early_param("xmon", early_parse_xmon); 3932 3933 void __init xmon_setup(void) 3934 { 3935 if (xmon_on) 3936 xmon_init(1); 3937 if (xmon_early) 3938 debugger(NULL); 3939 } 3940 3941 #ifdef CONFIG_SPU_BASE 3942 3943 struct spu_info { 3944 struct spu *spu; 3945 u64 saved_mfc_sr1_RW; 3946 u32 saved_spu_runcntl_RW; 3947 unsigned long dump_addr; 3948 u8 stopped_ok; 3949 }; 3950 3951 #define XMON_NUM_SPUS 16 /* Enough for current hardware */ 3952 3953 static struct spu_info spu_info[XMON_NUM_SPUS]; 3954 3955 void xmon_register_spus(struct list_head *list) 3956 { 3957 struct spu *spu; 3958 3959 list_for_each_entry(spu, list, full_list) { 3960 if (spu->number >= XMON_NUM_SPUS) { 3961 WARN_ON(1); 3962 continue; 3963 } 3964 3965 spu_info[spu->number].spu = spu; 3966 spu_info[spu->number].stopped_ok = 0; 3967 spu_info[spu->number].dump_addr = (unsigned long) 3968 spu_info[spu->number].spu->local_store; 3969 } 3970 } 3971 3972 static void stop_spus(void) 3973 { 3974 struct spu *spu; 3975 int i; 3976 u64 tmp; 3977 3978 for (i = 0; i < XMON_NUM_SPUS; i++) { 3979 if (!spu_info[i].spu) 3980 continue; 3981 3982 if (setjmp(bus_error_jmp) == 0) { 3983 catch_memory_errors = 1; 3984 sync(); 3985 3986 spu = spu_info[i].spu; 3987 3988 spu_info[i].saved_spu_runcntl_RW = 3989 in_be32(&spu->problem->spu_runcntl_RW); 3990 3991 tmp = spu_mfc_sr1_get(spu); 3992 spu_info[i].saved_mfc_sr1_RW = tmp; 3993 3994 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 3995 spu_mfc_sr1_set(spu, tmp); 3996 3997 sync(); 3998 __delay(200); 3999 4000 spu_info[i].stopped_ok = 1; 4001 4002 printf("Stopped spu %.2d (was %s)\n", i, 4003 spu_info[i].saved_spu_runcntl_RW ? 4004 "running" : "stopped"); 4005 } else { 4006 catch_memory_errors = 0; 4007 printf("*** Error stopping spu %.2d\n", i); 4008 } 4009 catch_memory_errors = 0; 4010 } 4011 } 4012 4013 static void restart_spus(void) 4014 { 4015 struct spu *spu; 4016 int i; 4017 4018 for (i = 0; i < XMON_NUM_SPUS; i++) { 4019 if (!spu_info[i].spu) 4020 continue; 4021 4022 if (!spu_info[i].stopped_ok) { 4023 printf("*** Error, spu %d was not successfully stopped" 4024 ", not restarting\n", i); 4025 continue; 4026 } 4027 4028 if (setjmp(bus_error_jmp) == 0) { 4029 catch_memory_errors = 1; 4030 sync(); 4031 4032 spu = spu_info[i].spu; 4033 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW); 4034 out_be32(&spu->problem->spu_runcntl_RW, 4035 spu_info[i].saved_spu_runcntl_RW); 4036 4037 sync(); 4038 __delay(200); 4039 4040 printf("Restarted spu %.2d\n", i); 4041 } else { 4042 catch_memory_errors = 0; 4043 printf("*** Error restarting spu %.2d\n", i); 4044 } 4045 catch_memory_errors = 0; 4046 } 4047 } 4048 4049 #define DUMP_WIDTH 23 4050 #define DUMP_VALUE(format, field, value) \ 4051 do { \ 4052 if (setjmp(bus_error_jmp) == 0) { \ 4053 catch_memory_errors = 1; \ 4054 sync(); \ 4055 printf(" %-*s = "format"\n", DUMP_WIDTH, \ 4056 #field, value); \ 4057 sync(); \ 4058 __delay(200); \ 4059 } else { \ 4060 catch_memory_errors = 0; \ 4061 printf(" %-*s = *** Error reading field.\n", \ 4062 DUMP_WIDTH, #field); \ 4063 } \ 4064 catch_memory_errors = 0; \ 4065 } while (0) 4066 4067 #define DUMP_FIELD(obj, format, field) \ 4068 DUMP_VALUE(format, field, obj->field) 4069 4070 static void dump_spu_fields(struct spu *spu) 4071 { 4072 printf("Dumping spu fields at address %p:\n", spu); 4073 4074 DUMP_FIELD(spu, "0x%x", number); 4075 DUMP_FIELD(spu, "%s", name); 4076 DUMP_FIELD(spu, "0x%lx", local_store_phys); 4077 DUMP_FIELD(spu, "0x%p", local_store); 4078 DUMP_FIELD(spu, "0x%lx", ls_size); 4079 DUMP_FIELD(spu, "0x%x", node); 4080 DUMP_FIELD(spu, "0x%lx", flags); 4081 DUMP_FIELD(spu, "%llu", class_0_pending); 4082 DUMP_FIELD(spu, "0x%llx", class_0_dar); 4083 DUMP_FIELD(spu, "0x%llx", class_1_dar); 4084 DUMP_FIELD(spu, "0x%llx", class_1_dsisr); 4085 DUMP_FIELD(spu, "0x%x", irqs[0]); 4086 DUMP_FIELD(spu, "0x%x", irqs[1]); 4087 DUMP_FIELD(spu, "0x%x", irqs[2]); 4088 DUMP_FIELD(spu, "0x%x", slb_replace); 4089 DUMP_FIELD(spu, "%d", pid); 4090 DUMP_FIELD(spu, "0x%p", mm); 4091 DUMP_FIELD(spu, "0x%p", ctx); 4092 DUMP_FIELD(spu, "0x%p", rq); 4093 DUMP_FIELD(spu, "0x%llx", timestamp); 4094 DUMP_FIELD(spu, "0x%lx", problem_phys); 4095 DUMP_FIELD(spu, "0x%p", problem); 4096 DUMP_VALUE("0x%x", problem->spu_runcntl_RW, 4097 in_be32(&spu->problem->spu_runcntl_RW)); 4098 DUMP_VALUE("0x%x", problem->spu_status_R, 4099 in_be32(&spu->problem->spu_status_R)); 4100 DUMP_VALUE("0x%x", problem->spu_npc_RW, 4101 in_be32(&spu->problem->spu_npc_RW)); 4102 DUMP_FIELD(spu, "0x%p", priv2); 4103 DUMP_FIELD(spu, "0x%p", pdata); 4104 } 4105 4106 int 4107 spu_inst_dump(unsigned long adr, long count, int praddr) 4108 { 4109 return generic_inst_dump(adr, count, praddr, print_insn_spu); 4110 } 4111 4112 static void dump_spu_ls(unsigned long num, int subcmd) 4113 { 4114 unsigned long offset, addr, ls_addr; 4115 4116 if (setjmp(bus_error_jmp) == 0) { 4117 catch_memory_errors = 1; 4118 sync(); 4119 ls_addr = (unsigned long)spu_info[num].spu->local_store; 4120 sync(); 4121 __delay(200); 4122 } else { 4123 catch_memory_errors = 0; 4124 printf("*** Error: accessing spu info for spu %ld\n", num); 4125 return; 4126 } 4127 catch_memory_errors = 0; 4128 4129 if (scanhex(&offset)) 4130 addr = ls_addr + offset; 4131 else 4132 addr = spu_info[num].dump_addr; 4133 4134 if (addr >= ls_addr + LS_SIZE) { 4135 printf("*** Error: address outside of local store\n"); 4136 return; 4137 } 4138 4139 switch (subcmd) { 4140 case 'i': 4141 addr += spu_inst_dump(addr, 16, 1); 4142 last_cmd = "sdi\n"; 4143 break; 4144 default: 4145 prdump(addr, 64); 4146 addr += 64; 4147 last_cmd = "sd\n"; 4148 break; 4149 } 4150 4151 spu_info[num].dump_addr = addr; 4152 } 4153 4154 static int do_spu_cmd(void) 4155 { 4156 static unsigned long num = 0; 4157 int cmd, subcmd = 0; 4158 4159 cmd = inchar(); 4160 switch (cmd) { 4161 case 's': 4162 stop_spus(); 4163 break; 4164 case 'r': 4165 restart_spus(); 4166 break; 4167 case 'd': 4168 subcmd = inchar(); 4169 if (isxdigit(subcmd) || subcmd == '\n') 4170 termch = subcmd; 4171 /* fall through */ 4172 case 'f': 4173 scanhex(&num); 4174 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) { 4175 printf("*** Error: invalid spu number\n"); 4176 return 0; 4177 } 4178 4179 switch (cmd) { 4180 case 'f': 4181 dump_spu_fields(spu_info[num].spu); 4182 break; 4183 default: 4184 dump_spu_ls(num, subcmd); 4185 break; 4186 } 4187 4188 break; 4189 default: 4190 return -1; 4191 } 4192 4193 return 0; 4194 } 4195 #else /* ! CONFIG_SPU_BASE */ 4196 static int do_spu_cmd(void) 4197 { 4198 return -1; 4199 } 4200 #endif 4201