1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Routines providing a simple monitor for use on the PowerMac. 4 * 5 * Copyright (C) 1996-2005 Paul Mackerras. 6 * Copyright (C) 2001 PPC64 Team, IBM Corp 7 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/errno.h> 12 #include <linux/sched/signal.h> 13 #include <linux/smp.h> 14 #include <linux/mm.h> 15 #include <linux/reboot.h> 16 #include <linux/delay.h> 17 #include <linux/kallsyms.h> 18 #include <linux/kmsg_dump.h> 19 #include <linux/cpumask.h> 20 #include <linux/export.h> 21 #include <linux/sysrq.h> 22 #include <linux/interrupt.h> 23 #include <linux/irq.h> 24 #include <linux/bug.h> 25 #include <linux/nmi.h> 26 #include <linux/ctype.h> 27 #include <linux/highmem.h> 28 #include <linux/security.h> 29 30 #include <asm/debugfs.h> 31 #include <asm/ptrace.h> 32 #include <asm/smp.h> 33 #include <asm/string.h> 34 #include <asm/prom.h> 35 #include <asm/machdep.h> 36 #include <asm/xmon.h> 37 #include <asm/processor.h> 38 #include <asm/mmu.h> 39 #include <asm/mmu_context.h> 40 #include <asm/plpar_wrappers.h> 41 #include <asm/cputable.h> 42 #include <asm/rtas.h> 43 #include <asm/sstep.h> 44 #include <asm/irq_regs.h> 45 #include <asm/spu.h> 46 #include <asm/spu_priv1.h> 47 #include <asm/setjmp.h> 48 #include <asm/reg.h> 49 #include <asm/debug.h> 50 #include <asm/hw_breakpoint.h> 51 #include <asm/xive.h> 52 #include <asm/opal.h> 53 #include <asm/firmware.h> 54 #include <asm/code-patching.h> 55 #include <asm/sections.h> 56 #include <asm/inst.h> 57 58 #ifdef CONFIG_PPC64 59 #include <asm/hvcall.h> 60 #include <asm/paca.h> 61 #endif 62 63 #include "nonstdio.h" 64 #include "dis-asm.h" 65 #include "xmon_bpts.h" 66 67 #ifdef CONFIG_SMP 68 static cpumask_t cpus_in_xmon = CPU_MASK_NONE; 69 static unsigned long xmon_taken = 1; 70 static int xmon_owner; 71 static int xmon_gate; 72 #else 73 #define xmon_owner 0 74 #endif /* CONFIG_SMP */ 75 76 #ifdef CONFIG_PPC_PSERIES 77 static int set_indicator_token = RTAS_UNKNOWN_SERVICE; 78 #endif 79 static unsigned long in_xmon __read_mostly = 0; 80 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT); 81 static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE); 82 83 static unsigned long adrs; 84 static int size = 1; 85 #define MAX_DUMP (64 * 1024) 86 static unsigned long ndump = 64; 87 #define MAX_IDUMP (MAX_DUMP >> 2) 88 static unsigned long nidump = 16; 89 static unsigned long ncsum = 4096; 90 static int termch; 91 static char tmpstr[128]; 92 static int tracing_enabled; 93 94 static long bus_error_jmp[JMP_BUF_LEN]; 95 static int catch_memory_errors; 96 static int catch_spr_faults; 97 static long *xmon_fault_jmp[NR_CPUS]; 98 99 /* Breakpoint stuff */ 100 struct bpt { 101 unsigned long address; 102 struct ppc_inst *instr; 103 atomic_t ref_count; 104 int enabled; 105 unsigned long pad; 106 }; 107 108 /* Bits in bpt.enabled */ 109 #define BP_CIABR 1 110 #define BP_TRAP 2 111 #define BP_DABR 4 112 113 static struct bpt bpts[NBPTS]; 114 static struct bpt dabr[HBP_NUM_MAX]; 115 static struct bpt *iabr; 116 static unsigned bpinstr = 0x7fe00008; /* trap */ 117 118 #define BP_NUM(bp) ((bp) - bpts + 1) 119 120 /* Prototypes */ 121 static int cmds(struct pt_regs *); 122 static int mread(unsigned long, void *, int); 123 static int mwrite(unsigned long, void *, int); 124 static int mread_instr(unsigned long, struct ppc_inst *); 125 static int handle_fault(struct pt_regs *); 126 static void byterev(unsigned char *, int); 127 static void memex(void); 128 static int bsesc(void); 129 static void dump(void); 130 static void show_pte(unsigned long); 131 static void prdump(unsigned long, long); 132 static int ppc_inst_dump(unsigned long, long, int); 133 static void dump_log_buf(void); 134 135 #ifdef CONFIG_PPC_POWERNV 136 static void dump_opal_msglog(void); 137 #else 138 static inline void dump_opal_msglog(void) 139 { 140 printf("Machine is not running OPAL firmware.\n"); 141 } 142 #endif 143 144 static void backtrace(struct pt_regs *); 145 static void excprint(struct pt_regs *); 146 static void prregs(struct pt_regs *); 147 static void memops(int); 148 static void memlocate(void); 149 static void memzcan(void); 150 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned); 151 int skipbl(void); 152 int scanhex(unsigned long *valp); 153 static void scannl(void); 154 static int hexdigit(int); 155 void getstring(char *, int); 156 static void flush_input(void); 157 static int inchar(void); 158 static void take_input(char *); 159 static int read_spr(int, unsigned long *); 160 static void write_spr(int, unsigned long); 161 static void super_regs(void); 162 static void remove_bpts(void); 163 static void insert_bpts(void); 164 static void remove_cpu_bpts(void); 165 static void insert_cpu_bpts(void); 166 static struct bpt *at_breakpoint(unsigned long pc); 167 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp); 168 static int do_step(struct pt_regs *); 169 static void bpt_cmds(void); 170 static void cacheflush(void); 171 static int cpu_cmd(void); 172 static void csum(void); 173 static void bootcmds(void); 174 static void proccall(void); 175 static void show_tasks(void); 176 void dump_segments(void); 177 static void symbol_lookup(void); 178 static void xmon_show_stack(unsigned long sp, unsigned long lr, 179 unsigned long pc); 180 static void xmon_print_symbol(unsigned long address, const char *mid, 181 const char *after); 182 static const char *getvecname(unsigned long vec); 183 184 static int do_spu_cmd(void); 185 186 #ifdef CONFIG_44x 187 static void dump_tlb_44x(void); 188 #endif 189 #ifdef CONFIG_PPC_BOOK3E 190 static void dump_tlb_book3e(void); 191 #endif 192 193 static void clear_all_bpt(void); 194 195 #ifdef CONFIG_PPC64 196 #define REG "%.16lx" 197 #else 198 #define REG "%.8lx" 199 #endif 200 201 #ifdef __LITTLE_ENDIAN__ 202 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0]) 203 #else 204 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3]) 205 #endif 206 207 static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n"; 208 209 static char *help_string = "\ 210 Commands:\n\ 211 b show breakpoints\n\ 212 bd set data breakpoint\n\ 213 bi set instruction breakpoint\n\ 214 bc clear breakpoint\n" 215 #ifdef CONFIG_SMP 216 "\ 217 c print cpus stopped in xmon\n\ 218 c# try to switch to cpu number h (in hex)\n" 219 #endif 220 "\ 221 C checksum\n\ 222 d dump bytes\n\ 223 d1 dump 1 byte values\n\ 224 d2 dump 2 byte values\n\ 225 d4 dump 4 byte values\n\ 226 d8 dump 8 byte values\n\ 227 di dump instructions\n\ 228 df dump float values\n\ 229 dd dump double values\n\ 230 dl dump the kernel log buffer\n" 231 #ifdef CONFIG_PPC_POWERNV 232 "\ 233 do dump the OPAL message log\n" 234 #endif 235 #ifdef CONFIG_PPC64 236 "\ 237 dp[#] dump paca for current cpu, or cpu #\n\ 238 dpa dump paca for all possible cpus\n" 239 #endif 240 "\ 241 dr dump stream of raw bytes\n\ 242 dv dump virtual address translation \n\ 243 dt dump the tracing buffers (uses printk)\n\ 244 dtc dump the tracing buffers for current CPU (uses printk)\n\ 245 " 246 #ifdef CONFIG_PPC_POWERNV 247 " dx# dump xive on CPU #\n\ 248 dxi# dump xive irq state #\n\ 249 dxa dump xive on all CPUs\n" 250 #endif 251 " e print exception information\n\ 252 f flush cache\n\ 253 la lookup symbol+offset of specified address\n\ 254 ls lookup address of specified symbol\n\ 255 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\ 256 m examine/change memory\n\ 257 mm move a block of memory\n\ 258 ms set a block of memory\n\ 259 md compare two blocks of memory\n\ 260 ml locate a block of memory\n\ 261 mz zero a block of memory\n\ 262 mi show information about memory allocation\n\ 263 p call a procedure\n\ 264 P list processes/tasks\n\ 265 r print registers\n\ 266 s single step\n" 267 #ifdef CONFIG_SPU_BASE 268 " ss stop execution on all spus\n\ 269 sr restore execution on stopped spus\n\ 270 sf # dump spu fields for spu # (in hex)\n\ 271 sd # dump spu local store for spu # (in hex)\n\ 272 sdi # disassemble spu local store for spu # (in hex)\n" 273 #endif 274 " S print special registers\n\ 275 Sa print all SPRs\n\ 276 Sr # read SPR #\n\ 277 Sw #v write v to SPR #\n\ 278 t print backtrace\n\ 279 x exit monitor and recover\n\ 280 X exit monitor and don't recover\n" 281 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E) 282 " u dump segment table or SLB\n" 283 #elif defined(CONFIG_PPC_BOOK3S_32) 284 " u dump segment registers\n" 285 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E) 286 " u dump TLB\n" 287 #endif 288 " U show uptime information\n" 289 " ? help\n" 290 " # n limit output to n lines per page (for dp, dpa, dl)\n" 291 " zr reboot\n" 292 " zh halt\n" 293 ; 294 295 #ifdef CONFIG_SECURITY 296 static bool xmon_is_locked_down(void) 297 { 298 static bool lockdown; 299 300 if (!lockdown) { 301 lockdown = !!security_locked_down(LOCKDOWN_XMON_RW); 302 if (lockdown) { 303 printf("xmon: Disabled due to kernel lockdown\n"); 304 xmon_is_ro = true; 305 } 306 } 307 308 if (!xmon_is_ro) { 309 xmon_is_ro = !!security_locked_down(LOCKDOWN_XMON_WR); 310 if (xmon_is_ro) 311 printf("xmon: Read-only due to kernel lockdown\n"); 312 } 313 314 return lockdown; 315 } 316 #else /* CONFIG_SECURITY */ 317 static inline bool xmon_is_locked_down(void) 318 { 319 return false; 320 } 321 #endif 322 323 static struct pt_regs *xmon_regs; 324 325 static inline void sync(void) 326 { 327 asm volatile("sync; isync"); 328 } 329 330 static inline void cflush(void *p) 331 { 332 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p)); 333 } 334 335 static inline void cinval(void *p) 336 { 337 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p)); 338 } 339 340 /** 341 * write_ciabr() - write the CIABR SPR 342 * @ciabr: The value to write. 343 * 344 * This function writes a value to the CIARB register either directly 345 * through mtspr instruction if the kernel is in HV privilege mode or 346 * call a hypervisor function to achieve the same in case the kernel 347 * is in supervisor privilege mode. 348 */ 349 static void write_ciabr(unsigned long ciabr) 350 { 351 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 352 return; 353 354 if (cpu_has_feature(CPU_FTR_HVMODE)) { 355 mtspr(SPRN_CIABR, ciabr); 356 return; 357 } 358 plpar_set_ciabr(ciabr); 359 } 360 361 /** 362 * set_ciabr() - set the CIABR 363 * @addr: The value to set. 364 * 365 * This function sets the correct privilege value into the the HW 366 * breakpoint address before writing it up in the CIABR register. 367 */ 368 static void set_ciabr(unsigned long addr) 369 { 370 addr &= ~CIABR_PRIV; 371 372 if (cpu_has_feature(CPU_FTR_HVMODE)) 373 addr |= CIABR_PRIV_HYPER; 374 else 375 addr |= CIABR_PRIV_SUPER; 376 write_ciabr(addr); 377 } 378 379 /* 380 * Disable surveillance (the service processor watchdog function) 381 * while we are in xmon. 382 * XXX we should re-enable it when we leave. :) 383 */ 384 #define SURVEILLANCE_TOKEN 9000 385 386 static inline void disable_surveillance(void) 387 { 388 #ifdef CONFIG_PPC_PSERIES 389 /* Since this can't be a module, args should end up below 4GB. */ 390 static struct rtas_args args; 391 392 /* 393 * At this point we have got all the cpus we can into 394 * xmon, so there is hopefully no other cpu calling RTAS 395 * at the moment, even though we don't take rtas.lock. 396 * If we did try to take rtas.lock there would be a 397 * real possibility of deadlock. 398 */ 399 if (set_indicator_token == RTAS_UNKNOWN_SERVICE) 400 return; 401 402 rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL, 403 SURVEILLANCE_TOKEN, 0, 0); 404 405 #endif /* CONFIG_PPC_PSERIES */ 406 } 407 408 #ifdef CONFIG_SMP 409 static int xmon_speaker; 410 411 static void get_output_lock(void) 412 { 413 int me = smp_processor_id() + 0x100; 414 int last_speaker = 0, prev; 415 long timeout; 416 417 if (xmon_speaker == me) 418 return; 419 420 for (;;) { 421 last_speaker = cmpxchg(&xmon_speaker, 0, me); 422 if (last_speaker == 0) 423 return; 424 425 /* 426 * Wait a full second for the lock, we might be on a slow 427 * console, but check every 100us. 428 */ 429 timeout = 10000; 430 while (xmon_speaker == last_speaker) { 431 if (--timeout > 0) { 432 udelay(100); 433 continue; 434 } 435 436 /* hostile takeover */ 437 prev = cmpxchg(&xmon_speaker, last_speaker, me); 438 if (prev == last_speaker) 439 return; 440 break; 441 } 442 } 443 } 444 445 static void release_output_lock(void) 446 { 447 xmon_speaker = 0; 448 } 449 450 int cpus_are_in_xmon(void) 451 { 452 return !cpumask_empty(&cpus_in_xmon); 453 } 454 455 static bool wait_for_other_cpus(int ncpus) 456 { 457 unsigned long timeout; 458 459 /* We wait for 2s, which is a metric "little while" */ 460 for (timeout = 20000; timeout != 0; --timeout) { 461 if (cpumask_weight(&cpus_in_xmon) >= ncpus) 462 return true; 463 udelay(100); 464 barrier(); 465 } 466 467 return false; 468 } 469 #else /* CONFIG_SMP */ 470 static inline void get_output_lock(void) {} 471 static inline void release_output_lock(void) {} 472 #endif 473 474 static inline int unrecoverable_excp(struct pt_regs *regs) 475 { 476 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E) 477 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */ 478 return 0; 479 #else 480 return ((regs->msr & MSR_RI) == 0); 481 #endif 482 } 483 484 static void xmon_touch_watchdogs(void) 485 { 486 touch_softlockup_watchdog_sync(); 487 rcu_cpu_stall_reset(); 488 touch_nmi_watchdog(); 489 } 490 491 static int xmon_core(struct pt_regs *regs, int fromipi) 492 { 493 int cmd = 0; 494 struct bpt *bp; 495 long recurse_jmp[JMP_BUF_LEN]; 496 bool locked_down; 497 unsigned long offset; 498 unsigned long flags; 499 #ifdef CONFIG_SMP 500 int cpu; 501 int secondary; 502 #endif 503 504 local_irq_save(flags); 505 hard_irq_disable(); 506 507 locked_down = xmon_is_locked_down(); 508 509 if (!fromipi) { 510 tracing_enabled = tracing_is_on(); 511 tracing_off(); 512 } 513 514 bp = in_breakpoint_table(regs->nip, &offset); 515 if (bp != NULL) { 516 regs->nip = bp->address + offset; 517 atomic_dec(&bp->ref_count); 518 } 519 520 remove_cpu_bpts(); 521 522 #ifdef CONFIG_SMP 523 cpu = smp_processor_id(); 524 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 525 /* 526 * We catch SPR read/write faults here because the 0x700, 0xf60 527 * etc. handlers don't call debugger_fault_handler(). 528 */ 529 if (catch_spr_faults) 530 longjmp(bus_error_jmp, 1); 531 get_output_lock(); 532 excprint(regs); 533 printf("cpu 0x%x: Exception %lx %s in xmon, " 534 "returning to main loop\n", 535 cpu, regs->trap, getvecname(TRAP(regs))); 536 release_output_lock(); 537 longjmp(xmon_fault_jmp[cpu], 1); 538 } 539 540 if (setjmp(recurse_jmp) != 0) { 541 if (!in_xmon || !xmon_gate) { 542 get_output_lock(); 543 printf("xmon: WARNING: bad recursive fault " 544 "on cpu 0x%x\n", cpu); 545 release_output_lock(); 546 goto waiting; 547 } 548 secondary = !(xmon_taken && cpu == xmon_owner); 549 goto cmdloop; 550 } 551 552 xmon_fault_jmp[cpu] = recurse_jmp; 553 554 bp = NULL; 555 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) 556 bp = at_breakpoint(regs->nip); 557 if (bp || unrecoverable_excp(regs)) 558 fromipi = 0; 559 560 if (!fromipi) { 561 get_output_lock(); 562 if (!locked_down) 563 excprint(regs); 564 if (bp) { 565 printf("cpu 0x%x stopped at breakpoint 0x%tx (", 566 cpu, BP_NUM(bp)); 567 xmon_print_symbol(regs->nip, " ", ")\n"); 568 } 569 if (unrecoverable_excp(regs)) 570 printf("WARNING: exception is not recoverable, " 571 "can't continue\n"); 572 release_output_lock(); 573 } 574 575 cpumask_set_cpu(cpu, &cpus_in_xmon); 576 577 waiting: 578 secondary = 1; 579 spin_begin(); 580 while (secondary && !xmon_gate) { 581 if (in_xmon == 0) { 582 if (fromipi) { 583 spin_end(); 584 goto leave; 585 } 586 secondary = test_and_set_bit(0, &in_xmon); 587 } 588 spin_cpu_relax(); 589 touch_nmi_watchdog(); 590 } 591 spin_end(); 592 593 if (!secondary && !xmon_gate) { 594 /* we are the first cpu to come in */ 595 /* interrupt other cpu(s) */ 596 int ncpus = num_online_cpus(); 597 598 xmon_owner = cpu; 599 mb(); 600 if (ncpus > 1) { 601 /* 602 * A system reset (trap == 0x100) can be triggered on 603 * all CPUs, so when we come in via 0x100 try waiting 604 * for the other CPUs to come in before we send the 605 * debugger break (IPI). This is similar to 606 * crash_kexec_secondary(). 607 */ 608 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus)) 609 smp_send_debugger_break(); 610 611 wait_for_other_cpus(ncpus); 612 } 613 remove_bpts(); 614 disable_surveillance(); 615 616 if (!locked_down) { 617 /* for breakpoint or single step, print curr insn */ 618 if (bp || TRAP(regs) == 0xd00) 619 ppc_inst_dump(regs->nip, 1, 0); 620 printf("enter ? for help\n"); 621 } 622 623 mb(); 624 xmon_gate = 1; 625 barrier(); 626 touch_nmi_watchdog(); 627 } 628 629 cmdloop: 630 while (in_xmon) { 631 if (secondary) { 632 spin_begin(); 633 if (cpu == xmon_owner) { 634 if (!test_and_set_bit(0, &xmon_taken)) { 635 secondary = 0; 636 spin_end(); 637 continue; 638 } 639 /* missed it */ 640 while (cpu == xmon_owner) 641 spin_cpu_relax(); 642 } 643 spin_cpu_relax(); 644 touch_nmi_watchdog(); 645 } else { 646 if (!locked_down) 647 cmd = cmds(regs); 648 if (locked_down || cmd != 0) { 649 /* exiting xmon */ 650 insert_bpts(); 651 xmon_gate = 0; 652 wmb(); 653 in_xmon = 0; 654 break; 655 } 656 /* have switched to some other cpu */ 657 secondary = 1; 658 } 659 } 660 leave: 661 cpumask_clear_cpu(cpu, &cpus_in_xmon); 662 xmon_fault_jmp[cpu] = NULL; 663 #else 664 /* UP is simple... */ 665 if (in_xmon) { 666 printf("Exception %lx %s in xmon, returning to main loop\n", 667 regs->trap, getvecname(TRAP(regs))); 668 longjmp(xmon_fault_jmp[0], 1); 669 } 670 if (setjmp(recurse_jmp) == 0) { 671 xmon_fault_jmp[0] = recurse_jmp; 672 in_xmon = 1; 673 674 excprint(regs); 675 bp = at_breakpoint(regs->nip); 676 if (bp) { 677 printf("Stopped at breakpoint %tx (", BP_NUM(bp)); 678 xmon_print_symbol(regs->nip, " ", ")\n"); 679 } 680 if (unrecoverable_excp(regs)) 681 printf("WARNING: exception is not recoverable, " 682 "can't continue\n"); 683 remove_bpts(); 684 disable_surveillance(); 685 if (!locked_down) { 686 /* for breakpoint or single step, print current insn */ 687 if (bp || TRAP(regs) == 0xd00) 688 ppc_inst_dump(regs->nip, 1, 0); 689 printf("enter ? for help\n"); 690 } 691 } 692 693 if (!locked_down) 694 cmd = cmds(regs); 695 696 insert_bpts(); 697 in_xmon = 0; 698 #endif 699 700 #ifdef CONFIG_BOOKE 701 if (regs->msr & MSR_DE) { 702 bp = at_breakpoint(regs->nip); 703 if (bp != NULL) { 704 regs->nip = (unsigned long) &bp->instr[0]; 705 atomic_inc(&bp->ref_count); 706 } 707 } 708 #else 709 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 710 bp = at_breakpoint(regs->nip); 711 if (bp != NULL) { 712 int stepped = emulate_step(regs, ppc_inst_read(bp->instr)); 713 if (stepped == 0) { 714 regs->nip = (unsigned long) &bp->instr[0]; 715 atomic_inc(&bp->ref_count); 716 } else if (stepped < 0) { 717 printf("Couldn't single-step %s instruction\n", 718 IS_RFID(ppc_inst_read(bp->instr))? "rfid": "mtmsrd"); 719 } 720 } 721 } 722 #endif 723 if (locked_down) 724 clear_all_bpt(); 725 else 726 insert_cpu_bpts(); 727 728 xmon_touch_watchdogs(); 729 local_irq_restore(flags); 730 731 return cmd != 'X' && cmd != EOF; 732 } 733 734 int xmon(struct pt_regs *excp) 735 { 736 struct pt_regs regs; 737 738 if (excp == NULL) { 739 ppc_save_regs(®s); 740 excp = ®s; 741 } 742 743 return xmon_core(excp, 0); 744 } 745 EXPORT_SYMBOL(xmon); 746 747 irqreturn_t xmon_irq(int irq, void *d) 748 { 749 unsigned long flags; 750 local_irq_save(flags); 751 printf("Keyboard interrupt\n"); 752 xmon(get_irq_regs()); 753 local_irq_restore(flags); 754 return IRQ_HANDLED; 755 } 756 757 static int xmon_bpt(struct pt_regs *regs) 758 { 759 struct bpt *bp; 760 unsigned long offset; 761 762 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 763 return 0; 764 765 /* Are we at the trap at bp->instr[1] for some bp? */ 766 bp = in_breakpoint_table(regs->nip, &offset); 767 if (bp != NULL && (offset == 4 || offset == 8)) { 768 regs->nip = bp->address + offset; 769 atomic_dec(&bp->ref_count); 770 return 1; 771 } 772 773 /* Are we at a breakpoint? */ 774 bp = at_breakpoint(regs->nip); 775 if (!bp) 776 return 0; 777 778 xmon_core(regs, 0); 779 780 return 1; 781 } 782 783 static int xmon_sstep(struct pt_regs *regs) 784 { 785 if (user_mode(regs)) 786 return 0; 787 xmon_core(regs, 0); 788 return 1; 789 } 790 791 static int xmon_break_match(struct pt_regs *regs) 792 { 793 int i; 794 795 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 796 return 0; 797 for (i = 0; i < nr_wp_slots(); i++) { 798 if (dabr[i].enabled) 799 goto found; 800 } 801 return 0; 802 803 found: 804 xmon_core(regs, 0); 805 return 1; 806 } 807 808 static int xmon_iabr_match(struct pt_regs *regs) 809 { 810 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 811 return 0; 812 if (iabr == NULL) 813 return 0; 814 xmon_core(regs, 0); 815 return 1; 816 } 817 818 static int xmon_ipi(struct pt_regs *regs) 819 { 820 #ifdef CONFIG_SMP 821 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon)) 822 xmon_core(regs, 1); 823 #endif 824 return 0; 825 } 826 827 static int xmon_fault_handler(struct pt_regs *regs) 828 { 829 struct bpt *bp; 830 unsigned long offset; 831 832 if (in_xmon && catch_memory_errors) 833 handle_fault(regs); /* doesn't return */ 834 835 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 836 bp = in_breakpoint_table(regs->nip, &offset); 837 if (bp != NULL) { 838 regs->nip = bp->address + offset; 839 atomic_dec(&bp->ref_count); 840 } 841 } 842 843 return 0; 844 } 845 846 /* Force enable xmon if not already enabled */ 847 static inline void force_enable_xmon(void) 848 { 849 /* Enable xmon hooks if needed */ 850 if (!xmon_on) { 851 printf("xmon: Enabling debugger hooks\n"); 852 xmon_on = 1; 853 } 854 } 855 856 static struct bpt *at_breakpoint(unsigned long pc) 857 { 858 int i; 859 struct bpt *bp; 860 861 bp = bpts; 862 for (i = 0; i < NBPTS; ++i, ++bp) 863 if (bp->enabled && pc == bp->address) 864 return bp; 865 return NULL; 866 } 867 868 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp) 869 { 870 unsigned long off; 871 872 off = nip - (unsigned long)bpt_table; 873 if (off >= sizeof(bpt_table)) 874 return NULL; 875 *offp = off & (BPT_SIZE - 1); 876 if (off & 3) 877 return NULL; 878 return bpts + (off / BPT_SIZE); 879 } 880 881 static struct bpt *new_breakpoint(unsigned long a) 882 { 883 struct bpt *bp; 884 885 a &= ~3UL; 886 bp = at_breakpoint(a); 887 if (bp) 888 return bp; 889 890 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 891 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) { 892 bp->address = a; 893 bp->instr = (void *)(bpt_table + ((bp - bpts) * BPT_WORDS)); 894 return bp; 895 } 896 } 897 898 printf("Sorry, no free breakpoints. Please clear one first.\n"); 899 return NULL; 900 } 901 902 static void insert_bpts(void) 903 { 904 int i; 905 struct ppc_inst instr, instr2; 906 struct bpt *bp, *bp2; 907 908 bp = bpts; 909 for (i = 0; i < NBPTS; ++i, ++bp) { 910 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0) 911 continue; 912 if (!mread_instr(bp->address, &instr)) { 913 printf("Couldn't read instruction at %lx, " 914 "disabling breakpoint there\n", bp->address); 915 bp->enabled = 0; 916 continue; 917 } 918 if (IS_MTMSRD(instr) || IS_RFID(instr)) { 919 printf("Breakpoint at %lx is on an mtmsrd or rfid " 920 "instruction, disabling it\n", bp->address); 921 bp->enabled = 0; 922 continue; 923 } 924 /* 925 * Check the address is not a suffix by looking for a prefix in 926 * front of it. 927 */ 928 if (mread_instr(bp->address - 4, &instr2) == 8) { 929 printf("Breakpoint at %lx is on the second word of a prefixed instruction, disabling it\n", 930 bp->address); 931 bp->enabled = 0; 932 continue; 933 } 934 /* 935 * We might still be a suffix - if the prefix has already been 936 * replaced by a breakpoint we won't catch it with the above 937 * test. 938 */ 939 bp2 = at_breakpoint(bp->address - 4); 940 if (bp2 && ppc_inst_prefixed(ppc_inst_read(bp2->instr))) { 941 printf("Breakpoint at %lx is on the second word of a prefixed instruction, disabling it\n", 942 bp->address); 943 bp->enabled = 0; 944 continue; 945 } 946 947 patch_instruction(bp->instr, instr); 948 patch_instruction(ppc_inst_next(bp->instr, &instr), 949 ppc_inst(bpinstr)); 950 if (bp->enabled & BP_CIABR) 951 continue; 952 if (patch_instruction((struct ppc_inst *)bp->address, 953 ppc_inst(bpinstr)) != 0) { 954 printf("Couldn't write instruction at %lx, " 955 "disabling breakpoint there\n", bp->address); 956 bp->enabled &= ~BP_TRAP; 957 continue; 958 } 959 } 960 } 961 962 static void insert_cpu_bpts(void) 963 { 964 int i; 965 struct arch_hw_breakpoint brk; 966 967 for (i = 0; i < nr_wp_slots(); i++) { 968 if (dabr[i].enabled) { 969 brk.address = dabr[i].address; 970 brk.type = (dabr[i].enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL; 971 brk.len = 8; 972 brk.hw_len = 8; 973 __set_breakpoint(i, &brk); 974 } 975 } 976 977 if (iabr) 978 set_ciabr(iabr->address); 979 } 980 981 static void remove_bpts(void) 982 { 983 int i; 984 struct bpt *bp; 985 struct ppc_inst instr; 986 987 bp = bpts; 988 for (i = 0; i < NBPTS; ++i, ++bp) { 989 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) 990 continue; 991 if (mread_instr(bp->address, &instr) 992 && ppc_inst_equal(instr, ppc_inst(bpinstr)) 993 && patch_instruction( 994 (struct ppc_inst *)bp->address, ppc_inst_read(bp->instr)) != 0) 995 printf("Couldn't remove breakpoint at %lx\n", 996 bp->address); 997 } 998 } 999 1000 static void remove_cpu_bpts(void) 1001 { 1002 hw_breakpoint_disable(); 1003 write_ciabr(0); 1004 } 1005 1006 /* Based on uptime_proc_show(). */ 1007 static void 1008 show_uptime(void) 1009 { 1010 struct timespec64 uptime; 1011 1012 if (setjmp(bus_error_jmp) == 0) { 1013 catch_memory_errors = 1; 1014 sync(); 1015 1016 ktime_get_coarse_boottime_ts64(&uptime); 1017 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec, 1018 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100))); 1019 1020 sync(); 1021 __delay(200); \ 1022 } 1023 catch_memory_errors = 0; 1024 } 1025 1026 static void set_lpp_cmd(void) 1027 { 1028 unsigned long lpp; 1029 1030 if (!scanhex(&lpp)) { 1031 printf("Invalid number.\n"); 1032 lpp = 0; 1033 } 1034 xmon_set_pagination_lpp(lpp); 1035 } 1036 /* Command interpreting routine */ 1037 static char *last_cmd; 1038 1039 static int 1040 cmds(struct pt_regs *excp) 1041 { 1042 int cmd = 0; 1043 1044 last_cmd = NULL; 1045 xmon_regs = excp; 1046 1047 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1048 1049 for(;;) { 1050 #ifdef CONFIG_SMP 1051 printf("%x:", smp_processor_id()); 1052 #endif /* CONFIG_SMP */ 1053 printf("mon> "); 1054 flush_input(); 1055 termch = 0; 1056 cmd = skipbl(); 1057 if( cmd == '\n' ) { 1058 if (last_cmd == NULL) 1059 continue; 1060 take_input(last_cmd); 1061 last_cmd = NULL; 1062 cmd = inchar(); 1063 } 1064 switch (cmd) { 1065 case 'm': 1066 cmd = inchar(); 1067 switch (cmd) { 1068 case 'm': 1069 case 's': 1070 case 'd': 1071 memops(cmd); 1072 break; 1073 case 'l': 1074 memlocate(); 1075 break; 1076 case 'z': 1077 if (xmon_is_ro) { 1078 printf(xmon_ro_msg); 1079 break; 1080 } 1081 memzcan(); 1082 break; 1083 case 'i': 1084 show_mem(0, NULL); 1085 break; 1086 default: 1087 termch = cmd; 1088 memex(); 1089 } 1090 break; 1091 case 'd': 1092 dump(); 1093 break; 1094 case 'l': 1095 symbol_lookup(); 1096 break; 1097 case 'r': 1098 prregs(excp); /* print regs */ 1099 break; 1100 case 'e': 1101 excprint(excp); 1102 break; 1103 case 'S': 1104 super_regs(); 1105 break; 1106 case 't': 1107 backtrace(excp); 1108 break; 1109 case 'f': 1110 cacheflush(); 1111 break; 1112 case 's': 1113 if (do_spu_cmd() == 0) 1114 break; 1115 if (do_step(excp)) 1116 return cmd; 1117 break; 1118 case 'x': 1119 case 'X': 1120 if (tracing_enabled) 1121 tracing_on(); 1122 return cmd; 1123 case EOF: 1124 printf(" <no input ...>\n"); 1125 mdelay(2000); 1126 return cmd; 1127 case '?': 1128 xmon_puts(help_string); 1129 break; 1130 case '#': 1131 set_lpp_cmd(); 1132 break; 1133 case 'b': 1134 bpt_cmds(); 1135 break; 1136 case 'C': 1137 csum(); 1138 break; 1139 case 'c': 1140 if (cpu_cmd()) 1141 return 0; 1142 break; 1143 case 'z': 1144 bootcmds(); 1145 break; 1146 case 'p': 1147 if (xmon_is_ro) { 1148 printf(xmon_ro_msg); 1149 break; 1150 } 1151 proccall(); 1152 break; 1153 case 'P': 1154 show_tasks(); 1155 break; 1156 #ifdef CONFIG_PPC_BOOK3S 1157 case 'u': 1158 dump_segments(); 1159 break; 1160 #elif defined(CONFIG_44x) 1161 case 'u': 1162 dump_tlb_44x(); 1163 break; 1164 #elif defined(CONFIG_PPC_BOOK3E) 1165 case 'u': 1166 dump_tlb_book3e(); 1167 break; 1168 #endif 1169 case 'U': 1170 show_uptime(); 1171 break; 1172 default: 1173 printf("Unrecognized command: "); 1174 do { 1175 if (' ' < cmd && cmd <= '~') 1176 putchar(cmd); 1177 else 1178 printf("\\x%x", cmd); 1179 cmd = inchar(); 1180 } while (cmd != '\n'); 1181 printf(" (type ? for help)\n"); 1182 break; 1183 } 1184 } 1185 } 1186 1187 #ifdef CONFIG_BOOKE 1188 static int do_step(struct pt_regs *regs) 1189 { 1190 regs->msr |= MSR_DE; 1191 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 1192 return 1; 1193 } 1194 #else 1195 /* 1196 * Step a single instruction. 1197 * Some instructions we emulate, others we execute with MSR_SE set. 1198 */ 1199 static int do_step(struct pt_regs *regs) 1200 { 1201 struct ppc_inst instr; 1202 int stepped; 1203 1204 force_enable_xmon(); 1205 /* check we are in 64-bit kernel mode, translation enabled */ 1206 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { 1207 if (mread_instr(regs->nip, &instr)) { 1208 stepped = emulate_step(regs, instr); 1209 if (stepped < 0) { 1210 printf("Couldn't single-step %s instruction\n", 1211 (IS_RFID(instr)? "rfid": "mtmsrd")); 1212 return 0; 1213 } 1214 if (stepped > 0) { 1215 set_trap(regs, 0xd00); 1216 printf("stepped to "); 1217 xmon_print_symbol(regs->nip, " ", "\n"); 1218 ppc_inst_dump(regs->nip, 1, 0); 1219 return 0; 1220 } 1221 } 1222 } 1223 regs->msr |= MSR_SE; 1224 return 1; 1225 } 1226 #endif 1227 1228 static void bootcmds(void) 1229 { 1230 char tmp[64]; 1231 int cmd; 1232 1233 cmd = inchar(); 1234 if (cmd == 'r') { 1235 getstring(tmp, 64); 1236 ppc_md.restart(tmp); 1237 } else if (cmd == 'h') { 1238 ppc_md.halt(); 1239 } else if (cmd == 'p') { 1240 if (pm_power_off) 1241 pm_power_off(); 1242 } 1243 } 1244 1245 static int cpu_cmd(void) 1246 { 1247 #ifdef CONFIG_SMP 1248 unsigned long cpu, first_cpu, last_cpu; 1249 int timeout; 1250 1251 if (!scanhex(&cpu)) { 1252 /* print cpus waiting or in xmon */ 1253 printf("cpus stopped:"); 1254 last_cpu = first_cpu = NR_CPUS; 1255 for_each_possible_cpu(cpu) { 1256 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1257 if (cpu == last_cpu + 1) { 1258 last_cpu = cpu; 1259 } else { 1260 if (last_cpu != first_cpu) 1261 printf("-0x%lx", last_cpu); 1262 last_cpu = first_cpu = cpu; 1263 printf(" 0x%lx", cpu); 1264 } 1265 } 1266 } 1267 if (last_cpu != first_cpu) 1268 printf("-0x%lx", last_cpu); 1269 printf("\n"); 1270 return 0; 1271 } 1272 /* try to switch to cpu specified */ 1273 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1274 printf("cpu 0x%lx isn't in xmon\n", cpu); 1275 #ifdef CONFIG_PPC64 1276 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu); 1277 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0); 1278 #endif 1279 return 0; 1280 } 1281 xmon_taken = 0; 1282 mb(); 1283 xmon_owner = cpu; 1284 timeout = 10000000; 1285 while (!xmon_taken) { 1286 if (--timeout == 0) { 1287 if (test_and_set_bit(0, &xmon_taken)) 1288 break; 1289 /* take control back */ 1290 mb(); 1291 xmon_owner = smp_processor_id(); 1292 printf("cpu 0x%lx didn't take control\n", cpu); 1293 return 0; 1294 } 1295 barrier(); 1296 } 1297 return 1; 1298 #else 1299 return 0; 1300 #endif /* CONFIG_SMP */ 1301 } 1302 1303 static unsigned short fcstab[256] = { 1304 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 1305 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, 1306 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 1307 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, 1308 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, 1309 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, 1310 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, 1311 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, 1312 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, 1313 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, 1314 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, 1315 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, 1316 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, 1317 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, 1318 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, 1319 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, 1320 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, 1321 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, 1322 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, 1323 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, 1324 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, 1325 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, 1326 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, 1327 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, 1328 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, 1329 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, 1330 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, 1331 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, 1332 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, 1333 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, 1334 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, 1335 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 1336 }; 1337 1338 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) 1339 1340 static void 1341 csum(void) 1342 { 1343 unsigned int i; 1344 unsigned short fcs; 1345 unsigned char v; 1346 1347 if (!scanhex(&adrs)) 1348 return; 1349 if (!scanhex(&ncsum)) 1350 return; 1351 fcs = 0xffff; 1352 for (i = 0; i < ncsum; ++i) { 1353 if (mread(adrs+i, &v, 1) == 0) { 1354 printf("csum stopped at "REG"\n", adrs+i); 1355 break; 1356 } 1357 fcs = FCS(fcs, v); 1358 } 1359 printf("%x\n", fcs); 1360 } 1361 1362 /* 1363 * Check if this is a suitable place to put a breakpoint. 1364 */ 1365 static long check_bp_loc(unsigned long addr) 1366 { 1367 struct ppc_inst instr; 1368 1369 addr &= ~3; 1370 if (!is_kernel_addr(addr)) { 1371 printf("Breakpoints may only be placed at kernel addresses\n"); 1372 return 0; 1373 } 1374 if (!mread_instr(addr, &instr)) { 1375 printf("Can't read instruction at address %lx\n", addr); 1376 return 0; 1377 } 1378 if (IS_MTMSRD(instr) || IS_RFID(instr)) { 1379 printf("Breakpoints may not be placed on mtmsrd or rfid " 1380 "instructions\n"); 1381 return 0; 1382 } 1383 return 1; 1384 } 1385 1386 static int find_free_data_bpt(void) 1387 { 1388 int i; 1389 1390 for (i = 0; i < nr_wp_slots(); i++) { 1391 if (!dabr[i].enabled) 1392 return i; 1393 } 1394 printf("Couldn't find free breakpoint register\n"); 1395 return -1; 1396 } 1397 1398 static void print_data_bpts(void) 1399 { 1400 int i; 1401 1402 for (i = 0; i < nr_wp_slots(); i++) { 1403 if (!dabr[i].enabled) 1404 continue; 1405 1406 printf(" data "REG" [", dabr[i].address); 1407 if (dabr[i].enabled & 1) 1408 printf("r"); 1409 if (dabr[i].enabled & 2) 1410 printf("w"); 1411 printf("]\n"); 1412 } 1413 } 1414 1415 static char *breakpoint_help_string = 1416 "Breakpoint command usage:\n" 1417 "b show breakpoints\n" 1418 "b <addr> [cnt] set breakpoint at given instr addr\n" 1419 "bc clear all breakpoints\n" 1420 "bc <n/addr> clear breakpoint number n or at addr\n" 1421 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n" 1422 "bd <addr> [cnt] set hardware data breakpoint\n" 1423 ""; 1424 1425 static void 1426 bpt_cmds(void) 1427 { 1428 int cmd; 1429 unsigned long a; 1430 int i; 1431 struct bpt *bp; 1432 1433 cmd = inchar(); 1434 1435 switch (cmd) { 1436 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n"; 1437 int mode; 1438 case 'd': /* bd - hardware data breakpoint */ 1439 if (xmon_is_ro) { 1440 printf(xmon_ro_msg); 1441 break; 1442 } 1443 if (!ppc_breakpoint_available()) { 1444 printf("Hardware data breakpoint not supported on this cpu\n"); 1445 break; 1446 } 1447 i = find_free_data_bpt(); 1448 if (i < 0) 1449 break; 1450 mode = 7; 1451 cmd = inchar(); 1452 if (cmd == 'r') 1453 mode = 5; 1454 else if (cmd == 'w') 1455 mode = 6; 1456 else 1457 termch = cmd; 1458 dabr[i].address = 0; 1459 dabr[i].enabled = 0; 1460 if (scanhex(&dabr[i].address)) { 1461 if (!is_kernel_addr(dabr[i].address)) { 1462 printf(badaddr); 1463 break; 1464 } 1465 dabr[i].address &= ~HW_BRK_TYPE_DABR; 1466 dabr[i].enabled = mode | BP_DABR; 1467 } 1468 1469 force_enable_xmon(); 1470 break; 1471 1472 case 'i': /* bi - hardware instr breakpoint */ 1473 if (xmon_is_ro) { 1474 printf(xmon_ro_msg); 1475 break; 1476 } 1477 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) { 1478 printf("Hardware instruction breakpoint " 1479 "not supported on this cpu\n"); 1480 break; 1481 } 1482 if (iabr) { 1483 iabr->enabled &= ~BP_CIABR; 1484 iabr = NULL; 1485 } 1486 if (!scanhex(&a)) 1487 break; 1488 if (!check_bp_loc(a)) 1489 break; 1490 bp = new_breakpoint(a); 1491 if (bp != NULL) { 1492 bp->enabled |= BP_CIABR; 1493 iabr = bp; 1494 force_enable_xmon(); 1495 } 1496 break; 1497 1498 case 'c': 1499 if (!scanhex(&a)) { 1500 /* clear all breakpoints */ 1501 for (i = 0; i < NBPTS; ++i) 1502 bpts[i].enabled = 0; 1503 iabr = NULL; 1504 for (i = 0; i < nr_wp_slots(); i++) 1505 dabr[i].enabled = 0; 1506 1507 printf("All breakpoints cleared\n"); 1508 break; 1509 } 1510 1511 if (a <= NBPTS && a >= 1) { 1512 /* assume a breakpoint number */ 1513 bp = &bpts[a-1]; /* bp nums are 1 based */ 1514 } else { 1515 /* assume a breakpoint address */ 1516 bp = at_breakpoint(a); 1517 if (bp == NULL) { 1518 printf("No breakpoint at %lx\n", a); 1519 break; 1520 } 1521 } 1522 1523 printf("Cleared breakpoint %tx (", BP_NUM(bp)); 1524 xmon_print_symbol(bp->address, " ", ")\n"); 1525 bp->enabled = 0; 1526 break; 1527 1528 default: 1529 termch = cmd; 1530 cmd = skipbl(); 1531 if (cmd == '?') { 1532 printf(breakpoint_help_string); 1533 break; 1534 } 1535 termch = cmd; 1536 1537 if (xmon_is_ro || !scanhex(&a)) { 1538 /* print all breakpoints */ 1539 printf(" type address\n"); 1540 print_data_bpts(); 1541 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 1542 if (!bp->enabled) 1543 continue; 1544 printf("%tx %s ", BP_NUM(bp), 1545 (bp->enabled & BP_CIABR) ? "inst": "trap"); 1546 xmon_print_symbol(bp->address, " ", "\n"); 1547 } 1548 break; 1549 } 1550 1551 if (!check_bp_loc(a)) 1552 break; 1553 bp = new_breakpoint(a); 1554 if (bp != NULL) { 1555 bp->enabled |= BP_TRAP; 1556 force_enable_xmon(); 1557 } 1558 break; 1559 } 1560 } 1561 1562 /* Very cheap human name for vector lookup. */ 1563 static 1564 const char *getvecname(unsigned long vec) 1565 { 1566 char *ret; 1567 1568 switch (vec) { 1569 case 0x100: ret = "(System Reset)"; break; 1570 case 0x200: ret = "(Machine Check)"; break; 1571 case 0x300: ret = "(Data Access)"; break; 1572 case 0x380: 1573 if (radix_enabled()) 1574 ret = "(Data Access Out of Range)"; 1575 else 1576 ret = "(Data SLB Access)"; 1577 break; 1578 case 0x400: ret = "(Instruction Access)"; break; 1579 case 0x480: 1580 if (radix_enabled()) 1581 ret = "(Instruction Access Out of Range)"; 1582 else 1583 ret = "(Instruction SLB Access)"; 1584 break; 1585 case 0x500: ret = "(Hardware Interrupt)"; break; 1586 case 0x600: ret = "(Alignment)"; break; 1587 case 0x700: ret = "(Program Check)"; break; 1588 case 0x800: ret = "(FPU Unavailable)"; break; 1589 case 0x900: ret = "(Decrementer)"; break; 1590 case 0x980: ret = "(Hypervisor Decrementer)"; break; 1591 case 0xa00: ret = "(Doorbell)"; break; 1592 case 0xc00: ret = "(System Call)"; break; 1593 case 0xd00: ret = "(Single Step)"; break; 1594 case 0xe40: ret = "(Emulation Assist)"; break; 1595 case 0xe60: ret = "(HMI)"; break; 1596 case 0xe80: ret = "(Hypervisor Doorbell)"; break; 1597 case 0xf00: ret = "(Performance Monitor)"; break; 1598 case 0xf20: ret = "(Altivec Unavailable)"; break; 1599 case 0x1300: ret = "(Instruction Breakpoint)"; break; 1600 case 0x1500: ret = "(Denormalisation)"; break; 1601 case 0x1700: ret = "(Altivec Assist)"; break; 1602 case 0x3000: ret = "(System Call Vectored)"; break; 1603 default: ret = ""; 1604 } 1605 return ret; 1606 } 1607 1608 static void get_function_bounds(unsigned long pc, unsigned long *startp, 1609 unsigned long *endp) 1610 { 1611 unsigned long size, offset; 1612 const char *name; 1613 1614 *startp = *endp = 0; 1615 if (pc == 0) 1616 return; 1617 if (setjmp(bus_error_jmp) == 0) { 1618 catch_memory_errors = 1; 1619 sync(); 1620 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr); 1621 if (name != NULL) { 1622 *startp = pc - offset; 1623 *endp = pc - offset + size; 1624 } 1625 sync(); 1626 } 1627 catch_memory_errors = 0; 1628 } 1629 1630 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long)) 1631 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long)) 1632 1633 static void xmon_show_stack(unsigned long sp, unsigned long lr, 1634 unsigned long pc) 1635 { 1636 int max_to_print = 64; 1637 unsigned long ip; 1638 unsigned long newsp; 1639 unsigned long marker; 1640 struct pt_regs regs; 1641 1642 while (max_to_print--) { 1643 if (!is_kernel_addr(sp)) { 1644 if (sp != 0) 1645 printf("SP (%lx) is in userspace\n", sp); 1646 break; 1647 } 1648 1649 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long)) 1650 || !mread(sp, &newsp, sizeof(unsigned long))) { 1651 printf("Couldn't read stack frame at %lx\n", sp); 1652 break; 1653 } 1654 1655 /* 1656 * For the first stack frame, try to work out if 1657 * LR and/or the saved LR value in the bottommost 1658 * stack frame are valid. 1659 */ 1660 if ((pc | lr) != 0) { 1661 unsigned long fnstart, fnend; 1662 unsigned long nextip; 1663 int printip = 1; 1664 1665 get_function_bounds(pc, &fnstart, &fnend); 1666 nextip = 0; 1667 if (newsp > sp) 1668 mread(newsp + LRSAVE_OFFSET, &nextip, 1669 sizeof(unsigned long)); 1670 if (lr == ip) { 1671 if (!is_kernel_addr(lr) 1672 || (fnstart <= lr && lr < fnend)) 1673 printip = 0; 1674 } else if (lr == nextip) { 1675 printip = 0; 1676 } else if (is_kernel_addr(lr) 1677 && !(fnstart <= lr && lr < fnend)) { 1678 printf("[link register ] "); 1679 xmon_print_symbol(lr, " ", "\n"); 1680 } 1681 if (printip) { 1682 printf("["REG"] ", sp); 1683 xmon_print_symbol(ip, " ", " (unreliable)\n"); 1684 } 1685 pc = lr = 0; 1686 1687 } else { 1688 printf("["REG"] ", sp); 1689 xmon_print_symbol(ip, " ", "\n"); 1690 } 1691 1692 /* Look for "regshere" marker to see if this is 1693 an exception frame. */ 1694 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long)) 1695 && marker == STACK_FRAME_REGS_MARKER) { 1696 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs)) 1697 != sizeof(regs)) { 1698 printf("Couldn't read registers at %lx\n", 1699 sp + STACK_FRAME_OVERHEAD); 1700 break; 1701 } 1702 printf("--- Exception: %lx %s at ", regs.trap, 1703 getvecname(TRAP(®s))); 1704 pc = regs.nip; 1705 lr = regs.link; 1706 xmon_print_symbol(pc, " ", "\n"); 1707 } 1708 1709 if (newsp == 0) 1710 break; 1711 1712 sp = newsp; 1713 } 1714 } 1715 1716 static void backtrace(struct pt_regs *excp) 1717 { 1718 unsigned long sp; 1719 1720 if (scanhex(&sp)) 1721 xmon_show_stack(sp, 0, 0); 1722 else 1723 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1724 scannl(); 1725 } 1726 1727 static void print_bug_trap(struct pt_regs *regs) 1728 { 1729 #ifdef CONFIG_BUG 1730 const struct bug_entry *bug; 1731 unsigned long addr; 1732 1733 if (regs->msr & MSR_PR) 1734 return; /* not in kernel */ 1735 addr = regs->nip; /* address of trap instruction */ 1736 if (!is_kernel_addr(addr)) 1737 return; 1738 bug = find_bug(regs->nip); 1739 if (bug == NULL) 1740 return; 1741 if (is_warning_bug(bug)) 1742 return; 1743 1744 #ifdef CONFIG_DEBUG_BUGVERBOSE 1745 printf("kernel BUG at %s:%u!\n", 1746 (char *)bug + bug->file_disp, bug->line); 1747 #else 1748 printf("kernel BUG at %px!\n", (void *)bug + bug->bug_addr_disp); 1749 #endif 1750 #endif /* CONFIG_BUG */ 1751 } 1752 1753 static void excprint(struct pt_regs *fp) 1754 { 1755 unsigned long trap; 1756 1757 #ifdef CONFIG_SMP 1758 printf("cpu 0x%x: ", smp_processor_id()); 1759 #endif /* CONFIG_SMP */ 1760 1761 trap = TRAP(fp); 1762 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp); 1763 printf(" pc: "); 1764 xmon_print_symbol(fp->nip, ": ", "\n"); 1765 1766 printf(" lr: "); 1767 xmon_print_symbol(fp->link, ": ", "\n"); 1768 1769 printf(" sp: %lx\n", fp->gpr[1]); 1770 printf(" msr: %lx\n", fp->msr); 1771 1772 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) { 1773 printf(" dar: %lx\n", fp->dar); 1774 if (trap != 0x380) 1775 printf(" dsisr: %lx\n", fp->dsisr); 1776 } 1777 1778 printf(" current = 0x%px\n", current); 1779 #ifdef CONFIG_PPC64 1780 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n", 1781 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened); 1782 #endif 1783 if (current) { 1784 printf(" pid = %d, comm = %s\n", 1785 current->pid, current->comm); 1786 } 1787 1788 if (trap == 0x700) 1789 print_bug_trap(fp); 1790 1791 printf(linux_banner); 1792 } 1793 1794 static void prregs(struct pt_regs *fp) 1795 { 1796 int n, trap; 1797 unsigned long base; 1798 struct pt_regs regs; 1799 1800 if (scanhex(&base)) { 1801 if (setjmp(bus_error_jmp) == 0) { 1802 catch_memory_errors = 1; 1803 sync(); 1804 regs = *(struct pt_regs *)base; 1805 sync(); 1806 __delay(200); 1807 } else { 1808 catch_memory_errors = 0; 1809 printf("*** Error reading registers from "REG"\n", 1810 base); 1811 return; 1812 } 1813 catch_memory_errors = 0; 1814 fp = ®s; 1815 } 1816 1817 #ifdef CONFIG_PPC64 1818 if (FULL_REGS(fp)) { 1819 for (n = 0; n < 16; ++n) 1820 printf("R%.2d = "REG" R%.2d = "REG"\n", 1821 n, fp->gpr[n], n+16, fp->gpr[n+16]); 1822 } else { 1823 for (n = 0; n < 7; ++n) 1824 printf("R%.2d = "REG" R%.2d = "REG"\n", 1825 n, fp->gpr[n], n+7, fp->gpr[n+7]); 1826 } 1827 #else 1828 for (n = 0; n < 32; ++n) { 1829 printf("R%.2d = %.8lx%s", n, fp->gpr[n], 1830 (n & 3) == 3? "\n": " "); 1831 if (n == 12 && !FULL_REGS(fp)) { 1832 printf("\n"); 1833 break; 1834 } 1835 } 1836 #endif 1837 printf("pc = "); 1838 xmon_print_symbol(fp->nip, " ", "\n"); 1839 if (!trap_is_syscall(fp) && cpu_has_feature(CPU_FTR_CFAR)) { 1840 printf("cfar= "); 1841 xmon_print_symbol(fp->orig_gpr3, " ", "\n"); 1842 } 1843 printf("lr = "); 1844 xmon_print_symbol(fp->link, " ", "\n"); 1845 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr); 1846 printf("ctr = "REG" xer = "REG" trap = %4lx\n", 1847 fp->ctr, fp->xer, fp->trap); 1848 trap = TRAP(fp); 1849 if (trap == 0x300 || trap == 0x380 || trap == 0x600) 1850 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); 1851 } 1852 1853 static void cacheflush(void) 1854 { 1855 int cmd; 1856 unsigned long nflush; 1857 1858 cmd = inchar(); 1859 if (cmd != 'i') 1860 termch = cmd; 1861 scanhex((void *)&adrs); 1862 if (termch != '\n') 1863 termch = 0; 1864 nflush = 1; 1865 scanhex(&nflush); 1866 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES; 1867 if (setjmp(bus_error_jmp) == 0) { 1868 catch_memory_errors = 1; 1869 sync(); 1870 1871 if (cmd != 'i' || IS_ENABLED(CONFIG_PPC_BOOK3S_64)) { 1872 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1873 cflush((void *) adrs); 1874 } else { 1875 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1876 cinval((void *) adrs); 1877 } 1878 sync(); 1879 /* wait a little while to see if we get a machine check */ 1880 __delay(200); 1881 } 1882 catch_memory_errors = 0; 1883 } 1884 1885 extern unsigned long xmon_mfspr(int spr, unsigned long default_value); 1886 extern void xmon_mtspr(int spr, unsigned long value); 1887 1888 static int 1889 read_spr(int n, unsigned long *vp) 1890 { 1891 unsigned long ret = -1UL; 1892 int ok = 0; 1893 1894 if (setjmp(bus_error_jmp) == 0) { 1895 catch_spr_faults = 1; 1896 sync(); 1897 1898 ret = xmon_mfspr(n, *vp); 1899 1900 sync(); 1901 *vp = ret; 1902 ok = 1; 1903 } 1904 catch_spr_faults = 0; 1905 1906 return ok; 1907 } 1908 1909 static void 1910 write_spr(int n, unsigned long val) 1911 { 1912 if (xmon_is_ro) { 1913 printf(xmon_ro_msg); 1914 return; 1915 } 1916 1917 if (setjmp(bus_error_jmp) == 0) { 1918 catch_spr_faults = 1; 1919 sync(); 1920 1921 xmon_mtspr(n, val); 1922 1923 sync(); 1924 } else { 1925 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n); 1926 } 1927 catch_spr_faults = 0; 1928 } 1929 1930 static void dump_206_sprs(void) 1931 { 1932 #ifdef CONFIG_PPC64 1933 if (!cpu_has_feature(CPU_FTR_ARCH_206)) 1934 return; 1935 1936 /* Actually some of these pre-date 2.06, but whatevs */ 1937 1938 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n", 1939 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR)); 1940 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n", 1941 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR)); 1942 printf("amr = %.16lx uamor = %.16lx\n", 1943 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR)); 1944 1945 if (!(mfmsr() & MSR_HV)) 1946 return; 1947 1948 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n", 1949 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR)); 1950 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n", 1951 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC)); 1952 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n", 1953 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID)); 1954 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n", 1955 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR)); 1956 printf("dabr = %.16lx dabrx = %.16lx\n", 1957 mfspr(SPRN_DABR), mfspr(SPRN_DABRX)); 1958 #endif 1959 } 1960 1961 static void dump_207_sprs(void) 1962 { 1963 #ifdef CONFIG_PPC64 1964 unsigned long msr; 1965 1966 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1967 return; 1968 1969 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n", 1970 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR)); 1971 1972 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n", 1973 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB)); 1974 1975 msr = mfmsr(); 1976 if (msr & MSR_TM) { 1977 /* Only if TM has been enabled in the kernel */ 1978 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n", 1979 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR), 1980 mfspr(SPRN_TEXASR)); 1981 } 1982 1983 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n", 1984 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2)); 1985 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n", 1986 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), 1987 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4)); 1988 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n", 1989 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5)); 1990 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n", 1991 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6)); 1992 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n", 1993 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR)); 1994 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR)); 1995 1996 if (!(msr & MSR_HV)) 1997 return; 1998 1999 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n", 2000 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR)); 2001 printf("dawr0 = %.16lx dawrx0 = %.16lx\n", 2002 mfspr(SPRN_DAWR0), mfspr(SPRN_DAWRX0)); 2003 if (nr_wp_slots() > 1) { 2004 printf("dawr1 = %.16lx dawrx1 = %.16lx\n", 2005 mfspr(SPRN_DAWR1), mfspr(SPRN_DAWRX1)); 2006 } 2007 printf("ciabr = %.16lx\n", mfspr(SPRN_CIABR)); 2008 #endif 2009 } 2010 2011 static void dump_300_sprs(void) 2012 { 2013 #ifdef CONFIG_PPC64 2014 bool hv = mfmsr() & MSR_HV; 2015 2016 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 2017 return; 2018 2019 printf("pidr = %.16lx tidr = %.16lx\n", 2020 mfspr(SPRN_PID), mfspr(SPRN_TIDR)); 2021 printf("psscr = %.16lx\n", 2022 hv ? mfspr(SPRN_PSSCR) : mfspr(SPRN_PSSCR_PR)); 2023 2024 if (!hv) 2025 return; 2026 2027 printf("ptcr = %.16lx asdr = %.16lx\n", 2028 mfspr(SPRN_PTCR), mfspr(SPRN_ASDR)); 2029 #endif 2030 } 2031 2032 static void dump_310_sprs(void) 2033 { 2034 #ifdef CONFIG_PPC64 2035 if (!cpu_has_feature(CPU_FTR_ARCH_31)) 2036 return; 2037 2038 printf("mmcr3 = %.16lx, sier2 = %.16lx, sier3 = %.16lx\n", 2039 mfspr(SPRN_MMCR3), mfspr(SPRN_SIER2), mfspr(SPRN_SIER3)); 2040 2041 #endif 2042 } 2043 2044 static void dump_one_spr(int spr, bool show_unimplemented) 2045 { 2046 unsigned long val; 2047 2048 val = 0xdeadbeef; 2049 if (!read_spr(spr, &val)) { 2050 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 2051 return; 2052 } 2053 2054 if (val == 0xdeadbeef) { 2055 /* Looks like read was a nop, confirm */ 2056 val = 0x0badcafe; 2057 if (!read_spr(spr, &val)) { 2058 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 2059 return; 2060 } 2061 2062 if (val == 0x0badcafe) { 2063 if (show_unimplemented) 2064 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr); 2065 return; 2066 } 2067 } 2068 2069 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val); 2070 } 2071 2072 static void super_regs(void) 2073 { 2074 static unsigned long regno; 2075 int cmd; 2076 int spr; 2077 2078 cmd = skipbl(); 2079 2080 switch (cmd) { 2081 case '\n': { 2082 unsigned long sp, toc; 2083 asm("mr %0,1" : "=r" (sp) :); 2084 asm("mr %0,2" : "=r" (toc) :); 2085 2086 printf("msr = "REG" sprg0 = "REG"\n", 2087 mfmsr(), mfspr(SPRN_SPRG0)); 2088 printf("pvr = "REG" sprg1 = "REG"\n", 2089 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); 2090 printf("dec = "REG" sprg2 = "REG"\n", 2091 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); 2092 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3)); 2093 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR)); 2094 2095 dump_206_sprs(); 2096 dump_207_sprs(); 2097 dump_300_sprs(); 2098 dump_310_sprs(); 2099 2100 return; 2101 } 2102 case 'w': { 2103 unsigned long val; 2104 scanhex(®no); 2105 val = 0; 2106 read_spr(regno, &val); 2107 scanhex(&val); 2108 write_spr(regno, val); 2109 dump_one_spr(regno, true); 2110 break; 2111 } 2112 case 'r': 2113 scanhex(®no); 2114 dump_one_spr(regno, true); 2115 break; 2116 case 'a': 2117 /* dump ALL SPRs */ 2118 for (spr = 1; spr < 1024; ++spr) 2119 dump_one_spr(spr, false); 2120 break; 2121 } 2122 2123 scannl(); 2124 } 2125 2126 /* 2127 * Stuff for reading and writing memory safely 2128 */ 2129 static int 2130 mread(unsigned long adrs, void *buf, int size) 2131 { 2132 volatile int n; 2133 char *p, *q; 2134 2135 n = 0; 2136 if (setjmp(bus_error_jmp) == 0) { 2137 catch_memory_errors = 1; 2138 sync(); 2139 p = (char *)adrs; 2140 q = (char *)buf; 2141 switch (size) { 2142 case 2: 2143 *(u16 *)q = *(u16 *)p; 2144 break; 2145 case 4: 2146 *(u32 *)q = *(u32 *)p; 2147 break; 2148 case 8: 2149 *(u64 *)q = *(u64 *)p; 2150 break; 2151 default: 2152 for( ; n < size; ++n) { 2153 *q++ = *p++; 2154 sync(); 2155 } 2156 } 2157 sync(); 2158 /* wait a little while to see if we get a machine check */ 2159 __delay(200); 2160 n = size; 2161 } 2162 catch_memory_errors = 0; 2163 return n; 2164 } 2165 2166 static int 2167 mwrite(unsigned long adrs, void *buf, int size) 2168 { 2169 volatile int n; 2170 char *p, *q; 2171 2172 n = 0; 2173 2174 if (xmon_is_ro) { 2175 printf(xmon_ro_msg); 2176 return n; 2177 } 2178 2179 if (setjmp(bus_error_jmp) == 0) { 2180 catch_memory_errors = 1; 2181 sync(); 2182 p = (char *) adrs; 2183 q = (char *) buf; 2184 switch (size) { 2185 case 2: 2186 *(u16 *)p = *(u16 *)q; 2187 break; 2188 case 4: 2189 *(u32 *)p = *(u32 *)q; 2190 break; 2191 case 8: 2192 *(u64 *)p = *(u64 *)q; 2193 break; 2194 default: 2195 for ( ; n < size; ++n) { 2196 *p++ = *q++; 2197 sync(); 2198 } 2199 } 2200 sync(); 2201 /* wait a little while to see if we get a machine check */ 2202 __delay(200); 2203 n = size; 2204 } else { 2205 printf("*** Error writing address "REG"\n", adrs + n); 2206 } 2207 catch_memory_errors = 0; 2208 return n; 2209 } 2210 2211 static int 2212 mread_instr(unsigned long adrs, struct ppc_inst *instr) 2213 { 2214 volatile int n; 2215 2216 n = 0; 2217 if (setjmp(bus_error_jmp) == 0) { 2218 catch_memory_errors = 1; 2219 sync(); 2220 *instr = ppc_inst_read((struct ppc_inst *)adrs); 2221 sync(); 2222 /* wait a little while to see if we get a machine check */ 2223 __delay(200); 2224 n = ppc_inst_len(*instr); 2225 } 2226 catch_memory_errors = 0; 2227 return n; 2228 } 2229 2230 static int fault_type; 2231 static int fault_except; 2232 static char *fault_chars[] = { "--", "**", "##" }; 2233 2234 static int handle_fault(struct pt_regs *regs) 2235 { 2236 fault_except = TRAP(regs); 2237 switch (TRAP(regs)) { 2238 case 0x200: 2239 fault_type = 0; 2240 break; 2241 case 0x300: 2242 case 0x380: 2243 fault_type = 1; 2244 break; 2245 default: 2246 fault_type = 2; 2247 } 2248 2249 longjmp(bus_error_jmp, 1); 2250 2251 return 0; 2252 } 2253 2254 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) 2255 2256 static void 2257 byterev(unsigned char *val, int size) 2258 { 2259 int t; 2260 2261 switch (size) { 2262 case 2: 2263 SWAP(val[0], val[1], t); 2264 break; 2265 case 4: 2266 SWAP(val[0], val[3], t); 2267 SWAP(val[1], val[2], t); 2268 break; 2269 case 8: /* is there really any use for this? */ 2270 SWAP(val[0], val[7], t); 2271 SWAP(val[1], val[6], t); 2272 SWAP(val[2], val[5], t); 2273 SWAP(val[3], val[4], t); 2274 break; 2275 } 2276 } 2277 2278 static int brev; 2279 static int mnoread; 2280 2281 static char *memex_help_string = 2282 "Memory examine command usage:\n" 2283 "m [addr] [flags] examine/change memory\n" 2284 " addr is optional. will start where left off.\n" 2285 " flags may include chars from this set:\n" 2286 " b modify by bytes (default)\n" 2287 " w modify by words (2 byte)\n" 2288 " l modify by longs (4 byte)\n" 2289 " d modify by doubleword (8 byte)\n" 2290 " r toggle reverse byte order mode\n" 2291 " n do not read memory (for i/o spaces)\n" 2292 " . ok to read (default)\n" 2293 "NOTE: flags are saved as defaults\n" 2294 ""; 2295 2296 static char *memex_subcmd_help_string = 2297 "Memory examine subcommands:\n" 2298 " hexval write this val to current location\n" 2299 " 'string' write chars from string to this location\n" 2300 " ' increment address\n" 2301 " ^ decrement address\n" 2302 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n" 2303 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n" 2304 " ` clear no-read flag\n" 2305 " ; stay at this addr\n" 2306 " v change to byte mode\n" 2307 " w change to word (2 byte) mode\n" 2308 " l change to long (4 byte) mode\n" 2309 " u change to doubleword (8 byte) mode\n" 2310 " m addr change current addr\n" 2311 " n toggle no-read flag\n" 2312 " r toggle byte reverse flag\n" 2313 " < count back up count bytes\n" 2314 " > count skip forward count bytes\n" 2315 " x exit this mode\n" 2316 ""; 2317 2318 static void 2319 memex(void) 2320 { 2321 int cmd, inc, i, nslash; 2322 unsigned long n; 2323 unsigned char val[16]; 2324 2325 scanhex((void *)&adrs); 2326 cmd = skipbl(); 2327 if (cmd == '?') { 2328 printf(memex_help_string); 2329 return; 2330 } else { 2331 termch = cmd; 2332 } 2333 last_cmd = "m\n"; 2334 while ((cmd = skipbl()) != '\n') { 2335 switch( cmd ){ 2336 case 'b': size = 1; break; 2337 case 'w': size = 2; break; 2338 case 'l': size = 4; break; 2339 case 'd': size = 8; break; 2340 case 'r': brev = !brev; break; 2341 case 'n': mnoread = 1; break; 2342 case '.': mnoread = 0; break; 2343 } 2344 } 2345 if( size <= 0 ) 2346 size = 1; 2347 else if( size > 8 ) 2348 size = 8; 2349 for(;;){ 2350 if (!mnoread) 2351 n = mread(adrs, val, size); 2352 printf(REG"%c", adrs, brev? 'r': ' '); 2353 if (!mnoread) { 2354 if (brev) 2355 byterev(val, size); 2356 putchar(' '); 2357 for (i = 0; i < n; ++i) 2358 printf("%.2x", val[i]); 2359 for (; i < size; ++i) 2360 printf("%s", fault_chars[fault_type]); 2361 } 2362 putchar(' '); 2363 inc = size; 2364 nslash = 0; 2365 for(;;){ 2366 if( scanhex(&n) ){ 2367 for (i = 0; i < size; ++i) 2368 val[i] = n >> (i * 8); 2369 if (!brev) 2370 byterev(val, size); 2371 mwrite(adrs, val, size); 2372 inc = size; 2373 } 2374 cmd = skipbl(); 2375 if (cmd == '\n') 2376 break; 2377 inc = 0; 2378 switch (cmd) { 2379 case '\'': 2380 for(;;){ 2381 n = inchar(); 2382 if( n == '\\' ) 2383 n = bsesc(); 2384 else if( n == '\'' ) 2385 break; 2386 for (i = 0; i < size; ++i) 2387 val[i] = n >> (i * 8); 2388 if (!brev) 2389 byterev(val, size); 2390 mwrite(adrs, val, size); 2391 adrs += size; 2392 } 2393 adrs -= size; 2394 inc = size; 2395 break; 2396 case ',': 2397 adrs += size; 2398 break; 2399 case '.': 2400 mnoread = 0; 2401 break; 2402 case ';': 2403 break; 2404 case 'x': 2405 case EOF: 2406 scannl(); 2407 return; 2408 case 'b': 2409 case 'v': 2410 size = 1; 2411 break; 2412 case 'w': 2413 size = 2; 2414 break; 2415 case 'l': 2416 size = 4; 2417 break; 2418 case 'u': 2419 size = 8; 2420 break; 2421 case '^': 2422 adrs -= size; 2423 break; 2424 case '/': 2425 if (nslash > 0) 2426 adrs -= 1 << nslash; 2427 else 2428 nslash = 0; 2429 nslash += 4; 2430 adrs += 1 << nslash; 2431 break; 2432 case '\\': 2433 if (nslash < 0) 2434 adrs += 1 << -nslash; 2435 else 2436 nslash = 0; 2437 nslash -= 4; 2438 adrs -= 1 << -nslash; 2439 break; 2440 case 'm': 2441 scanhex((void *)&adrs); 2442 break; 2443 case 'n': 2444 mnoread = 1; 2445 break; 2446 case 'r': 2447 brev = !brev; 2448 break; 2449 case '<': 2450 n = size; 2451 scanhex(&n); 2452 adrs -= n; 2453 break; 2454 case '>': 2455 n = size; 2456 scanhex(&n); 2457 adrs += n; 2458 break; 2459 case '?': 2460 printf(memex_subcmd_help_string); 2461 break; 2462 } 2463 } 2464 adrs += inc; 2465 } 2466 } 2467 2468 static int 2469 bsesc(void) 2470 { 2471 int c; 2472 2473 c = inchar(); 2474 switch( c ){ 2475 case 'n': c = '\n'; break; 2476 case 'r': c = '\r'; break; 2477 case 'b': c = '\b'; break; 2478 case 't': c = '\t'; break; 2479 } 2480 return c; 2481 } 2482 2483 static void xmon_rawdump (unsigned long adrs, long ndump) 2484 { 2485 long n, m, r, nr; 2486 unsigned char temp[16]; 2487 2488 for (n = ndump; n > 0;) { 2489 r = n < 16? n: 16; 2490 nr = mread(adrs, temp, r); 2491 adrs += nr; 2492 for (m = 0; m < r; ++m) { 2493 if (m < nr) 2494 printf("%.2x", temp[m]); 2495 else 2496 printf("%s", fault_chars[fault_type]); 2497 } 2498 n -= r; 2499 if (nr < r) 2500 break; 2501 } 2502 printf("\n"); 2503 } 2504 2505 static void dump_tracing(void) 2506 { 2507 int c; 2508 2509 c = inchar(); 2510 if (c == 'c') 2511 ftrace_dump(DUMP_ORIG); 2512 else 2513 ftrace_dump(DUMP_ALL); 2514 } 2515 2516 #ifdef CONFIG_PPC64 2517 static void dump_one_paca(int cpu) 2518 { 2519 struct paca_struct *p; 2520 #ifdef CONFIG_PPC_BOOK3S_64 2521 int i = 0; 2522 #endif 2523 2524 if (setjmp(bus_error_jmp) != 0) { 2525 printf("*** Error dumping paca for cpu 0x%x!\n", cpu); 2526 return; 2527 } 2528 2529 catch_memory_errors = 1; 2530 sync(); 2531 2532 p = paca_ptrs[cpu]; 2533 2534 printf("paca for cpu 0x%x @ %px:\n", cpu, p); 2535 2536 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no"); 2537 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no"); 2538 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no"); 2539 2540 #define DUMP(paca, name, format) \ 2541 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \ 2542 offsetof(struct paca_struct, name)); 2543 2544 DUMP(p, lock_token, "%#-*x"); 2545 DUMP(p, paca_index, "%#-*x"); 2546 DUMP(p, kernel_toc, "%#-*llx"); 2547 DUMP(p, kernelbase, "%#-*llx"); 2548 DUMP(p, kernel_msr, "%#-*llx"); 2549 DUMP(p, emergency_sp, "%-*px"); 2550 #ifdef CONFIG_PPC_BOOK3S_64 2551 DUMP(p, nmi_emergency_sp, "%-*px"); 2552 DUMP(p, mc_emergency_sp, "%-*px"); 2553 DUMP(p, in_nmi, "%#-*x"); 2554 DUMP(p, in_mce, "%#-*x"); 2555 DUMP(p, hmi_event_available, "%#-*x"); 2556 #endif 2557 DUMP(p, data_offset, "%#-*llx"); 2558 DUMP(p, hw_cpu_id, "%#-*x"); 2559 DUMP(p, cpu_start, "%#-*x"); 2560 DUMP(p, kexec_state, "%#-*x"); 2561 #ifdef CONFIG_PPC_BOOK3S_64 2562 if (!early_radix_enabled()) { 2563 for (i = 0; i < SLB_NUM_BOLTED; i++) { 2564 u64 esid, vsid; 2565 2566 if (!p->slb_shadow_ptr) 2567 continue; 2568 2569 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid); 2570 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid); 2571 2572 if (esid || vsid) { 2573 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n", 2574 22, "slb_shadow", i, esid, vsid); 2575 } 2576 } 2577 DUMP(p, vmalloc_sllp, "%#-*x"); 2578 DUMP(p, stab_rr, "%#-*x"); 2579 DUMP(p, slb_used_bitmap, "%#-*x"); 2580 DUMP(p, slb_kern_bitmap, "%#-*x"); 2581 2582 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2583 DUMP(p, slb_cache_ptr, "%#-*x"); 2584 for (i = 0; i < SLB_CACHE_ENTRIES; i++) 2585 printf(" %-*s[%d] = 0x%016x\n", 2586 22, "slb_cache", i, p->slb_cache[i]); 2587 } 2588 } 2589 2590 DUMP(p, rfi_flush_fallback_area, "%-*px"); 2591 #endif 2592 DUMP(p, dscr_default, "%#-*llx"); 2593 #ifdef CONFIG_PPC_BOOK3E 2594 DUMP(p, pgd, "%-*px"); 2595 DUMP(p, kernel_pgd, "%-*px"); 2596 DUMP(p, tcd_ptr, "%-*px"); 2597 DUMP(p, mc_kstack, "%-*px"); 2598 DUMP(p, crit_kstack, "%-*px"); 2599 DUMP(p, dbg_kstack, "%-*px"); 2600 #endif 2601 DUMP(p, __current, "%-*px"); 2602 DUMP(p, kstack, "%#-*llx"); 2603 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1)); 2604 #ifdef CONFIG_STACKPROTECTOR 2605 DUMP(p, canary, "%#-*lx"); 2606 #endif 2607 DUMP(p, saved_r1, "%#-*llx"); 2608 #ifdef CONFIG_PPC_BOOK3E 2609 DUMP(p, trap_save, "%#-*x"); 2610 #endif 2611 DUMP(p, irq_soft_mask, "%#-*x"); 2612 DUMP(p, irq_happened, "%#-*x"); 2613 #ifdef CONFIG_MMIOWB 2614 DUMP(p, mmiowb_state.nesting_count, "%#-*x"); 2615 DUMP(p, mmiowb_state.mmiowb_pending, "%#-*x"); 2616 #endif 2617 DUMP(p, irq_work_pending, "%#-*x"); 2618 DUMP(p, sprg_vdso, "%#-*llx"); 2619 2620 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2621 DUMP(p, tm_scratch, "%#-*llx"); 2622 #endif 2623 2624 #ifdef CONFIG_PPC_POWERNV 2625 DUMP(p, idle_state, "%#-*lx"); 2626 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2627 DUMP(p, thread_idle_state, "%#-*x"); 2628 DUMP(p, subcore_sibling_mask, "%#-*x"); 2629 } else { 2630 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 2631 DUMP(p, requested_psscr, "%#-*llx"); 2632 DUMP(p, dont_stop.counter, "%#-*x"); 2633 #endif 2634 } 2635 #endif 2636 2637 DUMP(p, accounting.utime, "%#-*lx"); 2638 DUMP(p, accounting.stime, "%#-*lx"); 2639 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2640 DUMP(p, accounting.utime_scaled, "%#-*lx"); 2641 #endif 2642 DUMP(p, accounting.starttime, "%#-*lx"); 2643 DUMP(p, accounting.starttime_user, "%#-*lx"); 2644 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2645 DUMP(p, accounting.startspurr, "%#-*lx"); 2646 DUMP(p, accounting.utime_sspurr, "%#-*lx"); 2647 #endif 2648 DUMP(p, accounting.steal_time, "%#-*lx"); 2649 #undef DUMP 2650 2651 catch_memory_errors = 0; 2652 sync(); 2653 } 2654 2655 static void dump_all_pacas(void) 2656 { 2657 int cpu; 2658 2659 if (num_possible_cpus() == 0) { 2660 printf("No possible cpus, use 'dp #' to dump individual cpus\n"); 2661 return; 2662 } 2663 2664 for_each_possible_cpu(cpu) 2665 dump_one_paca(cpu); 2666 } 2667 2668 static void dump_pacas(void) 2669 { 2670 unsigned long num; 2671 int c; 2672 2673 c = inchar(); 2674 if (c == 'a') { 2675 dump_all_pacas(); 2676 return; 2677 } 2678 2679 termch = c; /* Put c back, it wasn't 'a' */ 2680 2681 if (scanhex(&num)) 2682 dump_one_paca(num); 2683 else 2684 dump_one_paca(xmon_owner); 2685 } 2686 #endif 2687 2688 #ifdef CONFIG_PPC_POWERNV 2689 static void dump_one_xive(int cpu) 2690 { 2691 unsigned int hwid = get_hard_smp_processor_id(cpu); 2692 bool hv = cpu_has_feature(CPU_FTR_HVMODE); 2693 2694 if (hv) { 2695 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid); 2696 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid); 2697 opal_xive_dump(XIVE_DUMP_TM_OS, hwid); 2698 opal_xive_dump(XIVE_DUMP_TM_USER, hwid); 2699 opal_xive_dump(XIVE_DUMP_VP, hwid); 2700 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid); 2701 } 2702 2703 if (setjmp(bus_error_jmp) != 0) { 2704 catch_memory_errors = 0; 2705 printf("*** Error dumping xive on cpu %d\n", cpu); 2706 return; 2707 } 2708 2709 catch_memory_errors = 1; 2710 sync(); 2711 xmon_xive_do_dump(cpu); 2712 sync(); 2713 __delay(200); 2714 catch_memory_errors = 0; 2715 } 2716 2717 static void dump_all_xives(void) 2718 { 2719 int cpu; 2720 2721 if (num_possible_cpus() == 0) { 2722 printf("No possible cpus, use 'dx #' to dump individual cpus\n"); 2723 return; 2724 } 2725 2726 for_each_possible_cpu(cpu) 2727 dump_one_xive(cpu); 2728 } 2729 2730 static void dump_one_xive_irq(u32 num, struct irq_data *d) 2731 { 2732 xmon_xive_get_irq_config(num, d); 2733 } 2734 2735 static void dump_all_xive_irq(void) 2736 { 2737 unsigned int i; 2738 struct irq_desc *desc; 2739 2740 for_each_irq_desc(i, desc) { 2741 struct irq_data *d = irq_desc_get_irq_data(desc); 2742 unsigned int hwirq; 2743 2744 if (!d) 2745 continue; 2746 2747 hwirq = (unsigned int)irqd_to_hwirq(d); 2748 /* IPIs are special (HW number 0) */ 2749 if (hwirq) 2750 dump_one_xive_irq(hwirq, d); 2751 } 2752 } 2753 2754 static void dump_xives(void) 2755 { 2756 unsigned long num; 2757 int c; 2758 2759 if (!xive_enabled()) { 2760 printf("Xive disabled on this system\n"); 2761 return; 2762 } 2763 2764 c = inchar(); 2765 if (c == 'a') { 2766 dump_all_xives(); 2767 return; 2768 } else if (c == 'i') { 2769 if (scanhex(&num)) 2770 dump_one_xive_irq(num, NULL); 2771 else 2772 dump_all_xive_irq(); 2773 return; 2774 } 2775 2776 termch = c; /* Put c back, it wasn't 'a' */ 2777 2778 if (scanhex(&num)) 2779 dump_one_xive(num); 2780 else 2781 dump_one_xive(xmon_owner); 2782 } 2783 #endif /* CONFIG_PPC_POWERNV */ 2784 2785 static void dump_by_size(unsigned long addr, long count, int size) 2786 { 2787 unsigned char temp[16]; 2788 int i, j; 2789 u64 val; 2790 2791 count = ALIGN(count, 16); 2792 2793 for (i = 0; i < count; i += 16, addr += 16) { 2794 printf(REG, addr); 2795 2796 if (mread(addr, temp, 16) != 16) { 2797 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr); 2798 return; 2799 } 2800 2801 for (j = 0; j < 16; j += size) { 2802 putchar(' '); 2803 switch (size) { 2804 case 1: val = temp[j]; break; 2805 case 2: val = *(u16 *)&temp[j]; break; 2806 case 4: val = *(u32 *)&temp[j]; break; 2807 case 8: val = *(u64 *)&temp[j]; break; 2808 default: val = 0; 2809 } 2810 2811 printf("%0*llx", size * 2, val); 2812 } 2813 printf(" |"); 2814 for (j = 0; j < 16; ++j) { 2815 val = temp[j]; 2816 putchar(' ' <= val && val <= '~' ? val : '.'); 2817 } 2818 printf("|\n"); 2819 } 2820 } 2821 2822 static void 2823 dump(void) 2824 { 2825 static char last[] = { "d?\n" }; 2826 int c; 2827 2828 c = inchar(); 2829 2830 #ifdef CONFIG_PPC64 2831 if (c == 'p') { 2832 xmon_start_pagination(); 2833 dump_pacas(); 2834 xmon_end_pagination(); 2835 return; 2836 } 2837 #endif 2838 #ifdef CONFIG_PPC_POWERNV 2839 if (c == 'x') { 2840 xmon_start_pagination(); 2841 dump_xives(); 2842 xmon_end_pagination(); 2843 return; 2844 } 2845 #endif 2846 2847 if (c == 't') { 2848 dump_tracing(); 2849 return; 2850 } 2851 2852 if (c == '\n') 2853 termch = c; 2854 2855 scanhex((void *)&adrs); 2856 if (termch != '\n') 2857 termch = 0; 2858 if (c == 'i') { 2859 scanhex(&nidump); 2860 if (nidump == 0) 2861 nidump = 16; 2862 else if (nidump > MAX_IDUMP) 2863 nidump = MAX_IDUMP; 2864 adrs += ppc_inst_dump(adrs, nidump, 1); 2865 last_cmd = "di\n"; 2866 } else if (c == 'l') { 2867 dump_log_buf(); 2868 } else if (c == 'o') { 2869 dump_opal_msglog(); 2870 } else if (c == 'v') { 2871 /* dump virtual to physical translation */ 2872 show_pte(adrs); 2873 } else if (c == 'r') { 2874 scanhex(&ndump); 2875 if (ndump == 0) 2876 ndump = 64; 2877 xmon_rawdump(adrs, ndump); 2878 adrs += ndump; 2879 last_cmd = "dr\n"; 2880 } else { 2881 scanhex(&ndump); 2882 if (ndump == 0) 2883 ndump = 64; 2884 else if (ndump > MAX_DUMP) 2885 ndump = MAX_DUMP; 2886 2887 switch (c) { 2888 case '8': 2889 case '4': 2890 case '2': 2891 case '1': 2892 ndump = ALIGN(ndump, 16); 2893 dump_by_size(adrs, ndump, c - '0'); 2894 last[1] = c; 2895 last_cmd = last; 2896 break; 2897 default: 2898 prdump(adrs, ndump); 2899 last_cmd = "d\n"; 2900 } 2901 2902 adrs += ndump; 2903 } 2904 } 2905 2906 static void 2907 prdump(unsigned long adrs, long ndump) 2908 { 2909 long n, m, c, r, nr; 2910 unsigned char temp[16]; 2911 2912 for (n = ndump; n > 0;) { 2913 printf(REG, adrs); 2914 putchar(' '); 2915 r = n < 16? n: 16; 2916 nr = mread(adrs, temp, r); 2917 adrs += nr; 2918 for (m = 0; m < r; ++m) { 2919 if ((m & (sizeof(long) - 1)) == 0 && m > 0) 2920 putchar(' '); 2921 if (m < nr) 2922 printf("%.2x", temp[m]); 2923 else 2924 printf("%s", fault_chars[fault_type]); 2925 } 2926 for (; m < 16; ++m) { 2927 if ((m & (sizeof(long) - 1)) == 0) 2928 putchar(' '); 2929 printf(" "); 2930 } 2931 printf(" |"); 2932 for (m = 0; m < r; ++m) { 2933 if (m < nr) { 2934 c = temp[m]; 2935 putchar(' ' <= c && c <= '~'? c: '.'); 2936 } else 2937 putchar(' '); 2938 } 2939 n -= r; 2940 for (; m < 16; ++m) 2941 putchar(' '); 2942 printf("|\n"); 2943 if (nr < r) 2944 break; 2945 } 2946 } 2947 2948 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); 2949 2950 static int 2951 generic_inst_dump(unsigned long adr, long count, int praddr, 2952 instruction_dump_func dump_func) 2953 { 2954 int nr, dotted; 2955 unsigned long first_adr; 2956 struct ppc_inst inst, last_inst = ppc_inst(0); 2957 2958 dotted = 0; 2959 for (first_adr = adr; count > 0; --count, adr += ppc_inst_len(inst)) { 2960 nr = mread_instr(adr, &inst); 2961 if (nr == 0) { 2962 if (praddr) { 2963 const char *x = fault_chars[fault_type]; 2964 printf(REG" %s%s%s%s\n", adr, x, x, x, x); 2965 } 2966 break; 2967 } 2968 if (adr > first_adr && ppc_inst_equal(inst, last_inst)) { 2969 if (!dotted) { 2970 printf(" ...\n"); 2971 dotted = 1; 2972 } 2973 continue; 2974 } 2975 dotted = 0; 2976 last_inst = inst; 2977 if (praddr) 2978 printf(REG" %s", adr, ppc_inst_as_str(inst)); 2979 printf("\t"); 2980 if (!ppc_inst_prefixed(inst)) 2981 dump_func(ppc_inst_val(inst), adr); 2982 else 2983 dump_func(ppc_inst_as_u64(inst), adr); 2984 printf("\n"); 2985 } 2986 return adr - first_adr; 2987 } 2988 2989 static int 2990 ppc_inst_dump(unsigned long adr, long count, int praddr) 2991 { 2992 return generic_inst_dump(adr, count, praddr, print_insn_powerpc); 2993 } 2994 2995 void 2996 print_address(unsigned long addr) 2997 { 2998 xmon_print_symbol(addr, "\t# ", ""); 2999 } 3000 3001 static void 3002 dump_log_buf(void) 3003 { 3004 struct kmsg_dumper dumper = { .active = 1 }; 3005 unsigned char buf[128]; 3006 size_t len; 3007 3008 if (setjmp(bus_error_jmp) != 0) { 3009 printf("Error dumping printk buffer!\n"); 3010 return; 3011 } 3012 3013 catch_memory_errors = 1; 3014 sync(); 3015 3016 kmsg_dump_rewind_nolock(&dumper); 3017 xmon_start_pagination(); 3018 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) { 3019 buf[len] = '\0'; 3020 printf("%s", buf); 3021 } 3022 xmon_end_pagination(); 3023 3024 sync(); 3025 /* wait a little while to see if we get a machine check */ 3026 __delay(200); 3027 catch_memory_errors = 0; 3028 } 3029 3030 #ifdef CONFIG_PPC_POWERNV 3031 static void dump_opal_msglog(void) 3032 { 3033 unsigned char buf[128]; 3034 ssize_t res; 3035 loff_t pos = 0; 3036 3037 if (!firmware_has_feature(FW_FEATURE_OPAL)) { 3038 printf("Machine is not running OPAL firmware.\n"); 3039 return; 3040 } 3041 3042 if (setjmp(bus_error_jmp) != 0) { 3043 printf("Error dumping OPAL msglog!\n"); 3044 return; 3045 } 3046 3047 catch_memory_errors = 1; 3048 sync(); 3049 3050 xmon_start_pagination(); 3051 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) { 3052 if (res < 0) { 3053 printf("Error dumping OPAL msglog! Error: %zd\n", res); 3054 break; 3055 } 3056 buf[res] = '\0'; 3057 printf("%s", buf); 3058 pos += res; 3059 } 3060 xmon_end_pagination(); 3061 3062 sync(); 3063 /* wait a little while to see if we get a machine check */ 3064 __delay(200); 3065 catch_memory_errors = 0; 3066 } 3067 #endif 3068 3069 /* 3070 * Memory operations - move, set, print differences 3071 */ 3072 static unsigned long mdest; /* destination address */ 3073 static unsigned long msrc; /* source address */ 3074 static unsigned long mval; /* byte value to set memory to */ 3075 static unsigned long mcount; /* # bytes to affect */ 3076 static unsigned long mdiffs; /* max # differences to print */ 3077 3078 static void 3079 memops(int cmd) 3080 { 3081 scanhex((void *)&mdest); 3082 if( termch != '\n' ) 3083 termch = 0; 3084 scanhex((void *)(cmd == 's'? &mval: &msrc)); 3085 if( termch != '\n' ) 3086 termch = 0; 3087 scanhex((void *)&mcount); 3088 switch( cmd ){ 3089 case 'm': 3090 if (xmon_is_ro) { 3091 printf(xmon_ro_msg); 3092 break; 3093 } 3094 memmove((void *)mdest, (void *)msrc, mcount); 3095 break; 3096 case 's': 3097 if (xmon_is_ro) { 3098 printf(xmon_ro_msg); 3099 break; 3100 } 3101 memset((void *)mdest, mval, mcount); 3102 break; 3103 case 'd': 3104 if( termch != '\n' ) 3105 termch = 0; 3106 scanhex((void *)&mdiffs); 3107 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs); 3108 break; 3109 } 3110 } 3111 3112 static void 3113 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) 3114 { 3115 unsigned n, prt; 3116 3117 prt = 0; 3118 for( n = nb; n > 0; --n ) 3119 if( *p1++ != *p2++ ) 3120 if( ++prt <= maxpr ) 3121 printf("%px %.2x # %px %.2x\n", p1 - 1, 3122 p1[-1], p2 - 1, p2[-1]); 3123 if( prt > maxpr ) 3124 printf("Total of %d differences\n", prt); 3125 } 3126 3127 static unsigned mend; 3128 static unsigned mask; 3129 3130 static void 3131 memlocate(void) 3132 { 3133 unsigned a, n; 3134 unsigned char val[4]; 3135 3136 last_cmd = "ml"; 3137 scanhex((void *)&mdest); 3138 if (termch != '\n') { 3139 termch = 0; 3140 scanhex((void *)&mend); 3141 if (termch != '\n') { 3142 termch = 0; 3143 scanhex((void *)&mval); 3144 mask = ~0; 3145 if (termch != '\n') termch = 0; 3146 scanhex((void *)&mask); 3147 } 3148 } 3149 n = 0; 3150 for (a = mdest; a < mend; a += 4) { 3151 if (mread(a, val, 4) == 4 3152 && ((GETWORD(val) ^ mval) & mask) == 0) { 3153 printf("%.16x: %.16x\n", a, GETWORD(val)); 3154 if (++n >= 10) 3155 break; 3156 } 3157 } 3158 } 3159 3160 static unsigned long mskip = 0x1000; 3161 static unsigned long mlim = 0xffffffff; 3162 3163 static void 3164 memzcan(void) 3165 { 3166 unsigned char v; 3167 unsigned a; 3168 int ok, ook; 3169 3170 scanhex(&mdest); 3171 if (termch != '\n') termch = 0; 3172 scanhex(&mskip); 3173 if (termch != '\n') termch = 0; 3174 scanhex(&mlim); 3175 ook = 0; 3176 for (a = mdest; a < mlim; a += mskip) { 3177 ok = mread(a, &v, 1); 3178 if (ok && !ook) { 3179 printf("%.8x .. ", a); 3180 } else if (!ok && ook) 3181 printf("%.8lx\n", a - mskip); 3182 ook = ok; 3183 if (a + mskip < a) 3184 break; 3185 } 3186 if (ook) 3187 printf("%.8lx\n", a - mskip); 3188 } 3189 3190 static void show_task(struct task_struct *tsk) 3191 { 3192 char state; 3193 3194 /* 3195 * Cloned from kdb_task_state_char(), which is not entirely 3196 * appropriate for calling from xmon. This could be moved 3197 * to a common, generic, routine used by both. 3198 */ 3199 state = (tsk->state == 0) ? 'R' : 3200 (tsk->state < 0) ? 'U' : 3201 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' : 3202 (tsk->state & TASK_STOPPED) ? 'T' : 3203 (tsk->state & TASK_TRACED) ? 'C' : 3204 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' : 3205 (tsk->exit_state & EXIT_DEAD) ? 'E' : 3206 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?'; 3207 3208 printf("%16px %16lx %16px %6d %6d %c %2d %s\n", tsk, 3209 tsk->thread.ksp, tsk->thread.regs, 3210 tsk->pid, rcu_dereference(tsk->parent)->pid, 3211 state, task_cpu(tsk), 3212 tsk->comm); 3213 } 3214 3215 #ifdef CONFIG_PPC_BOOK3S_64 3216 static void format_pte(void *ptep, unsigned long pte) 3217 { 3218 pte_t entry = __pte(pte); 3219 3220 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte); 3221 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK); 3222 3223 printf("Flags = %s%s%s%s%s\n", 3224 pte_young(entry) ? "Accessed " : "", 3225 pte_dirty(entry) ? "Dirty " : "", 3226 pte_read(entry) ? "Read " : "", 3227 pte_write(entry) ? "Write " : "", 3228 pte_exec(entry) ? "Exec " : ""); 3229 } 3230 3231 static void show_pte(unsigned long addr) 3232 { 3233 unsigned long tskv = 0; 3234 struct task_struct *tsk = NULL; 3235 struct mm_struct *mm; 3236 pgd_t *pgdp; 3237 p4d_t *p4dp; 3238 pud_t *pudp; 3239 pmd_t *pmdp; 3240 pte_t *ptep; 3241 3242 if (!scanhex(&tskv)) 3243 mm = &init_mm; 3244 else 3245 tsk = (struct task_struct *)tskv; 3246 3247 if (tsk == NULL) 3248 mm = &init_mm; 3249 else 3250 mm = tsk->active_mm; 3251 3252 if (setjmp(bus_error_jmp) != 0) { 3253 catch_memory_errors = 0; 3254 printf("*** Error dumping pte for task %px\n", tsk); 3255 return; 3256 } 3257 3258 catch_memory_errors = 1; 3259 sync(); 3260 3261 if (mm == &init_mm) 3262 pgdp = pgd_offset_k(addr); 3263 else 3264 pgdp = pgd_offset(mm, addr); 3265 3266 p4dp = p4d_offset(pgdp, addr); 3267 3268 if (p4d_none(*p4dp)) { 3269 printf("No valid P4D\n"); 3270 return; 3271 } 3272 3273 if (p4d_is_leaf(*p4dp)) { 3274 format_pte(p4dp, p4d_val(*p4dp)); 3275 return; 3276 } 3277 3278 printf("p4dp @ 0x%px = 0x%016lx\n", p4dp, p4d_val(*p4dp)); 3279 3280 pudp = pud_offset(p4dp, addr); 3281 3282 if (pud_none(*pudp)) { 3283 printf("No valid PUD\n"); 3284 return; 3285 } 3286 3287 if (pud_is_leaf(*pudp)) { 3288 format_pte(pudp, pud_val(*pudp)); 3289 return; 3290 } 3291 3292 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp)); 3293 3294 pmdp = pmd_offset(pudp, addr); 3295 3296 if (pmd_none(*pmdp)) { 3297 printf("No valid PMD\n"); 3298 return; 3299 } 3300 3301 if (pmd_is_leaf(*pmdp)) { 3302 format_pte(pmdp, pmd_val(*pmdp)); 3303 return; 3304 } 3305 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp)); 3306 3307 ptep = pte_offset_map(pmdp, addr); 3308 if (pte_none(*ptep)) { 3309 printf("no valid PTE\n"); 3310 return; 3311 } 3312 3313 format_pte(ptep, pte_val(*ptep)); 3314 3315 sync(); 3316 __delay(200); 3317 catch_memory_errors = 0; 3318 } 3319 #else 3320 static void show_pte(unsigned long addr) 3321 { 3322 printf("show_pte not yet implemented\n"); 3323 } 3324 #endif /* CONFIG_PPC_BOOK3S_64 */ 3325 3326 static void show_tasks(void) 3327 { 3328 unsigned long tskv; 3329 struct task_struct *tsk = NULL; 3330 3331 printf(" task_struct ->thread.ksp ->thread.regs PID PPID S P CMD\n"); 3332 3333 if (scanhex(&tskv)) 3334 tsk = (struct task_struct *)tskv; 3335 3336 if (setjmp(bus_error_jmp) != 0) { 3337 catch_memory_errors = 0; 3338 printf("*** Error dumping task %px\n", tsk); 3339 return; 3340 } 3341 3342 catch_memory_errors = 1; 3343 sync(); 3344 3345 if (tsk) 3346 show_task(tsk); 3347 else 3348 for_each_process(tsk) 3349 show_task(tsk); 3350 3351 sync(); 3352 __delay(200); 3353 catch_memory_errors = 0; 3354 } 3355 3356 static void proccall(void) 3357 { 3358 unsigned long args[8]; 3359 unsigned long ret; 3360 int i; 3361 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long, 3362 unsigned long, unsigned long, unsigned long, 3363 unsigned long, unsigned long, unsigned long); 3364 callfunc_t func; 3365 3366 if (!scanhex(&adrs)) 3367 return; 3368 if (termch != '\n') 3369 termch = 0; 3370 for (i = 0; i < 8; ++i) 3371 args[i] = 0; 3372 for (i = 0; i < 8; ++i) { 3373 if (!scanhex(&args[i]) || termch == '\n') 3374 break; 3375 termch = 0; 3376 } 3377 func = (callfunc_t) adrs; 3378 ret = 0; 3379 if (setjmp(bus_error_jmp) == 0) { 3380 catch_memory_errors = 1; 3381 sync(); 3382 ret = func(args[0], args[1], args[2], args[3], 3383 args[4], args[5], args[6], args[7]); 3384 sync(); 3385 printf("return value is 0x%lx\n", ret); 3386 } else { 3387 printf("*** %x exception occurred\n", fault_except); 3388 } 3389 catch_memory_errors = 0; 3390 } 3391 3392 /* Input scanning routines */ 3393 int 3394 skipbl(void) 3395 { 3396 int c; 3397 3398 if( termch != 0 ){ 3399 c = termch; 3400 termch = 0; 3401 } else 3402 c = inchar(); 3403 while( c == ' ' || c == '\t' ) 3404 c = inchar(); 3405 return c; 3406 } 3407 3408 #define N_PTREGS 44 3409 static const char *regnames[N_PTREGS] = { 3410 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3411 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3412 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3413 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3414 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", 3415 #ifdef CONFIG_PPC64 3416 "softe", 3417 #else 3418 "mq", 3419 #endif 3420 "trap", "dar", "dsisr", "res" 3421 }; 3422 3423 int 3424 scanhex(unsigned long *vp) 3425 { 3426 int c, d; 3427 unsigned long v; 3428 3429 c = skipbl(); 3430 if (c == '%') { 3431 /* parse register name */ 3432 char regname[8]; 3433 int i; 3434 3435 for (i = 0; i < sizeof(regname) - 1; ++i) { 3436 c = inchar(); 3437 if (!isalnum(c)) { 3438 termch = c; 3439 break; 3440 } 3441 regname[i] = c; 3442 } 3443 regname[i] = 0; 3444 i = match_string(regnames, N_PTREGS, regname); 3445 if (i < 0) { 3446 printf("invalid register name '%%%s'\n", regname); 3447 return 0; 3448 } 3449 if (xmon_regs == NULL) { 3450 printf("regs not available\n"); 3451 return 0; 3452 } 3453 *vp = ((unsigned long *)xmon_regs)[i]; 3454 return 1; 3455 } 3456 3457 /* skip leading "0x" if any */ 3458 3459 if (c == '0') { 3460 c = inchar(); 3461 if (c == 'x') { 3462 c = inchar(); 3463 } else { 3464 d = hexdigit(c); 3465 if (d == EOF) { 3466 termch = c; 3467 *vp = 0; 3468 return 1; 3469 } 3470 } 3471 } else if (c == '$') { 3472 int i; 3473 for (i=0; i<63; i++) { 3474 c = inchar(); 3475 if (isspace(c) || c == '\0') { 3476 termch = c; 3477 break; 3478 } 3479 tmpstr[i] = c; 3480 } 3481 tmpstr[i++] = 0; 3482 *vp = 0; 3483 if (setjmp(bus_error_jmp) == 0) { 3484 catch_memory_errors = 1; 3485 sync(); 3486 *vp = kallsyms_lookup_name(tmpstr); 3487 sync(); 3488 } 3489 catch_memory_errors = 0; 3490 if (!(*vp)) { 3491 printf("unknown symbol '%s'\n", tmpstr); 3492 return 0; 3493 } 3494 return 1; 3495 } 3496 3497 d = hexdigit(c); 3498 if (d == EOF) { 3499 termch = c; 3500 return 0; 3501 } 3502 v = 0; 3503 do { 3504 v = (v << 4) + d; 3505 c = inchar(); 3506 d = hexdigit(c); 3507 } while (d != EOF); 3508 termch = c; 3509 *vp = v; 3510 return 1; 3511 } 3512 3513 static void 3514 scannl(void) 3515 { 3516 int c; 3517 3518 c = termch; 3519 termch = 0; 3520 while( c != '\n' ) 3521 c = inchar(); 3522 } 3523 3524 static int hexdigit(int c) 3525 { 3526 if( '0' <= c && c <= '9' ) 3527 return c - '0'; 3528 if( 'A' <= c && c <= 'F' ) 3529 return c - ('A' - 10); 3530 if( 'a' <= c && c <= 'f' ) 3531 return c - ('a' - 10); 3532 return EOF; 3533 } 3534 3535 void 3536 getstring(char *s, int size) 3537 { 3538 int c; 3539 3540 c = skipbl(); 3541 if (c == '\n') { 3542 *s = 0; 3543 return; 3544 } 3545 3546 do { 3547 if( size > 1 ){ 3548 *s++ = c; 3549 --size; 3550 } 3551 c = inchar(); 3552 } while( c != ' ' && c != '\t' && c != '\n' ); 3553 termch = c; 3554 *s = 0; 3555 } 3556 3557 static char line[256]; 3558 static char *lineptr; 3559 3560 static void 3561 flush_input(void) 3562 { 3563 lineptr = NULL; 3564 } 3565 3566 static int 3567 inchar(void) 3568 { 3569 if (lineptr == NULL || *lineptr == 0) { 3570 if (xmon_gets(line, sizeof(line)) == NULL) { 3571 lineptr = NULL; 3572 return EOF; 3573 } 3574 lineptr = line; 3575 } 3576 return *lineptr++; 3577 } 3578 3579 static void 3580 take_input(char *str) 3581 { 3582 lineptr = str; 3583 } 3584 3585 3586 static void 3587 symbol_lookup(void) 3588 { 3589 int type = inchar(); 3590 unsigned long addr, cpu; 3591 void __percpu *ptr = NULL; 3592 static char tmp[64]; 3593 3594 switch (type) { 3595 case 'a': 3596 if (scanhex(&addr)) 3597 xmon_print_symbol(addr, ": ", "\n"); 3598 termch = 0; 3599 break; 3600 case 's': 3601 getstring(tmp, 64); 3602 if (setjmp(bus_error_jmp) == 0) { 3603 catch_memory_errors = 1; 3604 sync(); 3605 addr = kallsyms_lookup_name(tmp); 3606 if (addr) 3607 printf("%s: %lx\n", tmp, addr); 3608 else 3609 printf("Symbol '%s' not found.\n", tmp); 3610 sync(); 3611 } 3612 catch_memory_errors = 0; 3613 termch = 0; 3614 break; 3615 case 'p': 3616 getstring(tmp, 64); 3617 if (setjmp(bus_error_jmp) == 0) { 3618 catch_memory_errors = 1; 3619 sync(); 3620 ptr = (void __percpu *)kallsyms_lookup_name(tmp); 3621 sync(); 3622 } 3623 3624 if (ptr && 3625 ptr >= (void __percpu *)__per_cpu_start && 3626 ptr < (void __percpu *)__per_cpu_end) 3627 { 3628 if (scanhex(&cpu) && cpu < num_possible_cpus()) { 3629 addr = (unsigned long)per_cpu_ptr(ptr, cpu); 3630 } else { 3631 cpu = raw_smp_processor_id(); 3632 addr = (unsigned long)this_cpu_ptr(ptr); 3633 } 3634 3635 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr); 3636 } else { 3637 printf("Percpu symbol '%s' not found.\n", tmp); 3638 } 3639 3640 catch_memory_errors = 0; 3641 termch = 0; 3642 break; 3643 } 3644 } 3645 3646 3647 /* Print an address in numeric and symbolic form (if possible) */ 3648 static void xmon_print_symbol(unsigned long address, const char *mid, 3649 const char *after) 3650 { 3651 char *modname; 3652 const char *name = NULL; 3653 unsigned long offset, size; 3654 3655 printf(REG, address); 3656 if (setjmp(bus_error_jmp) == 0) { 3657 catch_memory_errors = 1; 3658 sync(); 3659 name = kallsyms_lookup(address, &size, &offset, &modname, 3660 tmpstr); 3661 sync(); 3662 /* wait a little while to see if we get a machine check */ 3663 __delay(200); 3664 } 3665 3666 catch_memory_errors = 0; 3667 3668 if (name) { 3669 printf("%s%s+%#lx/%#lx", mid, name, offset, size); 3670 if (modname) 3671 printf(" [%s]", modname); 3672 } 3673 printf("%s", after); 3674 } 3675 3676 #ifdef CONFIG_PPC_BOOK3S_64 3677 void dump_segments(void) 3678 { 3679 int i; 3680 unsigned long esid,vsid; 3681 unsigned long llp; 3682 3683 printf("SLB contents of cpu 0x%x\n", smp_processor_id()); 3684 3685 for (i = 0; i < mmu_slb_size; i++) { 3686 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i)); 3687 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i)); 3688 3689 if (!esid && !vsid) 3690 continue; 3691 3692 printf("%02d %016lx %016lx", i, esid, vsid); 3693 3694 if (!(esid & SLB_ESID_V)) { 3695 printf("\n"); 3696 continue; 3697 } 3698 3699 llp = vsid & SLB_VSID_LLP; 3700 if (vsid & SLB_VSID_B_1T) { 3701 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n", 3702 GET_ESID_1T(esid), 3703 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T, 3704 llp); 3705 } else { 3706 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n", 3707 GET_ESID(esid), 3708 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT, 3709 llp); 3710 } 3711 } 3712 } 3713 #endif 3714 3715 #ifdef CONFIG_PPC_BOOK3S_32 3716 void dump_segments(void) 3717 { 3718 int i; 3719 3720 printf("sr0-15 ="); 3721 for (i = 0; i < 16; ++i) 3722 printf(" %x", mfsr(i << 28)); 3723 printf("\n"); 3724 } 3725 #endif 3726 3727 #ifdef CONFIG_44x 3728 static void dump_tlb_44x(void) 3729 { 3730 int i; 3731 3732 for (i = 0; i < PPC44x_TLB_SIZE; i++) { 3733 unsigned long w0,w1,w2; 3734 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i)); 3735 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i)); 3736 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i)); 3737 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2); 3738 if (w0 & PPC44x_TLB_VALID) { 3739 printf("V %08lx -> %01lx%08lx %c%c%c%c%c", 3740 w0 & PPC44x_TLB_EPN_MASK, 3741 w1 & PPC44x_TLB_ERPN_MASK, 3742 w1 & PPC44x_TLB_RPN_MASK, 3743 (w2 & PPC44x_TLB_W) ? 'W' : 'w', 3744 (w2 & PPC44x_TLB_I) ? 'I' : 'i', 3745 (w2 & PPC44x_TLB_M) ? 'M' : 'm', 3746 (w2 & PPC44x_TLB_G) ? 'G' : 'g', 3747 (w2 & PPC44x_TLB_E) ? 'E' : 'e'); 3748 } 3749 printf("\n"); 3750 } 3751 } 3752 #endif /* CONFIG_44x */ 3753 3754 #ifdef CONFIG_PPC_BOOK3E 3755 static void dump_tlb_book3e(void) 3756 { 3757 u32 mmucfg, pidmask, lpidmask; 3758 u64 ramask; 3759 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0; 3760 int mmu_version; 3761 static const char *pgsz_names[] = { 3762 " 1K", 3763 " 2K", 3764 " 4K", 3765 " 8K", 3766 " 16K", 3767 " 32K", 3768 " 64K", 3769 "128K", 3770 "256K", 3771 "512K", 3772 " 1M", 3773 " 2M", 3774 " 4M", 3775 " 8M", 3776 " 16M", 3777 " 32M", 3778 " 64M", 3779 "128M", 3780 "256M", 3781 "512M", 3782 " 1G", 3783 " 2G", 3784 " 4G", 3785 " 8G", 3786 " 16G", 3787 " 32G", 3788 " 64G", 3789 "128G", 3790 "256G", 3791 "512G", 3792 " 1T", 3793 " 2T", 3794 }; 3795 3796 /* Gather some infos about the MMU */ 3797 mmucfg = mfspr(SPRN_MMUCFG); 3798 mmu_version = (mmucfg & 3) + 1; 3799 ntlbs = ((mmucfg >> 2) & 3) + 1; 3800 pidsz = ((mmucfg >> 6) & 0x1f) + 1; 3801 lpidsz = (mmucfg >> 24) & 0xf; 3802 rasz = (mmucfg >> 16) & 0x7f; 3803 if ((mmu_version > 1) && (mmucfg & 0x10000)) 3804 lrat = 1; 3805 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n", 3806 mmu_version, ntlbs, pidsz, lpidsz, rasz); 3807 pidmask = (1ul << pidsz) - 1; 3808 lpidmask = (1ul << lpidsz) - 1; 3809 ramask = (1ull << rasz) - 1; 3810 3811 for (tlb = 0; tlb < ntlbs; tlb++) { 3812 u32 tlbcfg; 3813 int nent, assoc, new_cc = 1; 3814 printf("TLB %d:\n------\n", tlb); 3815 switch(tlb) { 3816 case 0: 3817 tlbcfg = mfspr(SPRN_TLB0CFG); 3818 break; 3819 case 1: 3820 tlbcfg = mfspr(SPRN_TLB1CFG); 3821 break; 3822 case 2: 3823 tlbcfg = mfspr(SPRN_TLB2CFG); 3824 break; 3825 case 3: 3826 tlbcfg = mfspr(SPRN_TLB3CFG); 3827 break; 3828 default: 3829 printf("Unsupported TLB number !\n"); 3830 continue; 3831 } 3832 nent = tlbcfg & 0xfff; 3833 assoc = (tlbcfg >> 24) & 0xff; 3834 for (i = 0; i < nent; i++) { 3835 u32 mas0 = MAS0_TLBSEL(tlb); 3836 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K); 3837 u64 mas2 = 0; 3838 u64 mas7_mas3; 3839 int esel = i, cc = i; 3840 3841 if (assoc != 0) { 3842 cc = i / assoc; 3843 esel = i % assoc; 3844 mas2 = cc * 0x1000; 3845 } 3846 3847 mas0 |= MAS0_ESEL(esel); 3848 mtspr(SPRN_MAS0, mas0); 3849 mtspr(SPRN_MAS1, mas1); 3850 mtspr(SPRN_MAS2, mas2); 3851 asm volatile("tlbre 0,0,0" : : : "memory"); 3852 mas1 = mfspr(SPRN_MAS1); 3853 mas2 = mfspr(SPRN_MAS2); 3854 mas7_mas3 = mfspr(SPRN_MAS7_MAS3); 3855 if (assoc && (i % assoc) == 0) 3856 new_cc = 1; 3857 if (!(mas1 & MAS1_VALID)) 3858 continue; 3859 if (assoc == 0) 3860 printf("%04x- ", i); 3861 else if (new_cc) 3862 printf("%04x-%c", cc, 'A' + esel); 3863 else 3864 printf(" |%c", 'A' + esel); 3865 new_cc = 0; 3866 printf(" %016llx %04x %s %c%c AS%c", 3867 mas2 & ~0x3ffull, 3868 (mas1 >> 16) & 0x3fff, 3869 pgsz_names[(mas1 >> 7) & 0x1f], 3870 mas1 & MAS1_IND ? 'I' : ' ', 3871 mas1 & MAS1_IPROT ? 'P' : ' ', 3872 mas1 & MAS1_TS ? '1' : '0'); 3873 printf(" %c%c%c%c%c%c%c", 3874 mas2 & MAS2_X0 ? 'a' : ' ', 3875 mas2 & MAS2_X1 ? 'v' : ' ', 3876 mas2 & MAS2_W ? 'w' : ' ', 3877 mas2 & MAS2_I ? 'i' : ' ', 3878 mas2 & MAS2_M ? 'm' : ' ', 3879 mas2 & MAS2_G ? 'g' : ' ', 3880 mas2 & MAS2_E ? 'e' : ' '); 3881 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull); 3882 if (mas1 & MAS1_IND) 3883 printf(" %s\n", 3884 pgsz_names[(mas7_mas3 >> 1) & 0x1f]); 3885 else 3886 printf(" U%c%c%c S%c%c%c\n", 3887 mas7_mas3 & MAS3_UX ? 'x' : ' ', 3888 mas7_mas3 & MAS3_UW ? 'w' : ' ', 3889 mas7_mas3 & MAS3_UR ? 'r' : ' ', 3890 mas7_mas3 & MAS3_SX ? 'x' : ' ', 3891 mas7_mas3 & MAS3_SW ? 'w' : ' ', 3892 mas7_mas3 & MAS3_SR ? 'r' : ' '); 3893 } 3894 } 3895 } 3896 #endif /* CONFIG_PPC_BOOK3E */ 3897 3898 static void xmon_init(int enable) 3899 { 3900 if (enable) { 3901 __debugger = xmon; 3902 __debugger_ipi = xmon_ipi; 3903 __debugger_bpt = xmon_bpt; 3904 __debugger_sstep = xmon_sstep; 3905 __debugger_iabr_match = xmon_iabr_match; 3906 __debugger_break_match = xmon_break_match; 3907 __debugger_fault_handler = xmon_fault_handler; 3908 3909 #ifdef CONFIG_PPC_PSERIES 3910 /* 3911 * Get the token here to avoid trying to get a lock 3912 * during the crash, causing a deadlock. 3913 */ 3914 set_indicator_token = rtas_token("set-indicator"); 3915 #endif 3916 } else { 3917 __debugger = NULL; 3918 __debugger_ipi = NULL; 3919 __debugger_bpt = NULL; 3920 __debugger_sstep = NULL; 3921 __debugger_iabr_match = NULL; 3922 __debugger_break_match = NULL; 3923 __debugger_fault_handler = NULL; 3924 } 3925 } 3926 3927 #ifdef CONFIG_MAGIC_SYSRQ 3928 static void sysrq_handle_xmon(int key) 3929 { 3930 if (xmon_is_locked_down()) { 3931 clear_all_bpt(); 3932 xmon_init(0); 3933 return; 3934 } 3935 /* ensure xmon is enabled */ 3936 xmon_init(1); 3937 debugger(get_irq_regs()); 3938 if (!xmon_on) 3939 xmon_init(0); 3940 } 3941 3942 static const struct sysrq_key_op sysrq_xmon_op = { 3943 .handler = sysrq_handle_xmon, 3944 .help_msg = "xmon(x)", 3945 .action_msg = "Entering xmon", 3946 }; 3947 3948 static int __init setup_xmon_sysrq(void) 3949 { 3950 register_sysrq_key('x', &sysrq_xmon_op); 3951 return 0; 3952 } 3953 device_initcall(setup_xmon_sysrq); 3954 #endif /* CONFIG_MAGIC_SYSRQ */ 3955 3956 static void clear_all_bpt(void) 3957 { 3958 int i; 3959 3960 /* clear/unpatch all breakpoints */ 3961 remove_bpts(); 3962 remove_cpu_bpts(); 3963 3964 /* Disable all breakpoints */ 3965 for (i = 0; i < NBPTS; ++i) 3966 bpts[i].enabled = 0; 3967 3968 /* Clear any data or iabr breakpoints */ 3969 iabr = NULL; 3970 for (i = 0; i < nr_wp_slots(); i++) 3971 dabr[i].enabled = 0; 3972 } 3973 3974 #ifdef CONFIG_DEBUG_FS 3975 static int xmon_dbgfs_set(void *data, u64 val) 3976 { 3977 xmon_on = !!val; 3978 xmon_init(xmon_on); 3979 3980 /* make sure all breakpoints removed when disabling */ 3981 if (!xmon_on) { 3982 clear_all_bpt(); 3983 get_output_lock(); 3984 printf("xmon: All breakpoints cleared\n"); 3985 release_output_lock(); 3986 } 3987 3988 return 0; 3989 } 3990 3991 static int xmon_dbgfs_get(void *data, u64 *val) 3992 { 3993 *val = xmon_on; 3994 return 0; 3995 } 3996 3997 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get, 3998 xmon_dbgfs_set, "%llu\n"); 3999 4000 static int __init setup_xmon_dbgfs(void) 4001 { 4002 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL, 4003 &xmon_dbgfs_ops); 4004 return 0; 4005 } 4006 device_initcall(setup_xmon_dbgfs); 4007 #endif /* CONFIG_DEBUG_FS */ 4008 4009 static int xmon_early __initdata; 4010 4011 static int __init early_parse_xmon(char *p) 4012 { 4013 if (xmon_is_locked_down()) { 4014 xmon_init(0); 4015 xmon_early = 0; 4016 xmon_on = 0; 4017 } else if (!p || strncmp(p, "early", 5) == 0) { 4018 /* just "xmon" is equivalent to "xmon=early" */ 4019 xmon_init(1); 4020 xmon_early = 1; 4021 xmon_on = 1; 4022 } else if (strncmp(p, "on", 2) == 0) { 4023 xmon_init(1); 4024 xmon_on = 1; 4025 } else if (strncmp(p, "rw", 2) == 0) { 4026 xmon_init(1); 4027 xmon_on = 1; 4028 xmon_is_ro = false; 4029 } else if (strncmp(p, "ro", 2) == 0) { 4030 xmon_init(1); 4031 xmon_on = 1; 4032 xmon_is_ro = true; 4033 } else if (strncmp(p, "off", 3) == 0) 4034 xmon_on = 0; 4035 else 4036 return 1; 4037 4038 return 0; 4039 } 4040 early_param("xmon", early_parse_xmon); 4041 4042 void __init xmon_setup(void) 4043 { 4044 if (xmon_on) 4045 xmon_init(1); 4046 if (xmon_early) 4047 debugger(NULL); 4048 } 4049 4050 #ifdef CONFIG_SPU_BASE 4051 4052 struct spu_info { 4053 struct spu *spu; 4054 u64 saved_mfc_sr1_RW; 4055 u32 saved_spu_runcntl_RW; 4056 unsigned long dump_addr; 4057 u8 stopped_ok; 4058 }; 4059 4060 #define XMON_NUM_SPUS 16 /* Enough for current hardware */ 4061 4062 static struct spu_info spu_info[XMON_NUM_SPUS]; 4063 4064 void xmon_register_spus(struct list_head *list) 4065 { 4066 struct spu *spu; 4067 4068 list_for_each_entry(spu, list, full_list) { 4069 if (spu->number >= XMON_NUM_SPUS) { 4070 WARN_ON(1); 4071 continue; 4072 } 4073 4074 spu_info[spu->number].spu = spu; 4075 spu_info[spu->number].stopped_ok = 0; 4076 spu_info[spu->number].dump_addr = (unsigned long) 4077 spu_info[spu->number].spu->local_store; 4078 } 4079 } 4080 4081 static void stop_spus(void) 4082 { 4083 struct spu *spu; 4084 int i; 4085 u64 tmp; 4086 4087 for (i = 0; i < XMON_NUM_SPUS; i++) { 4088 if (!spu_info[i].spu) 4089 continue; 4090 4091 if (setjmp(bus_error_jmp) == 0) { 4092 catch_memory_errors = 1; 4093 sync(); 4094 4095 spu = spu_info[i].spu; 4096 4097 spu_info[i].saved_spu_runcntl_RW = 4098 in_be32(&spu->problem->spu_runcntl_RW); 4099 4100 tmp = spu_mfc_sr1_get(spu); 4101 spu_info[i].saved_mfc_sr1_RW = tmp; 4102 4103 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 4104 spu_mfc_sr1_set(spu, tmp); 4105 4106 sync(); 4107 __delay(200); 4108 4109 spu_info[i].stopped_ok = 1; 4110 4111 printf("Stopped spu %.2d (was %s)\n", i, 4112 spu_info[i].saved_spu_runcntl_RW ? 4113 "running" : "stopped"); 4114 } else { 4115 catch_memory_errors = 0; 4116 printf("*** Error stopping spu %.2d\n", i); 4117 } 4118 catch_memory_errors = 0; 4119 } 4120 } 4121 4122 static void restart_spus(void) 4123 { 4124 struct spu *spu; 4125 int i; 4126 4127 for (i = 0; i < XMON_NUM_SPUS; i++) { 4128 if (!spu_info[i].spu) 4129 continue; 4130 4131 if (!spu_info[i].stopped_ok) { 4132 printf("*** Error, spu %d was not successfully stopped" 4133 ", not restarting\n", i); 4134 continue; 4135 } 4136 4137 if (setjmp(bus_error_jmp) == 0) { 4138 catch_memory_errors = 1; 4139 sync(); 4140 4141 spu = spu_info[i].spu; 4142 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW); 4143 out_be32(&spu->problem->spu_runcntl_RW, 4144 spu_info[i].saved_spu_runcntl_RW); 4145 4146 sync(); 4147 __delay(200); 4148 4149 printf("Restarted spu %.2d\n", i); 4150 } else { 4151 catch_memory_errors = 0; 4152 printf("*** Error restarting spu %.2d\n", i); 4153 } 4154 catch_memory_errors = 0; 4155 } 4156 } 4157 4158 #define DUMP_WIDTH 23 4159 #define DUMP_VALUE(format, field, value) \ 4160 do { \ 4161 if (setjmp(bus_error_jmp) == 0) { \ 4162 catch_memory_errors = 1; \ 4163 sync(); \ 4164 printf(" %-*s = "format"\n", DUMP_WIDTH, \ 4165 #field, value); \ 4166 sync(); \ 4167 __delay(200); \ 4168 } else { \ 4169 catch_memory_errors = 0; \ 4170 printf(" %-*s = *** Error reading field.\n", \ 4171 DUMP_WIDTH, #field); \ 4172 } \ 4173 catch_memory_errors = 0; \ 4174 } while (0) 4175 4176 #define DUMP_FIELD(obj, format, field) \ 4177 DUMP_VALUE(format, field, obj->field) 4178 4179 static void dump_spu_fields(struct spu *spu) 4180 { 4181 printf("Dumping spu fields at address %p:\n", spu); 4182 4183 DUMP_FIELD(spu, "0x%x", number); 4184 DUMP_FIELD(spu, "%s", name); 4185 DUMP_FIELD(spu, "0x%lx", local_store_phys); 4186 DUMP_FIELD(spu, "0x%p", local_store); 4187 DUMP_FIELD(spu, "0x%lx", ls_size); 4188 DUMP_FIELD(spu, "0x%x", node); 4189 DUMP_FIELD(spu, "0x%lx", flags); 4190 DUMP_FIELD(spu, "%llu", class_0_pending); 4191 DUMP_FIELD(spu, "0x%llx", class_0_dar); 4192 DUMP_FIELD(spu, "0x%llx", class_1_dar); 4193 DUMP_FIELD(spu, "0x%llx", class_1_dsisr); 4194 DUMP_FIELD(spu, "0x%x", irqs[0]); 4195 DUMP_FIELD(spu, "0x%x", irqs[1]); 4196 DUMP_FIELD(spu, "0x%x", irqs[2]); 4197 DUMP_FIELD(spu, "0x%x", slb_replace); 4198 DUMP_FIELD(spu, "%d", pid); 4199 DUMP_FIELD(spu, "0x%p", mm); 4200 DUMP_FIELD(spu, "0x%p", ctx); 4201 DUMP_FIELD(spu, "0x%p", rq); 4202 DUMP_FIELD(spu, "0x%llx", timestamp); 4203 DUMP_FIELD(spu, "0x%lx", problem_phys); 4204 DUMP_FIELD(spu, "0x%p", problem); 4205 DUMP_VALUE("0x%x", problem->spu_runcntl_RW, 4206 in_be32(&spu->problem->spu_runcntl_RW)); 4207 DUMP_VALUE("0x%x", problem->spu_status_R, 4208 in_be32(&spu->problem->spu_status_R)); 4209 DUMP_VALUE("0x%x", problem->spu_npc_RW, 4210 in_be32(&spu->problem->spu_npc_RW)); 4211 DUMP_FIELD(spu, "0x%p", priv2); 4212 DUMP_FIELD(spu, "0x%p", pdata); 4213 } 4214 4215 int 4216 spu_inst_dump(unsigned long adr, long count, int praddr) 4217 { 4218 return generic_inst_dump(adr, count, praddr, print_insn_spu); 4219 } 4220 4221 static void dump_spu_ls(unsigned long num, int subcmd) 4222 { 4223 unsigned long offset, addr, ls_addr; 4224 4225 if (setjmp(bus_error_jmp) == 0) { 4226 catch_memory_errors = 1; 4227 sync(); 4228 ls_addr = (unsigned long)spu_info[num].spu->local_store; 4229 sync(); 4230 __delay(200); 4231 } else { 4232 catch_memory_errors = 0; 4233 printf("*** Error: accessing spu info for spu %ld\n", num); 4234 return; 4235 } 4236 catch_memory_errors = 0; 4237 4238 if (scanhex(&offset)) 4239 addr = ls_addr + offset; 4240 else 4241 addr = spu_info[num].dump_addr; 4242 4243 if (addr >= ls_addr + LS_SIZE) { 4244 printf("*** Error: address outside of local store\n"); 4245 return; 4246 } 4247 4248 switch (subcmd) { 4249 case 'i': 4250 addr += spu_inst_dump(addr, 16, 1); 4251 last_cmd = "sdi\n"; 4252 break; 4253 default: 4254 prdump(addr, 64); 4255 addr += 64; 4256 last_cmd = "sd\n"; 4257 break; 4258 } 4259 4260 spu_info[num].dump_addr = addr; 4261 } 4262 4263 static int do_spu_cmd(void) 4264 { 4265 static unsigned long num = 0; 4266 int cmd, subcmd = 0; 4267 4268 cmd = inchar(); 4269 switch (cmd) { 4270 case 's': 4271 stop_spus(); 4272 break; 4273 case 'r': 4274 restart_spus(); 4275 break; 4276 case 'd': 4277 subcmd = inchar(); 4278 if (isxdigit(subcmd) || subcmd == '\n') 4279 termch = subcmd; 4280 fallthrough; 4281 case 'f': 4282 scanhex(&num); 4283 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) { 4284 printf("*** Error: invalid spu number\n"); 4285 return 0; 4286 } 4287 4288 switch (cmd) { 4289 case 'f': 4290 dump_spu_fields(spu_info[num].spu); 4291 break; 4292 default: 4293 dump_spu_ls(num, subcmd); 4294 break; 4295 } 4296 4297 break; 4298 default: 4299 return -1; 4300 } 4301 4302 return 0; 4303 } 4304 #else /* ! CONFIG_SPU_BASE */ 4305 static int do_spu_cmd(void) 4306 { 4307 return -1; 4308 } 4309 #endif 4310