1 /* 2 * Routines providing a simple monitor for use on the PowerMac. 3 * 4 * Copyright (C) 1996-2005 Paul Mackerras. 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 11 * 2 of the License, or (at your option) any later version. 12 */ 13 14 #include <linux/kernel.h> 15 #include <linux/errno.h> 16 #include <linux/sched/signal.h> 17 #include <linux/smp.h> 18 #include <linux/mm.h> 19 #include <linux/reboot.h> 20 #include <linux/delay.h> 21 #include <linux/kallsyms.h> 22 #include <linux/kmsg_dump.h> 23 #include <linux/cpumask.h> 24 #include <linux/export.h> 25 #include <linux/sysrq.h> 26 #include <linux/interrupt.h> 27 #include <linux/irq.h> 28 #include <linux/bug.h> 29 #include <linux/nmi.h> 30 #include <linux/ctype.h> 31 #include <linux/highmem.h> 32 33 #include <asm/debugfs.h> 34 #include <asm/ptrace.h> 35 #include <asm/smp.h> 36 #include <asm/string.h> 37 #include <asm/prom.h> 38 #include <asm/machdep.h> 39 #include <asm/xmon.h> 40 #include <asm/processor.h> 41 #include <asm/pgtable.h> 42 #include <asm/mmu.h> 43 #include <asm/mmu_context.h> 44 #include <asm/plpar_wrappers.h> 45 #include <asm/cputable.h> 46 #include <asm/rtas.h> 47 #include <asm/sstep.h> 48 #include <asm/irq_regs.h> 49 #include <asm/spu.h> 50 #include <asm/spu_priv1.h> 51 #include <asm/setjmp.h> 52 #include <asm/reg.h> 53 #include <asm/debug.h> 54 #include <asm/hw_breakpoint.h> 55 #include <asm/xive.h> 56 #include <asm/opal.h> 57 #include <asm/firmware.h> 58 #include <asm/code-patching.h> 59 #include <asm/sections.h> 60 61 #ifdef CONFIG_PPC64 62 #include <asm/hvcall.h> 63 #include <asm/paca.h> 64 #endif 65 66 #include "nonstdio.h" 67 #include "dis-asm.h" 68 69 #ifdef CONFIG_SMP 70 static cpumask_t cpus_in_xmon = CPU_MASK_NONE; 71 static unsigned long xmon_taken = 1; 72 static int xmon_owner; 73 static int xmon_gate; 74 #else 75 #define xmon_owner 0 76 #endif /* CONFIG_SMP */ 77 78 static unsigned long in_xmon __read_mostly = 0; 79 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT); 80 81 static unsigned long adrs; 82 static int size = 1; 83 #define MAX_DUMP (128 * 1024) 84 static unsigned long ndump = 64; 85 static unsigned long nidump = 16; 86 static unsigned long ncsum = 4096; 87 static int termch; 88 static char tmpstr[128]; 89 static int tracing_enabled; 90 91 static long bus_error_jmp[JMP_BUF_LEN]; 92 static int catch_memory_errors; 93 static int catch_spr_faults; 94 static long *xmon_fault_jmp[NR_CPUS]; 95 96 /* Breakpoint stuff */ 97 struct bpt { 98 unsigned long address; 99 unsigned int instr[2]; 100 atomic_t ref_count; 101 int enabled; 102 unsigned long pad; 103 }; 104 105 /* Bits in bpt.enabled */ 106 #define BP_CIABR 1 107 #define BP_TRAP 2 108 #define BP_DABR 4 109 110 #define NBPTS 256 111 static struct bpt bpts[NBPTS]; 112 static struct bpt dabr; 113 static struct bpt *iabr; 114 static unsigned bpinstr = 0x7fe00008; /* trap */ 115 116 #define BP_NUM(bp) ((bp) - bpts + 1) 117 118 /* Prototypes */ 119 static int cmds(struct pt_regs *); 120 static int mread(unsigned long, void *, int); 121 static int mwrite(unsigned long, void *, int); 122 static int handle_fault(struct pt_regs *); 123 static void byterev(unsigned char *, int); 124 static void memex(void); 125 static int bsesc(void); 126 static void dump(void); 127 static void show_pte(unsigned long); 128 static void prdump(unsigned long, long); 129 static int ppc_inst_dump(unsigned long, long, int); 130 static void dump_log_buf(void); 131 132 #ifdef CONFIG_PPC_POWERNV 133 static void dump_opal_msglog(void); 134 #else 135 static inline void dump_opal_msglog(void) 136 { 137 printf("Machine is not running OPAL firmware.\n"); 138 } 139 #endif 140 141 static void backtrace(struct pt_regs *); 142 static void excprint(struct pt_regs *); 143 static void prregs(struct pt_regs *); 144 static void memops(int); 145 static void memlocate(void); 146 static void memzcan(void); 147 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned); 148 int skipbl(void); 149 int scanhex(unsigned long *valp); 150 static void scannl(void); 151 static int hexdigit(int); 152 void getstring(char *, int); 153 static void flush_input(void); 154 static int inchar(void); 155 static void take_input(char *); 156 static int read_spr(int, unsigned long *); 157 static void write_spr(int, unsigned long); 158 static void super_regs(void); 159 static void remove_bpts(void); 160 static void insert_bpts(void); 161 static void remove_cpu_bpts(void); 162 static void insert_cpu_bpts(void); 163 static struct bpt *at_breakpoint(unsigned long pc); 164 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp); 165 static int do_step(struct pt_regs *); 166 static void bpt_cmds(void); 167 static void cacheflush(void); 168 static int cpu_cmd(void); 169 static void csum(void); 170 static void bootcmds(void); 171 static void proccall(void); 172 static void show_tasks(void); 173 void dump_segments(void); 174 static void symbol_lookup(void); 175 static void xmon_show_stack(unsigned long sp, unsigned long lr, 176 unsigned long pc); 177 static void xmon_print_symbol(unsigned long address, const char *mid, 178 const char *after); 179 static const char *getvecname(unsigned long vec); 180 181 static int do_spu_cmd(void); 182 183 #ifdef CONFIG_44x 184 static void dump_tlb_44x(void); 185 #endif 186 #ifdef CONFIG_PPC_BOOK3E 187 static void dump_tlb_book3e(void); 188 #endif 189 190 #ifdef CONFIG_PPC64 191 #define REG "%.16lx" 192 #else 193 #define REG "%.8lx" 194 #endif 195 196 #ifdef __LITTLE_ENDIAN__ 197 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0]) 198 #else 199 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3]) 200 #endif 201 202 static char *help_string = "\ 203 Commands:\n\ 204 b show breakpoints\n\ 205 bd set data breakpoint\n\ 206 bi set instruction breakpoint\n\ 207 bc clear breakpoint\n" 208 #ifdef CONFIG_SMP 209 "\ 210 c print cpus stopped in xmon\n\ 211 c# try to switch to cpu number h (in hex)\n" 212 #endif 213 "\ 214 C checksum\n\ 215 d dump bytes\n\ 216 d1 dump 1 byte values\n\ 217 d2 dump 2 byte values\n\ 218 d4 dump 4 byte values\n\ 219 d8 dump 8 byte values\n\ 220 di dump instructions\n\ 221 df dump float values\n\ 222 dd dump double values\n\ 223 dl dump the kernel log buffer\n" 224 #ifdef CONFIG_PPC_POWERNV 225 "\ 226 do dump the OPAL message log\n" 227 #endif 228 #ifdef CONFIG_PPC64 229 "\ 230 dp[#] dump paca for current cpu, or cpu #\n\ 231 dpa dump paca for all possible cpus\n" 232 #endif 233 "\ 234 dr dump stream of raw bytes\n\ 235 dv dump virtual address translation \n\ 236 dt dump the tracing buffers (uses printk)\n\ 237 dtc dump the tracing buffers for current CPU (uses printk)\n\ 238 " 239 #ifdef CONFIG_PPC_POWERNV 240 " dx# dump xive on CPU #\n\ 241 dxi# dump xive irq state #\n\ 242 dxa dump xive on all CPUs\n" 243 #endif 244 " e print exception information\n\ 245 f flush cache\n\ 246 la lookup symbol+offset of specified address\n\ 247 ls lookup address of specified symbol\n\ 248 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\ 249 m examine/change memory\n\ 250 mm move a block of memory\n\ 251 ms set a block of memory\n\ 252 md compare two blocks of memory\n\ 253 ml locate a block of memory\n\ 254 mz zero a block of memory\n\ 255 mi show information about memory allocation\n\ 256 p call a procedure\n\ 257 P list processes/tasks\n\ 258 r print registers\n\ 259 s single step\n" 260 #ifdef CONFIG_SPU_BASE 261 " ss stop execution on all spus\n\ 262 sr restore execution on stopped spus\n\ 263 sf # dump spu fields for spu # (in hex)\n\ 264 sd # dump spu local store for spu # (in hex)\n\ 265 sdi # disassemble spu local store for spu # (in hex)\n" 266 #endif 267 " S print special registers\n\ 268 Sa print all SPRs\n\ 269 Sr # read SPR #\n\ 270 Sw #v write v to SPR #\n\ 271 t print backtrace\n\ 272 x exit monitor and recover\n\ 273 X exit monitor and don't recover\n" 274 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E) 275 " u dump segment table or SLB\n" 276 #elif defined(CONFIG_PPC_STD_MMU_32) 277 " u dump segment registers\n" 278 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E) 279 " u dump TLB\n" 280 #endif 281 " U show uptime information\n" 282 " ? help\n" 283 " # n limit output to n lines per page (for dp, dpa, dl)\n" 284 " zr reboot\n\ 285 zh halt\n" 286 ; 287 288 static struct pt_regs *xmon_regs; 289 290 static inline void sync(void) 291 { 292 asm volatile("sync; isync"); 293 } 294 295 static inline void store_inst(void *p) 296 { 297 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p)); 298 } 299 300 static inline void cflush(void *p) 301 { 302 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p)); 303 } 304 305 static inline void cinval(void *p) 306 { 307 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p)); 308 } 309 310 /** 311 * write_ciabr() - write the CIABR SPR 312 * @ciabr: The value to write. 313 * 314 * This function writes a value to the CIARB register either directly 315 * through mtspr instruction if the kernel is in HV privilege mode or 316 * call a hypervisor function to achieve the same in case the kernel 317 * is in supervisor privilege mode. 318 */ 319 static void write_ciabr(unsigned long ciabr) 320 { 321 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 322 return; 323 324 if (cpu_has_feature(CPU_FTR_HVMODE)) { 325 mtspr(SPRN_CIABR, ciabr); 326 return; 327 } 328 plpar_set_ciabr(ciabr); 329 } 330 331 /** 332 * set_ciabr() - set the CIABR 333 * @addr: The value to set. 334 * 335 * This function sets the correct privilege value into the the HW 336 * breakpoint address before writing it up in the CIABR register. 337 */ 338 static void set_ciabr(unsigned long addr) 339 { 340 addr &= ~CIABR_PRIV; 341 342 if (cpu_has_feature(CPU_FTR_HVMODE)) 343 addr |= CIABR_PRIV_HYPER; 344 else 345 addr |= CIABR_PRIV_SUPER; 346 write_ciabr(addr); 347 } 348 349 /* 350 * Disable surveillance (the service processor watchdog function) 351 * while we are in xmon. 352 * XXX we should re-enable it when we leave. :) 353 */ 354 #define SURVEILLANCE_TOKEN 9000 355 356 static inline void disable_surveillance(void) 357 { 358 #ifdef CONFIG_PPC_PSERIES 359 /* Since this can't be a module, args should end up below 4GB. */ 360 static struct rtas_args args; 361 int token; 362 363 /* 364 * At this point we have got all the cpus we can into 365 * xmon, so there is hopefully no other cpu calling RTAS 366 * at the moment, even though we don't take rtas.lock. 367 * If we did try to take rtas.lock there would be a 368 * real possibility of deadlock. 369 */ 370 token = rtas_token("set-indicator"); 371 if (token == RTAS_UNKNOWN_SERVICE) 372 return; 373 374 rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0); 375 376 #endif /* CONFIG_PPC_PSERIES */ 377 } 378 379 #ifdef CONFIG_SMP 380 static int xmon_speaker; 381 382 static void get_output_lock(void) 383 { 384 int me = smp_processor_id() + 0x100; 385 int last_speaker = 0, prev; 386 long timeout; 387 388 if (xmon_speaker == me) 389 return; 390 391 for (;;) { 392 last_speaker = cmpxchg(&xmon_speaker, 0, me); 393 if (last_speaker == 0) 394 return; 395 396 /* 397 * Wait a full second for the lock, we might be on a slow 398 * console, but check every 100us. 399 */ 400 timeout = 10000; 401 while (xmon_speaker == last_speaker) { 402 if (--timeout > 0) { 403 udelay(100); 404 continue; 405 } 406 407 /* hostile takeover */ 408 prev = cmpxchg(&xmon_speaker, last_speaker, me); 409 if (prev == last_speaker) 410 return; 411 break; 412 } 413 } 414 } 415 416 static void release_output_lock(void) 417 { 418 xmon_speaker = 0; 419 } 420 421 int cpus_are_in_xmon(void) 422 { 423 return !cpumask_empty(&cpus_in_xmon); 424 } 425 426 static bool wait_for_other_cpus(int ncpus) 427 { 428 unsigned long timeout; 429 430 /* We wait for 2s, which is a metric "little while" */ 431 for (timeout = 20000; timeout != 0; --timeout) { 432 if (cpumask_weight(&cpus_in_xmon) >= ncpus) 433 return true; 434 udelay(100); 435 barrier(); 436 } 437 438 return false; 439 } 440 #endif /* CONFIG_SMP */ 441 442 static inline int unrecoverable_excp(struct pt_regs *regs) 443 { 444 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E) 445 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */ 446 return 0; 447 #else 448 return ((regs->msr & MSR_RI) == 0); 449 #endif 450 } 451 452 static int xmon_core(struct pt_regs *regs, int fromipi) 453 { 454 int cmd = 0; 455 struct bpt *bp; 456 long recurse_jmp[JMP_BUF_LEN]; 457 unsigned long offset; 458 unsigned long flags; 459 #ifdef CONFIG_SMP 460 int cpu; 461 int secondary; 462 #endif 463 464 local_irq_save(flags); 465 hard_irq_disable(); 466 467 tracing_enabled = tracing_is_on(); 468 tracing_off(); 469 470 bp = in_breakpoint_table(regs->nip, &offset); 471 if (bp != NULL) { 472 regs->nip = bp->address + offset; 473 atomic_dec(&bp->ref_count); 474 } 475 476 remove_cpu_bpts(); 477 478 #ifdef CONFIG_SMP 479 cpu = smp_processor_id(); 480 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 481 /* 482 * We catch SPR read/write faults here because the 0x700, 0xf60 483 * etc. handlers don't call debugger_fault_handler(). 484 */ 485 if (catch_spr_faults) 486 longjmp(bus_error_jmp, 1); 487 get_output_lock(); 488 excprint(regs); 489 printf("cpu 0x%x: Exception %lx %s in xmon, " 490 "returning to main loop\n", 491 cpu, regs->trap, getvecname(TRAP(regs))); 492 release_output_lock(); 493 longjmp(xmon_fault_jmp[cpu], 1); 494 } 495 496 if (setjmp(recurse_jmp) != 0) { 497 if (!in_xmon || !xmon_gate) { 498 get_output_lock(); 499 printf("xmon: WARNING: bad recursive fault " 500 "on cpu 0x%x\n", cpu); 501 release_output_lock(); 502 goto waiting; 503 } 504 secondary = !(xmon_taken && cpu == xmon_owner); 505 goto cmdloop; 506 } 507 508 xmon_fault_jmp[cpu] = recurse_jmp; 509 510 bp = NULL; 511 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) 512 bp = at_breakpoint(regs->nip); 513 if (bp || unrecoverable_excp(regs)) 514 fromipi = 0; 515 516 if (!fromipi) { 517 get_output_lock(); 518 excprint(regs); 519 if (bp) { 520 printf("cpu 0x%x stopped at breakpoint 0x%tx (", 521 cpu, BP_NUM(bp)); 522 xmon_print_symbol(regs->nip, " ", ")\n"); 523 } 524 if (unrecoverable_excp(regs)) 525 printf("WARNING: exception is not recoverable, " 526 "can't continue\n"); 527 release_output_lock(); 528 } 529 530 cpumask_set_cpu(cpu, &cpus_in_xmon); 531 532 waiting: 533 secondary = 1; 534 spin_begin(); 535 while (secondary && !xmon_gate) { 536 if (in_xmon == 0) { 537 if (fromipi) { 538 spin_end(); 539 goto leave; 540 } 541 secondary = test_and_set_bit(0, &in_xmon); 542 } 543 spin_cpu_relax(); 544 touch_nmi_watchdog(); 545 } 546 spin_end(); 547 548 if (!secondary && !xmon_gate) { 549 /* we are the first cpu to come in */ 550 /* interrupt other cpu(s) */ 551 int ncpus = num_online_cpus(); 552 553 xmon_owner = cpu; 554 mb(); 555 if (ncpus > 1) { 556 /* 557 * A system reset (trap == 0x100) can be triggered on 558 * all CPUs, so when we come in via 0x100 try waiting 559 * for the other CPUs to come in before we send the 560 * debugger break (IPI). This is similar to 561 * crash_kexec_secondary(). 562 */ 563 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus)) 564 smp_send_debugger_break(); 565 566 wait_for_other_cpus(ncpus); 567 } 568 remove_bpts(); 569 disable_surveillance(); 570 /* for breakpoint or single step, print the current instr. */ 571 if (bp || TRAP(regs) == 0xd00) 572 ppc_inst_dump(regs->nip, 1, 0); 573 printf("enter ? for help\n"); 574 mb(); 575 xmon_gate = 1; 576 barrier(); 577 touch_nmi_watchdog(); 578 } 579 580 cmdloop: 581 while (in_xmon) { 582 if (secondary) { 583 spin_begin(); 584 if (cpu == xmon_owner) { 585 if (!test_and_set_bit(0, &xmon_taken)) { 586 secondary = 0; 587 spin_end(); 588 continue; 589 } 590 /* missed it */ 591 while (cpu == xmon_owner) 592 spin_cpu_relax(); 593 } 594 spin_cpu_relax(); 595 touch_nmi_watchdog(); 596 } else { 597 cmd = cmds(regs); 598 if (cmd != 0) { 599 /* exiting xmon */ 600 insert_bpts(); 601 xmon_gate = 0; 602 wmb(); 603 in_xmon = 0; 604 break; 605 } 606 /* have switched to some other cpu */ 607 secondary = 1; 608 } 609 } 610 leave: 611 cpumask_clear_cpu(cpu, &cpus_in_xmon); 612 xmon_fault_jmp[cpu] = NULL; 613 #else 614 /* UP is simple... */ 615 if (in_xmon) { 616 printf("Exception %lx %s in xmon, returning to main loop\n", 617 regs->trap, getvecname(TRAP(regs))); 618 longjmp(xmon_fault_jmp[0], 1); 619 } 620 if (setjmp(recurse_jmp) == 0) { 621 xmon_fault_jmp[0] = recurse_jmp; 622 in_xmon = 1; 623 624 excprint(regs); 625 bp = at_breakpoint(regs->nip); 626 if (bp) { 627 printf("Stopped at breakpoint %tx (", BP_NUM(bp)); 628 xmon_print_symbol(regs->nip, " ", ")\n"); 629 } 630 if (unrecoverable_excp(regs)) 631 printf("WARNING: exception is not recoverable, " 632 "can't continue\n"); 633 remove_bpts(); 634 disable_surveillance(); 635 /* for breakpoint or single step, print the current instr. */ 636 if (bp || TRAP(regs) == 0xd00) 637 ppc_inst_dump(regs->nip, 1, 0); 638 printf("enter ? for help\n"); 639 } 640 641 cmd = cmds(regs); 642 643 insert_bpts(); 644 in_xmon = 0; 645 #endif 646 647 #ifdef CONFIG_BOOKE 648 if (regs->msr & MSR_DE) { 649 bp = at_breakpoint(regs->nip); 650 if (bp != NULL) { 651 regs->nip = (unsigned long) &bp->instr[0]; 652 atomic_inc(&bp->ref_count); 653 } 654 } 655 #else 656 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 657 bp = at_breakpoint(regs->nip); 658 if (bp != NULL) { 659 int stepped = emulate_step(regs, bp->instr[0]); 660 if (stepped == 0) { 661 regs->nip = (unsigned long) &bp->instr[0]; 662 atomic_inc(&bp->ref_count); 663 } else if (stepped < 0) { 664 printf("Couldn't single-step %s instruction\n", 665 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd")); 666 } 667 } 668 } 669 #endif 670 insert_cpu_bpts(); 671 672 touch_nmi_watchdog(); 673 local_irq_restore(flags); 674 675 return cmd != 'X' && cmd != EOF; 676 } 677 678 int xmon(struct pt_regs *excp) 679 { 680 struct pt_regs regs; 681 682 if (excp == NULL) { 683 ppc_save_regs(®s); 684 excp = ®s; 685 } 686 687 return xmon_core(excp, 0); 688 } 689 EXPORT_SYMBOL(xmon); 690 691 irqreturn_t xmon_irq(int irq, void *d) 692 { 693 unsigned long flags; 694 local_irq_save(flags); 695 printf("Keyboard interrupt\n"); 696 xmon(get_irq_regs()); 697 local_irq_restore(flags); 698 return IRQ_HANDLED; 699 } 700 701 static int xmon_bpt(struct pt_regs *regs) 702 { 703 struct bpt *bp; 704 unsigned long offset; 705 706 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 707 return 0; 708 709 /* Are we at the trap at bp->instr[1] for some bp? */ 710 bp = in_breakpoint_table(regs->nip, &offset); 711 if (bp != NULL && offset == 4) { 712 regs->nip = bp->address + 4; 713 atomic_dec(&bp->ref_count); 714 return 1; 715 } 716 717 /* Are we at a breakpoint? */ 718 bp = at_breakpoint(regs->nip); 719 if (!bp) 720 return 0; 721 722 xmon_core(regs, 0); 723 724 return 1; 725 } 726 727 static int xmon_sstep(struct pt_regs *regs) 728 { 729 if (user_mode(regs)) 730 return 0; 731 xmon_core(regs, 0); 732 return 1; 733 } 734 735 static int xmon_break_match(struct pt_regs *regs) 736 { 737 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 738 return 0; 739 if (dabr.enabled == 0) 740 return 0; 741 xmon_core(regs, 0); 742 return 1; 743 } 744 745 static int xmon_iabr_match(struct pt_regs *regs) 746 { 747 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 748 return 0; 749 if (iabr == NULL) 750 return 0; 751 xmon_core(regs, 0); 752 return 1; 753 } 754 755 static int xmon_ipi(struct pt_regs *regs) 756 { 757 #ifdef CONFIG_SMP 758 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon)) 759 xmon_core(regs, 1); 760 #endif 761 return 0; 762 } 763 764 static int xmon_fault_handler(struct pt_regs *regs) 765 { 766 struct bpt *bp; 767 unsigned long offset; 768 769 if (in_xmon && catch_memory_errors) 770 handle_fault(regs); /* doesn't return */ 771 772 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 773 bp = in_breakpoint_table(regs->nip, &offset); 774 if (bp != NULL) { 775 regs->nip = bp->address + offset; 776 atomic_dec(&bp->ref_count); 777 } 778 } 779 780 return 0; 781 } 782 783 /* Force enable xmon if not already enabled */ 784 static inline void force_enable_xmon(void) 785 { 786 /* Enable xmon hooks if needed */ 787 if (!xmon_on) { 788 printf("xmon: Enabling debugger hooks\n"); 789 xmon_on = 1; 790 } 791 } 792 793 static struct bpt *at_breakpoint(unsigned long pc) 794 { 795 int i; 796 struct bpt *bp; 797 798 bp = bpts; 799 for (i = 0; i < NBPTS; ++i, ++bp) 800 if (bp->enabled && pc == bp->address) 801 return bp; 802 return NULL; 803 } 804 805 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp) 806 { 807 unsigned long off; 808 809 off = nip - (unsigned long) bpts; 810 if (off >= sizeof(bpts)) 811 return NULL; 812 off %= sizeof(struct bpt); 813 if (off != offsetof(struct bpt, instr[0]) 814 && off != offsetof(struct bpt, instr[1])) 815 return NULL; 816 *offp = off - offsetof(struct bpt, instr[0]); 817 return (struct bpt *) (nip - off); 818 } 819 820 static struct bpt *new_breakpoint(unsigned long a) 821 { 822 struct bpt *bp; 823 824 a &= ~3UL; 825 bp = at_breakpoint(a); 826 if (bp) 827 return bp; 828 829 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 830 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) { 831 bp->address = a; 832 bp->instr[1] = bpinstr; 833 store_inst(&bp->instr[1]); 834 return bp; 835 } 836 } 837 838 printf("Sorry, no free breakpoints. Please clear one first.\n"); 839 return NULL; 840 } 841 842 static void insert_bpts(void) 843 { 844 int i; 845 struct bpt *bp; 846 847 bp = bpts; 848 for (i = 0; i < NBPTS; ++i, ++bp) { 849 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0) 850 continue; 851 if (mread(bp->address, &bp->instr[0], 4) != 4) { 852 printf("Couldn't read instruction at %lx, " 853 "disabling breakpoint there\n", bp->address); 854 bp->enabled = 0; 855 continue; 856 } 857 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) { 858 printf("Breakpoint at %lx is on an mtmsrd or rfid " 859 "instruction, disabling it\n", bp->address); 860 bp->enabled = 0; 861 continue; 862 } 863 store_inst(&bp->instr[0]); 864 if (bp->enabled & BP_CIABR) 865 continue; 866 if (patch_instruction((unsigned int *)bp->address, 867 bpinstr) != 0) { 868 printf("Couldn't write instruction at %lx, " 869 "disabling breakpoint there\n", bp->address); 870 bp->enabled &= ~BP_TRAP; 871 continue; 872 } 873 store_inst((void *)bp->address); 874 } 875 } 876 877 static void insert_cpu_bpts(void) 878 { 879 struct arch_hw_breakpoint brk; 880 881 if (dabr.enabled) { 882 brk.address = dabr.address; 883 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL; 884 brk.len = 8; 885 __set_breakpoint(&brk); 886 } 887 888 if (iabr) 889 set_ciabr(iabr->address); 890 } 891 892 static void remove_bpts(void) 893 { 894 int i; 895 struct bpt *bp; 896 unsigned instr; 897 898 bp = bpts; 899 for (i = 0; i < NBPTS; ++i, ++bp) { 900 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) 901 continue; 902 if (mread(bp->address, &instr, 4) == 4 903 && instr == bpinstr 904 && patch_instruction( 905 (unsigned int *)bp->address, bp->instr[0]) != 0) 906 printf("Couldn't remove breakpoint at %lx\n", 907 bp->address); 908 else 909 store_inst((void *)bp->address); 910 } 911 } 912 913 static void remove_cpu_bpts(void) 914 { 915 hw_breakpoint_disable(); 916 write_ciabr(0); 917 } 918 919 /* Based on uptime_proc_show(). */ 920 static void 921 show_uptime(void) 922 { 923 struct timespec64 uptime; 924 925 if (setjmp(bus_error_jmp) == 0) { 926 catch_memory_errors = 1; 927 sync(); 928 929 ktime_get_coarse_boottime_ts64(&uptime); 930 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec, 931 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100))); 932 933 sync(); 934 __delay(200); \ 935 } 936 catch_memory_errors = 0; 937 } 938 939 static void set_lpp_cmd(void) 940 { 941 unsigned long lpp; 942 943 if (!scanhex(&lpp)) { 944 printf("Invalid number.\n"); 945 lpp = 0; 946 } 947 xmon_set_pagination_lpp(lpp); 948 } 949 /* Command interpreting routine */ 950 static char *last_cmd; 951 952 static int 953 cmds(struct pt_regs *excp) 954 { 955 int cmd = 0; 956 957 last_cmd = NULL; 958 xmon_regs = excp; 959 960 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 961 962 for(;;) { 963 #ifdef CONFIG_SMP 964 printf("%x:", smp_processor_id()); 965 #endif /* CONFIG_SMP */ 966 printf("mon> "); 967 flush_input(); 968 termch = 0; 969 cmd = skipbl(); 970 if( cmd == '\n' ) { 971 if (last_cmd == NULL) 972 continue; 973 take_input(last_cmd); 974 last_cmd = NULL; 975 cmd = inchar(); 976 } 977 switch (cmd) { 978 case 'm': 979 cmd = inchar(); 980 switch (cmd) { 981 case 'm': 982 case 's': 983 case 'd': 984 memops(cmd); 985 break; 986 case 'l': 987 memlocate(); 988 break; 989 case 'z': 990 memzcan(); 991 break; 992 case 'i': 993 show_mem(0, NULL); 994 break; 995 default: 996 termch = cmd; 997 memex(); 998 } 999 break; 1000 case 'd': 1001 dump(); 1002 break; 1003 case 'l': 1004 symbol_lookup(); 1005 break; 1006 case 'r': 1007 prregs(excp); /* print regs */ 1008 break; 1009 case 'e': 1010 excprint(excp); 1011 break; 1012 case 'S': 1013 super_regs(); 1014 break; 1015 case 't': 1016 backtrace(excp); 1017 break; 1018 case 'f': 1019 cacheflush(); 1020 break; 1021 case 's': 1022 if (do_spu_cmd() == 0) 1023 break; 1024 if (do_step(excp)) 1025 return cmd; 1026 break; 1027 case 'x': 1028 case 'X': 1029 if (tracing_enabled) 1030 tracing_on(); 1031 return cmd; 1032 case EOF: 1033 printf(" <no input ...>\n"); 1034 mdelay(2000); 1035 return cmd; 1036 case '?': 1037 xmon_puts(help_string); 1038 break; 1039 case '#': 1040 set_lpp_cmd(); 1041 break; 1042 case 'b': 1043 bpt_cmds(); 1044 break; 1045 case 'C': 1046 csum(); 1047 break; 1048 case 'c': 1049 if (cpu_cmd()) 1050 return 0; 1051 break; 1052 case 'z': 1053 bootcmds(); 1054 break; 1055 case 'p': 1056 proccall(); 1057 break; 1058 case 'P': 1059 show_tasks(); 1060 break; 1061 #ifdef CONFIG_PPC_STD_MMU 1062 case 'u': 1063 dump_segments(); 1064 break; 1065 #elif defined(CONFIG_44x) 1066 case 'u': 1067 dump_tlb_44x(); 1068 break; 1069 #elif defined(CONFIG_PPC_BOOK3E) 1070 case 'u': 1071 dump_tlb_book3e(); 1072 break; 1073 #endif 1074 case 'U': 1075 show_uptime(); 1076 break; 1077 default: 1078 printf("Unrecognized command: "); 1079 do { 1080 if (' ' < cmd && cmd <= '~') 1081 putchar(cmd); 1082 else 1083 printf("\\x%x", cmd); 1084 cmd = inchar(); 1085 } while (cmd != '\n'); 1086 printf(" (type ? for help)\n"); 1087 break; 1088 } 1089 } 1090 } 1091 1092 #ifdef CONFIG_BOOKE 1093 static int do_step(struct pt_regs *regs) 1094 { 1095 regs->msr |= MSR_DE; 1096 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 1097 return 1; 1098 } 1099 #else 1100 /* 1101 * Step a single instruction. 1102 * Some instructions we emulate, others we execute with MSR_SE set. 1103 */ 1104 static int do_step(struct pt_regs *regs) 1105 { 1106 unsigned int instr; 1107 int stepped; 1108 1109 force_enable_xmon(); 1110 /* check we are in 64-bit kernel mode, translation enabled */ 1111 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { 1112 if (mread(regs->nip, &instr, 4) == 4) { 1113 stepped = emulate_step(regs, instr); 1114 if (stepped < 0) { 1115 printf("Couldn't single-step %s instruction\n", 1116 (IS_RFID(instr)? "rfid": "mtmsrd")); 1117 return 0; 1118 } 1119 if (stepped > 0) { 1120 regs->trap = 0xd00 | (regs->trap & 1); 1121 printf("stepped to "); 1122 xmon_print_symbol(regs->nip, " ", "\n"); 1123 ppc_inst_dump(regs->nip, 1, 0); 1124 return 0; 1125 } 1126 } 1127 } 1128 regs->msr |= MSR_SE; 1129 return 1; 1130 } 1131 #endif 1132 1133 static void bootcmds(void) 1134 { 1135 int cmd; 1136 1137 cmd = inchar(); 1138 if (cmd == 'r') 1139 ppc_md.restart(NULL); 1140 else if (cmd == 'h') 1141 ppc_md.halt(); 1142 else if (cmd == 'p') 1143 if (pm_power_off) 1144 pm_power_off(); 1145 } 1146 1147 static int cpu_cmd(void) 1148 { 1149 #ifdef CONFIG_SMP 1150 unsigned long cpu, first_cpu, last_cpu; 1151 int timeout; 1152 1153 if (!scanhex(&cpu)) { 1154 /* print cpus waiting or in xmon */ 1155 printf("cpus stopped:"); 1156 last_cpu = first_cpu = NR_CPUS; 1157 for_each_possible_cpu(cpu) { 1158 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1159 if (cpu == last_cpu + 1) { 1160 last_cpu = cpu; 1161 } else { 1162 if (last_cpu != first_cpu) 1163 printf("-0x%lx", last_cpu); 1164 last_cpu = first_cpu = cpu; 1165 printf(" 0x%lx", cpu); 1166 } 1167 } 1168 } 1169 if (last_cpu != first_cpu) 1170 printf("-0x%lx", last_cpu); 1171 printf("\n"); 1172 return 0; 1173 } 1174 /* try to switch to cpu specified */ 1175 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1176 printf("cpu 0x%lx isn't in xmon\n", cpu); 1177 #ifdef CONFIG_PPC64 1178 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu); 1179 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0); 1180 #endif 1181 return 0; 1182 } 1183 xmon_taken = 0; 1184 mb(); 1185 xmon_owner = cpu; 1186 timeout = 10000000; 1187 while (!xmon_taken) { 1188 if (--timeout == 0) { 1189 if (test_and_set_bit(0, &xmon_taken)) 1190 break; 1191 /* take control back */ 1192 mb(); 1193 xmon_owner = smp_processor_id(); 1194 printf("cpu 0x%lx didn't take control\n", cpu); 1195 return 0; 1196 } 1197 barrier(); 1198 } 1199 return 1; 1200 #else 1201 return 0; 1202 #endif /* CONFIG_SMP */ 1203 } 1204 1205 static unsigned short fcstab[256] = { 1206 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 1207 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, 1208 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 1209 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, 1210 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, 1211 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, 1212 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, 1213 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, 1214 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, 1215 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, 1216 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, 1217 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, 1218 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, 1219 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, 1220 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, 1221 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, 1222 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, 1223 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, 1224 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, 1225 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, 1226 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, 1227 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, 1228 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, 1229 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, 1230 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, 1231 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, 1232 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, 1233 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, 1234 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, 1235 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, 1236 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, 1237 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 1238 }; 1239 1240 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) 1241 1242 static void 1243 csum(void) 1244 { 1245 unsigned int i; 1246 unsigned short fcs; 1247 unsigned char v; 1248 1249 if (!scanhex(&adrs)) 1250 return; 1251 if (!scanhex(&ncsum)) 1252 return; 1253 fcs = 0xffff; 1254 for (i = 0; i < ncsum; ++i) { 1255 if (mread(adrs+i, &v, 1) == 0) { 1256 printf("csum stopped at "REG"\n", adrs+i); 1257 break; 1258 } 1259 fcs = FCS(fcs, v); 1260 } 1261 printf("%x\n", fcs); 1262 } 1263 1264 /* 1265 * Check if this is a suitable place to put a breakpoint. 1266 */ 1267 static long check_bp_loc(unsigned long addr) 1268 { 1269 unsigned int instr; 1270 1271 addr &= ~3; 1272 if (!is_kernel_addr(addr)) { 1273 printf("Breakpoints may only be placed at kernel addresses\n"); 1274 return 0; 1275 } 1276 if (!mread(addr, &instr, sizeof(instr))) { 1277 printf("Can't read instruction at address %lx\n", addr); 1278 return 0; 1279 } 1280 if (IS_MTMSRD(instr) || IS_RFID(instr)) { 1281 printf("Breakpoints may not be placed on mtmsrd or rfid " 1282 "instructions\n"); 1283 return 0; 1284 } 1285 return 1; 1286 } 1287 1288 static char *breakpoint_help_string = 1289 "Breakpoint command usage:\n" 1290 "b show breakpoints\n" 1291 "b <addr> [cnt] set breakpoint at given instr addr\n" 1292 "bc clear all breakpoints\n" 1293 "bc <n/addr> clear breakpoint number n or at addr\n" 1294 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n" 1295 "bd <addr> [cnt] set hardware data breakpoint\n" 1296 ""; 1297 1298 static void 1299 bpt_cmds(void) 1300 { 1301 int cmd; 1302 unsigned long a; 1303 int i; 1304 struct bpt *bp; 1305 1306 cmd = inchar(); 1307 switch (cmd) { 1308 #ifndef CONFIG_PPC_8xx 1309 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n"; 1310 int mode; 1311 case 'd': /* bd - hardware data breakpoint */ 1312 if (!ppc_breakpoint_available()) { 1313 printf("Hardware data breakpoint not supported on this cpu\n"); 1314 break; 1315 } 1316 mode = 7; 1317 cmd = inchar(); 1318 if (cmd == 'r') 1319 mode = 5; 1320 else if (cmd == 'w') 1321 mode = 6; 1322 else 1323 termch = cmd; 1324 dabr.address = 0; 1325 dabr.enabled = 0; 1326 if (scanhex(&dabr.address)) { 1327 if (!is_kernel_addr(dabr.address)) { 1328 printf(badaddr); 1329 break; 1330 } 1331 dabr.address &= ~HW_BRK_TYPE_DABR; 1332 dabr.enabled = mode | BP_DABR; 1333 } 1334 1335 force_enable_xmon(); 1336 break; 1337 1338 case 'i': /* bi - hardware instr breakpoint */ 1339 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) { 1340 printf("Hardware instruction breakpoint " 1341 "not supported on this cpu\n"); 1342 break; 1343 } 1344 if (iabr) { 1345 iabr->enabled &= ~BP_CIABR; 1346 iabr = NULL; 1347 } 1348 if (!scanhex(&a)) 1349 break; 1350 if (!check_bp_loc(a)) 1351 break; 1352 bp = new_breakpoint(a); 1353 if (bp != NULL) { 1354 bp->enabled |= BP_CIABR; 1355 iabr = bp; 1356 force_enable_xmon(); 1357 } 1358 break; 1359 #endif 1360 1361 case 'c': 1362 if (!scanhex(&a)) { 1363 /* clear all breakpoints */ 1364 for (i = 0; i < NBPTS; ++i) 1365 bpts[i].enabled = 0; 1366 iabr = NULL; 1367 dabr.enabled = 0; 1368 printf("All breakpoints cleared\n"); 1369 break; 1370 } 1371 1372 if (a <= NBPTS && a >= 1) { 1373 /* assume a breakpoint number */ 1374 bp = &bpts[a-1]; /* bp nums are 1 based */ 1375 } else { 1376 /* assume a breakpoint address */ 1377 bp = at_breakpoint(a); 1378 if (bp == NULL) { 1379 printf("No breakpoint at %lx\n", a); 1380 break; 1381 } 1382 } 1383 1384 printf("Cleared breakpoint %tx (", BP_NUM(bp)); 1385 xmon_print_symbol(bp->address, " ", ")\n"); 1386 bp->enabled = 0; 1387 break; 1388 1389 default: 1390 termch = cmd; 1391 cmd = skipbl(); 1392 if (cmd == '?') { 1393 printf(breakpoint_help_string); 1394 break; 1395 } 1396 termch = cmd; 1397 if (!scanhex(&a)) { 1398 /* print all breakpoints */ 1399 printf(" type address\n"); 1400 if (dabr.enabled) { 1401 printf(" data "REG" [", dabr.address); 1402 if (dabr.enabled & 1) 1403 printf("r"); 1404 if (dabr.enabled & 2) 1405 printf("w"); 1406 printf("]\n"); 1407 } 1408 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 1409 if (!bp->enabled) 1410 continue; 1411 printf("%tx %s ", BP_NUM(bp), 1412 (bp->enabled & BP_CIABR) ? "inst": "trap"); 1413 xmon_print_symbol(bp->address, " ", "\n"); 1414 } 1415 break; 1416 } 1417 1418 if (!check_bp_loc(a)) 1419 break; 1420 bp = new_breakpoint(a); 1421 if (bp != NULL) { 1422 bp->enabled |= BP_TRAP; 1423 force_enable_xmon(); 1424 } 1425 break; 1426 } 1427 } 1428 1429 /* Very cheap human name for vector lookup. */ 1430 static 1431 const char *getvecname(unsigned long vec) 1432 { 1433 char *ret; 1434 1435 switch (vec) { 1436 case 0x100: ret = "(System Reset)"; break; 1437 case 0x200: ret = "(Machine Check)"; break; 1438 case 0x300: ret = "(Data Access)"; break; 1439 case 0x380: 1440 if (radix_enabled()) 1441 ret = "(Data Access Out of Range)"; 1442 else 1443 ret = "(Data SLB Access)"; 1444 break; 1445 case 0x400: ret = "(Instruction Access)"; break; 1446 case 0x480: 1447 if (radix_enabled()) 1448 ret = "(Instruction Access Out of Range)"; 1449 else 1450 ret = "(Instruction SLB Access)"; 1451 break; 1452 case 0x500: ret = "(Hardware Interrupt)"; break; 1453 case 0x600: ret = "(Alignment)"; break; 1454 case 0x700: ret = "(Program Check)"; break; 1455 case 0x800: ret = "(FPU Unavailable)"; break; 1456 case 0x900: ret = "(Decrementer)"; break; 1457 case 0x980: ret = "(Hypervisor Decrementer)"; break; 1458 case 0xa00: ret = "(Doorbell)"; break; 1459 case 0xc00: ret = "(System Call)"; break; 1460 case 0xd00: ret = "(Single Step)"; break; 1461 case 0xe40: ret = "(Emulation Assist)"; break; 1462 case 0xe60: ret = "(HMI)"; break; 1463 case 0xe80: ret = "(Hypervisor Doorbell)"; break; 1464 case 0xf00: ret = "(Performance Monitor)"; break; 1465 case 0xf20: ret = "(Altivec Unavailable)"; break; 1466 case 0x1300: ret = "(Instruction Breakpoint)"; break; 1467 case 0x1500: ret = "(Denormalisation)"; break; 1468 case 0x1700: ret = "(Altivec Assist)"; break; 1469 default: ret = ""; 1470 } 1471 return ret; 1472 } 1473 1474 static void get_function_bounds(unsigned long pc, unsigned long *startp, 1475 unsigned long *endp) 1476 { 1477 unsigned long size, offset; 1478 const char *name; 1479 1480 *startp = *endp = 0; 1481 if (pc == 0) 1482 return; 1483 if (setjmp(bus_error_jmp) == 0) { 1484 catch_memory_errors = 1; 1485 sync(); 1486 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr); 1487 if (name != NULL) { 1488 *startp = pc - offset; 1489 *endp = pc - offset + size; 1490 } 1491 sync(); 1492 } 1493 catch_memory_errors = 0; 1494 } 1495 1496 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long)) 1497 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long)) 1498 1499 static void xmon_show_stack(unsigned long sp, unsigned long lr, 1500 unsigned long pc) 1501 { 1502 int max_to_print = 64; 1503 unsigned long ip; 1504 unsigned long newsp; 1505 unsigned long marker; 1506 struct pt_regs regs; 1507 1508 while (max_to_print--) { 1509 if (!is_kernel_addr(sp)) { 1510 if (sp != 0) 1511 printf("SP (%lx) is in userspace\n", sp); 1512 break; 1513 } 1514 1515 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long)) 1516 || !mread(sp, &newsp, sizeof(unsigned long))) { 1517 printf("Couldn't read stack frame at %lx\n", sp); 1518 break; 1519 } 1520 1521 /* 1522 * For the first stack frame, try to work out if 1523 * LR and/or the saved LR value in the bottommost 1524 * stack frame are valid. 1525 */ 1526 if ((pc | lr) != 0) { 1527 unsigned long fnstart, fnend; 1528 unsigned long nextip; 1529 int printip = 1; 1530 1531 get_function_bounds(pc, &fnstart, &fnend); 1532 nextip = 0; 1533 if (newsp > sp) 1534 mread(newsp + LRSAVE_OFFSET, &nextip, 1535 sizeof(unsigned long)); 1536 if (lr == ip) { 1537 if (!is_kernel_addr(lr) 1538 || (fnstart <= lr && lr < fnend)) 1539 printip = 0; 1540 } else if (lr == nextip) { 1541 printip = 0; 1542 } else if (is_kernel_addr(lr) 1543 && !(fnstart <= lr && lr < fnend)) { 1544 printf("[link register ] "); 1545 xmon_print_symbol(lr, " ", "\n"); 1546 } 1547 if (printip) { 1548 printf("["REG"] ", sp); 1549 xmon_print_symbol(ip, " ", " (unreliable)\n"); 1550 } 1551 pc = lr = 0; 1552 1553 } else { 1554 printf("["REG"] ", sp); 1555 xmon_print_symbol(ip, " ", "\n"); 1556 } 1557 1558 /* Look for "regshere" marker to see if this is 1559 an exception frame. */ 1560 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long)) 1561 && marker == STACK_FRAME_REGS_MARKER) { 1562 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs)) 1563 != sizeof(regs)) { 1564 printf("Couldn't read registers at %lx\n", 1565 sp + STACK_FRAME_OVERHEAD); 1566 break; 1567 } 1568 printf("--- Exception: %lx %s at ", regs.trap, 1569 getvecname(TRAP(®s))); 1570 pc = regs.nip; 1571 lr = regs.link; 1572 xmon_print_symbol(pc, " ", "\n"); 1573 } 1574 1575 if (newsp == 0) 1576 break; 1577 1578 sp = newsp; 1579 } 1580 } 1581 1582 static void backtrace(struct pt_regs *excp) 1583 { 1584 unsigned long sp; 1585 1586 if (scanhex(&sp)) 1587 xmon_show_stack(sp, 0, 0); 1588 else 1589 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1590 scannl(); 1591 } 1592 1593 static void print_bug_trap(struct pt_regs *regs) 1594 { 1595 #ifdef CONFIG_BUG 1596 const struct bug_entry *bug; 1597 unsigned long addr; 1598 1599 if (regs->msr & MSR_PR) 1600 return; /* not in kernel */ 1601 addr = regs->nip; /* address of trap instruction */ 1602 if (!is_kernel_addr(addr)) 1603 return; 1604 bug = find_bug(regs->nip); 1605 if (bug == NULL) 1606 return; 1607 if (is_warning_bug(bug)) 1608 return; 1609 1610 #ifdef CONFIG_DEBUG_BUGVERBOSE 1611 printf("kernel BUG at %s:%u!\n", 1612 bug->file, bug->line); 1613 #else 1614 printf("kernel BUG at %px!\n", (void *)bug->bug_addr); 1615 #endif 1616 #endif /* CONFIG_BUG */ 1617 } 1618 1619 static void excprint(struct pt_regs *fp) 1620 { 1621 unsigned long trap; 1622 1623 #ifdef CONFIG_SMP 1624 printf("cpu 0x%x: ", smp_processor_id()); 1625 #endif /* CONFIG_SMP */ 1626 1627 trap = TRAP(fp); 1628 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp); 1629 printf(" pc: "); 1630 xmon_print_symbol(fp->nip, ": ", "\n"); 1631 1632 printf(" lr: "); 1633 xmon_print_symbol(fp->link, ": ", "\n"); 1634 1635 printf(" sp: %lx\n", fp->gpr[1]); 1636 printf(" msr: %lx\n", fp->msr); 1637 1638 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) { 1639 printf(" dar: %lx\n", fp->dar); 1640 if (trap != 0x380) 1641 printf(" dsisr: %lx\n", fp->dsisr); 1642 } 1643 1644 printf(" current = 0x%px\n", current); 1645 #ifdef CONFIG_PPC64 1646 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n", 1647 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened); 1648 #endif 1649 if (current) { 1650 printf(" pid = %d, comm = %s\n", 1651 current->pid, current->comm); 1652 } 1653 1654 if (trap == 0x700) 1655 print_bug_trap(fp); 1656 1657 printf(linux_banner); 1658 } 1659 1660 static void prregs(struct pt_regs *fp) 1661 { 1662 int n, trap; 1663 unsigned long base; 1664 struct pt_regs regs; 1665 1666 if (scanhex(&base)) { 1667 if (setjmp(bus_error_jmp) == 0) { 1668 catch_memory_errors = 1; 1669 sync(); 1670 regs = *(struct pt_regs *)base; 1671 sync(); 1672 __delay(200); 1673 } else { 1674 catch_memory_errors = 0; 1675 printf("*** Error reading registers from "REG"\n", 1676 base); 1677 return; 1678 } 1679 catch_memory_errors = 0; 1680 fp = ®s; 1681 } 1682 1683 #ifdef CONFIG_PPC64 1684 if (FULL_REGS(fp)) { 1685 for (n = 0; n < 16; ++n) 1686 printf("R%.2d = "REG" R%.2d = "REG"\n", 1687 n, fp->gpr[n], n+16, fp->gpr[n+16]); 1688 } else { 1689 for (n = 0; n < 7; ++n) 1690 printf("R%.2d = "REG" R%.2d = "REG"\n", 1691 n, fp->gpr[n], n+7, fp->gpr[n+7]); 1692 } 1693 #else 1694 for (n = 0; n < 32; ++n) { 1695 printf("R%.2d = %.8lx%s", n, fp->gpr[n], 1696 (n & 3) == 3? "\n": " "); 1697 if (n == 12 && !FULL_REGS(fp)) { 1698 printf("\n"); 1699 break; 1700 } 1701 } 1702 #endif 1703 printf("pc = "); 1704 xmon_print_symbol(fp->nip, " ", "\n"); 1705 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) { 1706 printf("cfar= "); 1707 xmon_print_symbol(fp->orig_gpr3, " ", "\n"); 1708 } 1709 printf("lr = "); 1710 xmon_print_symbol(fp->link, " ", "\n"); 1711 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr); 1712 printf("ctr = "REG" xer = "REG" trap = %4lx\n", 1713 fp->ctr, fp->xer, fp->trap); 1714 trap = TRAP(fp); 1715 if (trap == 0x300 || trap == 0x380 || trap == 0x600) 1716 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); 1717 } 1718 1719 static void cacheflush(void) 1720 { 1721 int cmd; 1722 unsigned long nflush; 1723 1724 cmd = inchar(); 1725 if (cmd != 'i') 1726 termch = cmd; 1727 scanhex((void *)&adrs); 1728 if (termch != '\n') 1729 termch = 0; 1730 nflush = 1; 1731 scanhex(&nflush); 1732 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES; 1733 if (setjmp(bus_error_jmp) == 0) { 1734 catch_memory_errors = 1; 1735 sync(); 1736 1737 if (cmd != 'i') { 1738 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1739 cflush((void *) adrs); 1740 } else { 1741 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1742 cinval((void *) adrs); 1743 } 1744 sync(); 1745 /* wait a little while to see if we get a machine check */ 1746 __delay(200); 1747 } 1748 catch_memory_errors = 0; 1749 } 1750 1751 extern unsigned long xmon_mfspr(int spr, unsigned long default_value); 1752 extern void xmon_mtspr(int spr, unsigned long value); 1753 1754 static int 1755 read_spr(int n, unsigned long *vp) 1756 { 1757 unsigned long ret = -1UL; 1758 int ok = 0; 1759 1760 if (setjmp(bus_error_jmp) == 0) { 1761 catch_spr_faults = 1; 1762 sync(); 1763 1764 ret = xmon_mfspr(n, *vp); 1765 1766 sync(); 1767 *vp = ret; 1768 ok = 1; 1769 } 1770 catch_spr_faults = 0; 1771 1772 return ok; 1773 } 1774 1775 static void 1776 write_spr(int n, unsigned long val) 1777 { 1778 if (setjmp(bus_error_jmp) == 0) { 1779 catch_spr_faults = 1; 1780 sync(); 1781 1782 xmon_mtspr(n, val); 1783 1784 sync(); 1785 } else { 1786 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n); 1787 } 1788 catch_spr_faults = 0; 1789 } 1790 1791 static void dump_206_sprs(void) 1792 { 1793 #ifdef CONFIG_PPC64 1794 if (!cpu_has_feature(CPU_FTR_ARCH_206)) 1795 return; 1796 1797 /* Actually some of these pre-date 2.06, but whatevs */ 1798 1799 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n", 1800 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR)); 1801 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n", 1802 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR)); 1803 printf("amr = %.16lx uamor = %.16lx\n", 1804 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR)); 1805 1806 if (!(mfmsr() & MSR_HV)) 1807 return; 1808 1809 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n", 1810 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR)); 1811 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n", 1812 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC)); 1813 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n", 1814 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID)); 1815 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n", 1816 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR)); 1817 printf("dabr = %.16lx dabrx = %.16lx\n", 1818 mfspr(SPRN_DABR), mfspr(SPRN_DABRX)); 1819 #endif 1820 } 1821 1822 static void dump_207_sprs(void) 1823 { 1824 #ifdef CONFIG_PPC64 1825 unsigned long msr; 1826 1827 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1828 return; 1829 1830 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n", 1831 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR)); 1832 1833 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n", 1834 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB)); 1835 1836 msr = mfmsr(); 1837 if (msr & MSR_TM) { 1838 /* Only if TM has been enabled in the kernel */ 1839 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n", 1840 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR), 1841 mfspr(SPRN_TEXASR)); 1842 } 1843 1844 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n", 1845 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2)); 1846 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n", 1847 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), 1848 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4)); 1849 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n", 1850 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5)); 1851 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n", 1852 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6)); 1853 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n", 1854 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR)); 1855 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR)); 1856 1857 if (!(msr & MSR_HV)) 1858 return; 1859 1860 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n", 1861 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR)); 1862 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n", 1863 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR)); 1864 #endif 1865 } 1866 1867 static void dump_300_sprs(void) 1868 { 1869 #ifdef CONFIG_PPC64 1870 bool hv = mfmsr() & MSR_HV; 1871 1872 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 1873 return; 1874 1875 printf("pidr = %.16lx tidr = %.16lx\n", 1876 mfspr(SPRN_PID), mfspr(SPRN_TIDR)); 1877 printf("asdr = %.16lx psscr = %.16lx\n", 1878 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR) 1879 : mfspr(SPRN_PSSCR_PR)); 1880 1881 if (!hv) 1882 return; 1883 1884 printf("ptcr = %.16lx\n", 1885 mfspr(SPRN_PTCR)); 1886 #endif 1887 } 1888 1889 static void dump_one_spr(int spr, bool show_unimplemented) 1890 { 1891 unsigned long val; 1892 1893 val = 0xdeadbeef; 1894 if (!read_spr(spr, &val)) { 1895 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 1896 return; 1897 } 1898 1899 if (val == 0xdeadbeef) { 1900 /* Looks like read was a nop, confirm */ 1901 val = 0x0badcafe; 1902 if (!read_spr(spr, &val)) { 1903 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 1904 return; 1905 } 1906 1907 if (val == 0x0badcafe) { 1908 if (show_unimplemented) 1909 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr); 1910 return; 1911 } 1912 } 1913 1914 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val); 1915 } 1916 1917 static void super_regs(void) 1918 { 1919 static unsigned long regno; 1920 int cmd; 1921 int spr; 1922 1923 cmd = skipbl(); 1924 1925 switch (cmd) { 1926 case '\n': { 1927 unsigned long sp, toc; 1928 asm("mr %0,1" : "=r" (sp) :); 1929 asm("mr %0,2" : "=r" (toc) :); 1930 1931 printf("msr = "REG" sprg0 = "REG"\n", 1932 mfmsr(), mfspr(SPRN_SPRG0)); 1933 printf("pvr = "REG" sprg1 = "REG"\n", 1934 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); 1935 printf("dec = "REG" sprg2 = "REG"\n", 1936 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); 1937 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3)); 1938 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR)); 1939 1940 dump_206_sprs(); 1941 dump_207_sprs(); 1942 dump_300_sprs(); 1943 1944 return; 1945 } 1946 case 'w': { 1947 unsigned long val; 1948 scanhex(®no); 1949 val = 0; 1950 read_spr(regno, &val); 1951 scanhex(&val); 1952 write_spr(regno, val); 1953 dump_one_spr(regno, true); 1954 break; 1955 } 1956 case 'r': 1957 scanhex(®no); 1958 dump_one_spr(regno, true); 1959 break; 1960 case 'a': 1961 /* dump ALL SPRs */ 1962 for (spr = 1; spr < 1024; ++spr) 1963 dump_one_spr(spr, false); 1964 break; 1965 } 1966 1967 scannl(); 1968 } 1969 1970 /* 1971 * Stuff for reading and writing memory safely 1972 */ 1973 static int 1974 mread(unsigned long adrs, void *buf, int size) 1975 { 1976 volatile int n; 1977 char *p, *q; 1978 1979 n = 0; 1980 if (setjmp(bus_error_jmp) == 0) { 1981 catch_memory_errors = 1; 1982 sync(); 1983 p = (char *)adrs; 1984 q = (char *)buf; 1985 switch (size) { 1986 case 2: 1987 *(u16 *)q = *(u16 *)p; 1988 break; 1989 case 4: 1990 *(u32 *)q = *(u32 *)p; 1991 break; 1992 case 8: 1993 *(u64 *)q = *(u64 *)p; 1994 break; 1995 default: 1996 for( ; n < size; ++n) { 1997 *q++ = *p++; 1998 sync(); 1999 } 2000 } 2001 sync(); 2002 /* wait a little while to see if we get a machine check */ 2003 __delay(200); 2004 n = size; 2005 } 2006 catch_memory_errors = 0; 2007 return n; 2008 } 2009 2010 static int 2011 mwrite(unsigned long adrs, void *buf, int size) 2012 { 2013 volatile int n; 2014 char *p, *q; 2015 2016 n = 0; 2017 if (setjmp(bus_error_jmp) == 0) { 2018 catch_memory_errors = 1; 2019 sync(); 2020 p = (char *) adrs; 2021 q = (char *) buf; 2022 switch (size) { 2023 case 2: 2024 *(u16 *)p = *(u16 *)q; 2025 break; 2026 case 4: 2027 *(u32 *)p = *(u32 *)q; 2028 break; 2029 case 8: 2030 *(u64 *)p = *(u64 *)q; 2031 break; 2032 default: 2033 for ( ; n < size; ++n) { 2034 *p++ = *q++; 2035 sync(); 2036 } 2037 } 2038 sync(); 2039 /* wait a little while to see if we get a machine check */ 2040 __delay(200); 2041 n = size; 2042 } else { 2043 printf("*** Error writing address "REG"\n", adrs + n); 2044 } 2045 catch_memory_errors = 0; 2046 return n; 2047 } 2048 2049 static int fault_type; 2050 static int fault_except; 2051 static char *fault_chars[] = { "--", "**", "##" }; 2052 2053 static int handle_fault(struct pt_regs *regs) 2054 { 2055 fault_except = TRAP(regs); 2056 switch (TRAP(regs)) { 2057 case 0x200: 2058 fault_type = 0; 2059 break; 2060 case 0x300: 2061 case 0x380: 2062 fault_type = 1; 2063 break; 2064 default: 2065 fault_type = 2; 2066 } 2067 2068 longjmp(bus_error_jmp, 1); 2069 2070 return 0; 2071 } 2072 2073 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) 2074 2075 static void 2076 byterev(unsigned char *val, int size) 2077 { 2078 int t; 2079 2080 switch (size) { 2081 case 2: 2082 SWAP(val[0], val[1], t); 2083 break; 2084 case 4: 2085 SWAP(val[0], val[3], t); 2086 SWAP(val[1], val[2], t); 2087 break; 2088 case 8: /* is there really any use for this? */ 2089 SWAP(val[0], val[7], t); 2090 SWAP(val[1], val[6], t); 2091 SWAP(val[2], val[5], t); 2092 SWAP(val[3], val[4], t); 2093 break; 2094 } 2095 } 2096 2097 static int brev; 2098 static int mnoread; 2099 2100 static char *memex_help_string = 2101 "Memory examine command usage:\n" 2102 "m [addr] [flags] examine/change memory\n" 2103 " addr is optional. will start where left off.\n" 2104 " flags may include chars from this set:\n" 2105 " b modify by bytes (default)\n" 2106 " w modify by words (2 byte)\n" 2107 " l modify by longs (4 byte)\n" 2108 " d modify by doubleword (8 byte)\n" 2109 " r toggle reverse byte order mode\n" 2110 " n do not read memory (for i/o spaces)\n" 2111 " . ok to read (default)\n" 2112 "NOTE: flags are saved as defaults\n" 2113 ""; 2114 2115 static char *memex_subcmd_help_string = 2116 "Memory examine subcommands:\n" 2117 " hexval write this val to current location\n" 2118 " 'string' write chars from string to this location\n" 2119 " ' increment address\n" 2120 " ^ decrement address\n" 2121 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n" 2122 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n" 2123 " ` clear no-read flag\n" 2124 " ; stay at this addr\n" 2125 " v change to byte mode\n" 2126 " w change to word (2 byte) mode\n" 2127 " l change to long (4 byte) mode\n" 2128 " u change to doubleword (8 byte) mode\n" 2129 " m addr change current addr\n" 2130 " n toggle no-read flag\n" 2131 " r toggle byte reverse flag\n" 2132 " < count back up count bytes\n" 2133 " > count skip forward count bytes\n" 2134 " x exit this mode\n" 2135 ""; 2136 2137 static void 2138 memex(void) 2139 { 2140 int cmd, inc, i, nslash; 2141 unsigned long n; 2142 unsigned char val[16]; 2143 2144 scanhex((void *)&adrs); 2145 cmd = skipbl(); 2146 if (cmd == '?') { 2147 printf(memex_help_string); 2148 return; 2149 } else { 2150 termch = cmd; 2151 } 2152 last_cmd = "m\n"; 2153 while ((cmd = skipbl()) != '\n') { 2154 switch( cmd ){ 2155 case 'b': size = 1; break; 2156 case 'w': size = 2; break; 2157 case 'l': size = 4; break; 2158 case 'd': size = 8; break; 2159 case 'r': brev = !brev; break; 2160 case 'n': mnoread = 1; break; 2161 case '.': mnoread = 0; break; 2162 } 2163 } 2164 if( size <= 0 ) 2165 size = 1; 2166 else if( size > 8 ) 2167 size = 8; 2168 for(;;){ 2169 if (!mnoread) 2170 n = mread(adrs, val, size); 2171 printf(REG"%c", adrs, brev? 'r': ' '); 2172 if (!mnoread) { 2173 if (brev) 2174 byterev(val, size); 2175 putchar(' '); 2176 for (i = 0; i < n; ++i) 2177 printf("%.2x", val[i]); 2178 for (; i < size; ++i) 2179 printf("%s", fault_chars[fault_type]); 2180 } 2181 putchar(' '); 2182 inc = size; 2183 nslash = 0; 2184 for(;;){ 2185 if( scanhex(&n) ){ 2186 for (i = 0; i < size; ++i) 2187 val[i] = n >> (i * 8); 2188 if (!brev) 2189 byterev(val, size); 2190 mwrite(adrs, val, size); 2191 inc = size; 2192 } 2193 cmd = skipbl(); 2194 if (cmd == '\n') 2195 break; 2196 inc = 0; 2197 switch (cmd) { 2198 case '\'': 2199 for(;;){ 2200 n = inchar(); 2201 if( n == '\\' ) 2202 n = bsesc(); 2203 else if( n == '\'' ) 2204 break; 2205 for (i = 0; i < size; ++i) 2206 val[i] = n >> (i * 8); 2207 if (!brev) 2208 byterev(val, size); 2209 mwrite(adrs, val, size); 2210 adrs += size; 2211 } 2212 adrs -= size; 2213 inc = size; 2214 break; 2215 case ',': 2216 adrs += size; 2217 break; 2218 case '.': 2219 mnoread = 0; 2220 break; 2221 case ';': 2222 break; 2223 case 'x': 2224 case EOF: 2225 scannl(); 2226 return; 2227 case 'b': 2228 case 'v': 2229 size = 1; 2230 break; 2231 case 'w': 2232 size = 2; 2233 break; 2234 case 'l': 2235 size = 4; 2236 break; 2237 case 'u': 2238 size = 8; 2239 break; 2240 case '^': 2241 adrs -= size; 2242 break; 2243 case '/': 2244 if (nslash > 0) 2245 adrs -= 1 << nslash; 2246 else 2247 nslash = 0; 2248 nslash += 4; 2249 adrs += 1 << nslash; 2250 break; 2251 case '\\': 2252 if (nslash < 0) 2253 adrs += 1 << -nslash; 2254 else 2255 nslash = 0; 2256 nslash -= 4; 2257 adrs -= 1 << -nslash; 2258 break; 2259 case 'm': 2260 scanhex((void *)&adrs); 2261 break; 2262 case 'n': 2263 mnoread = 1; 2264 break; 2265 case 'r': 2266 brev = !brev; 2267 break; 2268 case '<': 2269 n = size; 2270 scanhex(&n); 2271 adrs -= n; 2272 break; 2273 case '>': 2274 n = size; 2275 scanhex(&n); 2276 adrs += n; 2277 break; 2278 case '?': 2279 printf(memex_subcmd_help_string); 2280 break; 2281 } 2282 } 2283 adrs += inc; 2284 } 2285 } 2286 2287 static int 2288 bsesc(void) 2289 { 2290 int c; 2291 2292 c = inchar(); 2293 switch( c ){ 2294 case 'n': c = '\n'; break; 2295 case 'r': c = '\r'; break; 2296 case 'b': c = '\b'; break; 2297 case 't': c = '\t'; break; 2298 } 2299 return c; 2300 } 2301 2302 static void xmon_rawdump (unsigned long adrs, long ndump) 2303 { 2304 long n, m, r, nr; 2305 unsigned char temp[16]; 2306 2307 for (n = ndump; n > 0;) { 2308 r = n < 16? n: 16; 2309 nr = mread(adrs, temp, r); 2310 adrs += nr; 2311 for (m = 0; m < r; ++m) { 2312 if (m < nr) 2313 printf("%.2x", temp[m]); 2314 else 2315 printf("%s", fault_chars[fault_type]); 2316 } 2317 n -= r; 2318 if (nr < r) 2319 break; 2320 } 2321 printf("\n"); 2322 } 2323 2324 static void dump_tracing(void) 2325 { 2326 int c; 2327 2328 c = inchar(); 2329 if (c == 'c') 2330 ftrace_dump(DUMP_ORIG); 2331 else 2332 ftrace_dump(DUMP_ALL); 2333 } 2334 2335 #ifdef CONFIG_PPC64 2336 static void dump_one_paca(int cpu) 2337 { 2338 struct paca_struct *p; 2339 #ifdef CONFIG_PPC_BOOK3S_64 2340 int i = 0; 2341 #endif 2342 2343 if (setjmp(bus_error_jmp) != 0) { 2344 printf("*** Error dumping paca for cpu 0x%x!\n", cpu); 2345 return; 2346 } 2347 2348 catch_memory_errors = 1; 2349 sync(); 2350 2351 p = paca_ptrs[cpu]; 2352 2353 printf("paca for cpu 0x%x @ %px:\n", cpu, p); 2354 2355 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no"); 2356 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no"); 2357 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no"); 2358 2359 #define DUMP(paca, name, format) \ 2360 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \ 2361 offsetof(struct paca_struct, name)); 2362 2363 DUMP(p, lock_token, "%#-*x"); 2364 DUMP(p, paca_index, "%#-*x"); 2365 DUMP(p, kernel_toc, "%#-*llx"); 2366 DUMP(p, kernelbase, "%#-*llx"); 2367 DUMP(p, kernel_msr, "%#-*llx"); 2368 DUMP(p, emergency_sp, "%-*px"); 2369 #ifdef CONFIG_PPC_BOOK3S_64 2370 DUMP(p, nmi_emergency_sp, "%-*px"); 2371 DUMP(p, mc_emergency_sp, "%-*px"); 2372 DUMP(p, in_nmi, "%#-*x"); 2373 DUMP(p, in_mce, "%#-*x"); 2374 DUMP(p, hmi_event_available, "%#-*x"); 2375 #endif 2376 DUMP(p, data_offset, "%#-*llx"); 2377 DUMP(p, hw_cpu_id, "%#-*x"); 2378 DUMP(p, cpu_start, "%#-*x"); 2379 DUMP(p, kexec_state, "%#-*x"); 2380 #ifdef CONFIG_PPC_BOOK3S_64 2381 if (!early_radix_enabled()) { 2382 for (i = 0; i < SLB_NUM_BOLTED; i++) { 2383 u64 esid, vsid; 2384 2385 if (!p->slb_shadow_ptr) 2386 continue; 2387 2388 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid); 2389 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid); 2390 2391 if (esid || vsid) { 2392 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n", 2393 22, "slb_shadow", i, esid, vsid); 2394 } 2395 } 2396 DUMP(p, vmalloc_sllp, "%#-*x"); 2397 DUMP(p, stab_rr, "%#-*x"); 2398 DUMP(p, slb_used_bitmap, "%#-*x"); 2399 DUMP(p, slb_kern_bitmap, "%#-*x"); 2400 2401 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2402 DUMP(p, slb_cache_ptr, "%#-*x"); 2403 for (i = 0; i < SLB_CACHE_ENTRIES; i++) 2404 printf(" %-*s[%d] = 0x%016x\n", 2405 22, "slb_cache", i, p->slb_cache[i]); 2406 } 2407 } 2408 2409 DUMP(p, rfi_flush_fallback_area, "%-*px"); 2410 #endif 2411 DUMP(p, dscr_default, "%#-*llx"); 2412 #ifdef CONFIG_PPC_BOOK3E 2413 DUMP(p, pgd, "%-*px"); 2414 DUMP(p, kernel_pgd, "%-*px"); 2415 DUMP(p, tcd_ptr, "%-*px"); 2416 DUMP(p, mc_kstack, "%-*px"); 2417 DUMP(p, crit_kstack, "%-*px"); 2418 DUMP(p, dbg_kstack, "%-*px"); 2419 #endif 2420 DUMP(p, __current, "%-*px"); 2421 DUMP(p, kstack, "%#-*llx"); 2422 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1)); 2423 #ifdef CONFIG_STACKPROTECTOR 2424 DUMP(p, canary, "%#-*lx"); 2425 #endif 2426 DUMP(p, saved_r1, "%#-*llx"); 2427 DUMP(p, trap_save, "%#-*x"); 2428 DUMP(p, irq_soft_mask, "%#-*x"); 2429 DUMP(p, irq_happened, "%#-*x"); 2430 DUMP(p, io_sync, "%#-*x"); 2431 DUMP(p, irq_work_pending, "%#-*x"); 2432 DUMP(p, nap_state_lost, "%#-*x"); 2433 DUMP(p, sprg_vdso, "%#-*llx"); 2434 2435 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2436 DUMP(p, tm_scratch, "%#-*llx"); 2437 #endif 2438 2439 #ifdef CONFIG_PPC_POWERNV 2440 DUMP(p, core_idle_state_ptr, "%-*px"); 2441 DUMP(p, thread_idle_state, "%#-*x"); 2442 DUMP(p, thread_mask, "%#-*x"); 2443 DUMP(p, subcore_sibling_mask, "%#-*x"); 2444 DUMP(p, requested_psscr, "%#-*llx"); 2445 DUMP(p, stop_sprs.pid, "%#-*llx"); 2446 DUMP(p, stop_sprs.ldbar, "%#-*llx"); 2447 DUMP(p, stop_sprs.fscr, "%#-*llx"); 2448 DUMP(p, stop_sprs.hfscr, "%#-*llx"); 2449 DUMP(p, stop_sprs.mmcr1, "%#-*llx"); 2450 DUMP(p, stop_sprs.mmcr2, "%#-*llx"); 2451 DUMP(p, stop_sprs.mmcra, "%#-*llx"); 2452 DUMP(p, dont_stop.counter, "%#-*x"); 2453 #endif 2454 2455 DUMP(p, accounting.utime, "%#-*lx"); 2456 DUMP(p, accounting.stime, "%#-*lx"); 2457 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2458 DUMP(p, accounting.utime_scaled, "%#-*lx"); 2459 #endif 2460 DUMP(p, accounting.starttime, "%#-*lx"); 2461 DUMP(p, accounting.starttime_user, "%#-*lx"); 2462 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2463 DUMP(p, accounting.startspurr, "%#-*lx"); 2464 DUMP(p, accounting.utime_sspurr, "%#-*lx"); 2465 #endif 2466 DUMP(p, accounting.steal_time, "%#-*lx"); 2467 #undef DUMP 2468 2469 catch_memory_errors = 0; 2470 sync(); 2471 } 2472 2473 static void dump_all_pacas(void) 2474 { 2475 int cpu; 2476 2477 if (num_possible_cpus() == 0) { 2478 printf("No possible cpus, use 'dp #' to dump individual cpus\n"); 2479 return; 2480 } 2481 2482 for_each_possible_cpu(cpu) 2483 dump_one_paca(cpu); 2484 } 2485 2486 static void dump_pacas(void) 2487 { 2488 unsigned long num; 2489 int c; 2490 2491 c = inchar(); 2492 if (c == 'a') { 2493 dump_all_pacas(); 2494 return; 2495 } 2496 2497 termch = c; /* Put c back, it wasn't 'a' */ 2498 2499 if (scanhex(&num)) 2500 dump_one_paca(num); 2501 else 2502 dump_one_paca(xmon_owner); 2503 } 2504 #endif 2505 2506 #ifdef CONFIG_PPC_POWERNV 2507 static void dump_one_xive(int cpu) 2508 { 2509 unsigned int hwid = get_hard_smp_processor_id(cpu); 2510 2511 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid); 2512 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid); 2513 opal_xive_dump(XIVE_DUMP_TM_OS, hwid); 2514 opal_xive_dump(XIVE_DUMP_TM_USER, hwid); 2515 opal_xive_dump(XIVE_DUMP_VP, hwid); 2516 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid); 2517 2518 if (setjmp(bus_error_jmp) != 0) { 2519 catch_memory_errors = 0; 2520 printf("*** Error dumping xive on cpu %d\n", cpu); 2521 return; 2522 } 2523 2524 catch_memory_errors = 1; 2525 sync(); 2526 xmon_xive_do_dump(cpu); 2527 sync(); 2528 __delay(200); 2529 catch_memory_errors = 0; 2530 } 2531 2532 static void dump_all_xives(void) 2533 { 2534 int cpu; 2535 2536 if (num_possible_cpus() == 0) { 2537 printf("No possible cpus, use 'dx #' to dump individual cpus\n"); 2538 return; 2539 } 2540 2541 for_each_possible_cpu(cpu) 2542 dump_one_xive(cpu); 2543 } 2544 2545 static void dump_one_xive_irq(u32 num) 2546 { 2547 s64 rc; 2548 __be64 vp; 2549 u8 prio; 2550 __be32 lirq; 2551 2552 rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq); 2553 xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n", 2554 num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc); 2555 } 2556 2557 static void dump_xives(void) 2558 { 2559 unsigned long num; 2560 int c; 2561 2562 if (!xive_enabled()) { 2563 printf("Xive disabled on this system\n"); 2564 return; 2565 } 2566 2567 c = inchar(); 2568 if (c == 'a') { 2569 dump_all_xives(); 2570 return; 2571 } else if (c == 'i') { 2572 if (scanhex(&num)) 2573 dump_one_xive_irq(num); 2574 return; 2575 } 2576 2577 termch = c; /* Put c back, it wasn't 'a' */ 2578 2579 if (scanhex(&num)) 2580 dump_one_xive(num); 2581 else 2582 dump_one_xive(xmon_owner); 2583 } 2584 #endif /* CONFIG_PPC_POWERNV */ 2585 2586 static void dump_by_size(unsigned long addr, long count, int size) 2587 { 2588 unsigned char temp[16]; 2589 int i, j; 2590 u64 val; 2591 2592 count = ALIGN(count, 16); 2593 2594 for (i = 0; i < count; i += 16, addr += 16) { 2595 printf(REG, addr); 2596 2597 if (mread(addr, temp, 16) != 16) { 2598 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr); 2599 return; 2600 } 2601 2602 for (j = 0; j < 16; j += size) { 2603 putchar(' '); 2604 switch (size) { 2605 case 1: val = temp[j]; break; 2606 case 2: val = *(u16 *)&temp[j]; break; 2607 case 4: val = *(u32 *)&temp[j]; break; 2608 case 8: val = *(u64 *)&temp[j]; break; 2609 default: val = 0; 2610 } 2611 2612 printf("%0*llx", size * 2, val); 2613 } 2614 printf("\n"); 2615 } 2616 } 2617 2618 static void 2619 dump(void) 2620 { 2621 static char last[] = { "d?\n" }; 2622 int c; 2623 2624 c = inchar(); 2625 2626 #ifdef CONFIG_PPC64 2627 if (c == 'p') { 2628 xmon_start_pagination(); 2629 dump_pacas(); 2630 xmon_end_pagination(); 2631 return; 2632 } 2633 #endif 2634 #ifdef CONFIG_PPC_POWERNV 2635 if (c == 'x') { 2636 xmon_start_pagination(); 2637 dump_xives(); 2638 xmon_end_pagination(); 2639 return; 2640 } 2641 #endif 2642 2643 if (c == 't') { 2644 dump_tracing(); 2645 return; 2646 } 2647 2648 if (c == '\n') 2649 termch = c; 2650 2651 scanhex((void *)&adrs); 2652 if (termch != '\n') 2653 termch = 0; 2654 if (c == 'i') { 2655 scanhex(&nidump); 2656 if (nidump == 0) 2657 nidump = 16; 2658 else if (nidump > MAX_DUMP) 2659 nidump = MAX_DUMP; 2660 adrs += ppc_inst_dump(adrs, nidump, 1); 2661 last_cmd = "di\n"; 2662 } else if (c == 'l') { 2663 dump_log_buf(); 2664 } else if (c == 'o') { 2665 dump_opal_msglog(); 2666 } else if (c == 'v') { 2667 /* dump virtual to physical translation */ 2668 show_pte(adrs); 2669 } else if (c == 'r') { 2670 scanhex(&ndump); 2671 if (ndump == 0) 2672 ndump = 64; 2673 xmon_rawdump(adrs, ndump); 2674 adrs += ndump; 2675 last_cmd = "dr\n"; 2676 } else { 2677 scanhex(&ndump); 2678 if (ndump == 0) 2679 ndump = 64; 2680 else if (ndump > MAX_DUMP) 2681 ndump = MAX_DUMP; 2682 2683 switch (c) { 2684 case '8': 2685 case '4': 2686 case '2': 2687 case '1': 2688 ndump = ALIGN(ndump, 16); 2689 dump_by_size(adrs, ndump, c - '0'); 2690 last[1] = c; 2691 last_cmd = last; 2692 break; 2693 default: 2694 prdump(adrs, ndump); 2695 last_cmd = "d\n"; 2696 } 2697 2698 adrs += ndump; 2699 } 2700 } 2701 2702 static void 2703 prdump(unsigned long adrs, long ndump) 2704 { 2705 long n, m, c, r, nr; 2706 unsigned char temp[16]; 2707 2708 for (n = ndump; n > 0;) { 2709 printf(REG, adrs); 2710 putchar(' '); 2711 r = n < 16? n: 16; 2712 nr = mread(adrs, temp, r); 2713 adrs += nr; 2714 for (m = 0; m < r; ++m) { 2715 if ((m & (sizeof(long) - 1)) == 0 && m > 0) 2716 putchar(' '); 2717 if (m < nr) 2718 printf("%.2x", temp[m]); 2719 else 2720 printf("%s", fault_chars[fault_type]); 2721 } 2722 for (; m < 16; ++m) { 2723 if ((m & (sizeof(long) - 1)) == 0) 2724 putchar(' '); 2725 printf(" "); 2726 } 2727 printf(" |"); 2728 for (m = 0; m < r; ++m) { 2729 if (m < nr) { 2730 c = temp[m]; 2731 putchar(' ' <= c && c <= '~'? c: '.'); 2732 } else 2733 putchar(' '); 2734 } 2735 n -= r; 2736 for (; m < 16; ++m) 2737 putchar(' '); 2738 printf("|\n"); 2739 if (nr < r) 2740 break; 2741 } 2742 } 2743 2744 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); 2745 2746 static int 2747 generic_inst_dump(unsigned long adr, long count, int praddr, 2748 instruction_dump_func dump_func) 2749 { 2750 int nr, dotted; 2751 unsigned long first_adr; 2752 unsigned int inst, last_inst = 0; 2753 unsigned char val[4]; 2754 2755 dotted = 0; 2756 for (first_adr = adr; count > 0; --count, adr += 4) { 2757 nr = mread(adr, val, 4); 2758 if (nr == 0) { 2759 if (praddr) { 2760 const char *x = fault_chars[fault_type]; 2761 printf(REG" %s%s%s%s\n", adr, x, x, x, x); 2762 } 2763 break; 2764 } 2765 inst = GETWORD(val); 2766 if (adr > first_adr && inst == last_inst) { 2767 if (!dotted) { 2768 printf(" ...\n"); 2769 dotted = 1; 2770 } 2771 continue; 2772 } 2773 dotted = 0; 2774 last_inst = inst; 2775 if (praddr) 2776 printf(REG" %.8x", adr, inst); 2777 printf("\t"); 2778 dump_func(inst, adr); 2779 printf("\n"); 2780 } 2781 return adr - first_adr; 2782 } 2783 2784 static int 2785 ppc_inst_dump(unsigned long adr, long count, int praddr) 2786 { 2787 return generic_inst_dump(adr, count, praddr, print_insn_powerpc); 2788 } 2789 2790 void 2791 print_address(unsigned long addr) 2792 { 2793 xmon_print_symbol(addr, "\t# ", ""); 2794 } 2795 2796 void 2797 dump_log_buf(void) 2798 { 2799 struct kmsg_dumper dumper = { .active = 1 }; 2800 unsigned char buf[128]; 2801 size_t len; 2802 2803 if (setjmp(bus_error_jmp) != 0) { 2804 printf("Error dumping printk buffer!\n"); 2805 return; 2806 } 2807 2808 catch_memory_errors = 1; 2809 sync(); 2810 2811 kmsg_dump_rewind_nolock(&dumper); 2812 xmon_start_pagination(); 2813 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) { 2814 buf[len] = '\0'; 2815 printf("%s", buf); 2816 } 2817 xmon_end_pagination(); 2818 2819 sync(); 2820 /* wait a little while to see if we get a machine check */ 2821 __delay(200); 2822 catch_memory_errors = 0; 2823 } 2824 2825 #ifdef CONFIG_PPC_POWERNV 2826 static void dump_opal_msglog(void) 2827 { 2828 unsigned char buf[128]; 2829 ssize_t res; 2830 loff_t pos = 0; 2831 2832 if (!firmware_has_feature(FW_FEATURE_OPAL)) { 2833 printf("Machine is not running OPAL firmware.\n"); 2834 return; 2835 } 2836 2837 if (setjmp(bus_error_jmp) != 0) { 2838 printf("Error dumping OPAL msglog!\n"); 2839 return; 2840 } 2841 2842 catch_memory_errors = 1; 2843 sync(); 2844 2845 xmon_start_pagination(); 2846 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) { 2847 if (res < 0) { 2848 printf("Error dumping OPAL msglog! Error: %zd\n", res); 2849 break; 2850 } 2851 buf[res] = '\0'; 2852 printf("%s", buf); 2853 pos += res; 2854 } 2855 xmon_end_pagination(); 2856 2857 sync(); 2858 /* wait a little while to see if we get a machine check */ 2859 __delay(200); 2860 catch_memory_errors = 0; 2861 } 2862 #endif 2863 2864 /* 2865 * Memory operations - move, set, print differences 2866 */ 2867 static unsigned long mdest; /* destination address */ 2868 static unsigned long msrc; /* source address */ 2869 static unsigned long mval; /* byte value to set memory to */ 2870 static unsigned long mcount; /* # bytes to affect */ 2871 static unsigned long mdiffs; /* max # differences to print */ 2872 2873 static void 2874 memops(int cmd) 2875 { 2876 scanhex((void *)&mdest); 2877 if( termch != '\n' ) 2878 termch = 0; 2879 scanhex((void *)(cmd == 's'? &mval: &msrc)); 2880 if( termch != '\n' ) 2881 termch = 0; 2882 scanhex((void *)&mcount); 2883 switch( cmd ){ 2884 case 'm': 2885 memmove((void *)mdest, (void *)msrc, mcount); 2886 break; 2887 case 's': 2888 memset((void *)mdest, mval, mcount); 2889 break; 2890 case 'd': 2891 if( termch != '\n' ) 2892 termch = 0; 2893 scanhex((void *)&mdiffs); 2894 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs); 2895 break; 2896 } 2897 } 2898 2899 static void 2900 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) 2901 { 2902 unsigned n, prt; 2903 2904 prt = 0; 2905 for( n = nb; n > 0; --n ) 2906 if( *p1++ != *p2++ ) 2907 if( ++prt <= maxpr ) 2908 printf("%px %.2x # %px %.2x\n", p1 - 1, 2909 p1[-1], p2 - 1, p2[-1]); 2910 if( prt > maxpr ) 2911 printf("Total of %d differences\n", prt); 2912 } 2913 2914 static unsigned mend; 2915 static unsigned mask; 2916 2917 static void 2918 memlocate(void) 2919 { 2920 unsigned a, n; 2921 unsigned char val[4]; 2922 2923 last_cmd = "ml"; 2924 scanhex((void *)&mdest); 2925 if (termch != '\n') { 2926 termch = 0; 2927 scanhex((void *)&mend); 2928 if (termch != '\n') { 2929 termch = 0; 2930 scanhex((void *)&mval); 2931 mask = ~0; 2932 if (termch != '\n') termch = 0; 2933 scanhex((void *)&mask); 2934 } 2935 } 2936 n = 0; 2937 for (a = mdest; a < mend; a += 4) { 2938 if (mread(a, val, 4) == 4 2939 && ((GETWORD(val) ^ mval) & mask) == 0) { 2940 printf("%.16x: %.16x\n", a, GETWORD(val)); 2941 if (++n >= 10) 2942 break; 2943 } 2944 } 2945 } 2946 2947 static unsigned long mskip = 0x1000; 2948 static unsigned long mlim = 0xffffffff; 2949 2950 static void 2951 memzcan(void) 2952 { 2953 unsigned char v; 2954 unsigned a; 2955 int ok, ook; 2956 2957 scanhex(&mdest); 2958 if (termch != '\n') termch = 0; 2959 scanhex(&mskip); 2960 if (termch != '\n') termch = 0; 2961 scanhex(&mlim); 2962 ook = 0; 2963 for (a = mdest; a < mlim; a += mskip) { 2964 ok = mread(a, &v, 1); 2965 if (ok && !ook) { 2966 printf("%.8x .. ", a); 2967 } else if (!ok && ook) 2968 printf("%.8lx\n", a - mskip); 2969 ook = ok; 2970 if (a + mskip < a) 2971 break; 2972 } 2973 if (ook) 2974 printf("%.8lx\n", a - mskip); 2975 } 2976 2977 static void show_task(struct task_struct *tsk) 2978 { 2979 char state; 2980 2981 /* 2982 * Cloned from kdb_task_state_char(), which is not entirely 2983 * appropriate for calling from xmon. This could be moved 2984 * to a common, generic, routine used by both. 2985 */ 2986 state = (tsk->state == 0) ? 'R' : 2987 (tsk->state < 0) ? 'U' : 2988 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' : 2989 (tsk->state & TASK_STOPPED) ? 'T' : 2990 (tsk->state & TASK_TRACED) ? 'C' : 2991 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' : 2992 (tsk->exit_state & EXIT_DEAD) ? 'E' : 2993 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?'; 2994 2995 printf("%px %016lx %6d %6d %c %2d %s\n", tsk, 2996 tsk->thread.ksp, 2997 tsk->pid, tsk->parent->pid, 2998 state, task_thread_info(tsk)->cpu, 2999 tsk->comm); 3000 } 3001 3002 #ifdef CONFIG_PPC_BOOK3S_64 3003 void format_pte(void *ptep, unsigned long pte) 3004 { 3005 pte_t entry = __pte(pte); 3006 3007 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte); 3008 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK); 3009 3010 printf("Flags = %s%s%s%s%s\n", 3011 pte_young(entry) ? "Accessed " : "", 3012 pte_dirty(entry) ? "Dirty " : "", 3013 pte_read(entry) ? "Read " : "", 3014 pte_write(entry) ? "Write " : "", 3015 pte_exec(entry) ? "Exec " : ""); 3016 } 3017 3018 static void show_pte(unsigned long addr) 3019 { 3020 unsigned long tskv = 0; 3021 struct task_struct *tsk = NULL; 3022 struct mm_struct *mm; 3023 pgd_t *pgdp, *pgdir; 3024 pud_t *pudp; 3025 pmd_t *pmdp; 3026 pte_t *ptep; 3027 3028 if (!scanhex(&tskv)) 3029 mm = &init_mm; 3030 else 3031 tsk = (struct task_struct *)tskv; 3032 3033 if (tsk == NULL) 3034 mm = &init_mm; 3035 else 3036 mm = tsk->active_mm; 3037 3038 if (setjmp(bus_error_jmp) != 0) { 3039 catch_memory_errors = 0; 3040 printf("*** Error dumping pte for task %px\n", tsk); 3041 return; 3042 } 3043 3044 catch_memory_errors = 1; 3045 sync(); 3046 3047 if (mm == &init_mm) { 3048 pgdp = pgd_offset_k(addr); 3049 pgdir = pgd_offset_k(0); 3050 } else { 3051 pgdp = pgd_offset(mm, addr); 3052 pgdir = pgd_offset(mm, 0); 3053 } 3054 3055 if (pgd_none(*pgdp)) { 3056 printf("no linux page table for address\n"); 3057 return; 3058 } 3059 3060 printf("pgd @ 0x%px\n", pgdir); 3061 3062 if (pgd_huge(*pgdp)) { 3063 format_pte(pgdp, pgd_val(*pgdp)); 3064 return; 3065 } 3066 printf("pgdp @ 0x%px = 0x%016lx\n", pgdp, pgd_val(*pgdp)); 3067 3068 pudp = pud_offset(pgdp, addr); 3069 3070 if (pud_none(*pudp)) { 3071 printf("No valid PUD\n"); 3072 return; 3073 } 3074 3075 if (pud_huge(*pudp)) { 3076 format_pte(pudp, pud_val(*pudp)); 3077 return; 3078 } 3079 3080 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp)); 3081 3082 pmdp = pmd_offset(pudp, addr); 3083 3084 if (pmd_none(*pmdp)) { 3085 printf("No valid PMD\n"); 3086 return; 3087 } 3088 3089 if (pmd_huge(*pmdp)) { 3090 format_pte(pmdp, pmd_val(*pmdp)); 3091 return; 3092 } 3093 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp)); 3094 3095 ptep = pte_offset_map(pmdp, addr); 3096 if (pte_none(*ptep)) { 3097 printf("no valid PTE\n"); 3098 return; 3099 } 3100 3101 format_pte(ptep, pte_val(*ptep)); 3102 3103 sync(); 3104 __delay(200); 3105 catch_memory_errors = 0; 3106 } 3107 #else 3108 static void show_pte(unsigned long addr) 3109 { 3110 printf("show_pte not yet implemented\n"); 3111 } 3112 #endif /* CONFIG_PPC_BOOK3S_64 */ 3113 3114 static void show_tasks(void) 3115 { 3116 unsigned long tskv; 3117 struct task_struct *tsk = NULL; 3118 3119 printf(" task_struct ->thread.ksp PID PPID S P CMD\n"); 3120 3121 if (scanhex(&tskv)) 3122 tsk = (struct task_struct *)tskv; 3123 3124 if (setjmp(bus_error_jmp) != 0) { 3125 catch_memory_errors = 0; 3126 printf("*** Error dumping task %px\n", tsk); 3127 return; 3128 } 3129 3130 catch_memory_errors = 1; 3131 sync(); 3132 3133 if (tsk) 3134 show_task(tsk); 3135 else 3136 for_each_process(tsk) 3137 show_task(tsk); 3138 3139 sync(); 3140 __delay(200); 3141 catch_memory_errors = 0; 3142 } 3143 3144 static void proccall(void) 3145 { 3146 unsigned long args[8]; 3147 unsigned long ret; 3148 int i; 3149 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long, 3150 unsigned long, unsigned long, unsigned long, 3151 unsigned long, unsigned long, unsigned long); 3152 callfunc_t func; 3153 3154 if (!scanhex(&adrs)) 3155 return; 3156 if (termch != '\n') 3157 termch = 0; 3158 for (i = 0; i < 8; ++i) 3159 args[i] = 0; 3160 for (i = 0; i < 8; ++i) { 3161 if (!scanhex(&args[i]) || termch == '\n') 3162 break; 3163 termch = 0; 3164 } 3165 func = (callfunc_t) adrs; 3166 ret = 0; 3167 if (setjmp(bus_error_jmp) == 0) { 3168 catch_memory_errors = 1; 3169 sync(); 3170 ret = func(args[0], args[1], args[2], args[3], 3171 args[4], args[5], args[6], args[7]); 3172 sync(); 3173 printf("return value is 0x%lx\n", ret); 3174 } else { 3175 printf("*** %x exception occurred\n", fault_except); 3176 } 3177 catch_memory_errors = 0; 3178 } 3179 3180 /* Input scanning routines */ 3181 int 3182 skipbl(void) 3183 { 3184 int c; 3185 3186 if( termch != 0 ){ 3187 c = termch; 3188 termch = 0; 3189 } else 3190 c = inchar(); 3191 while( c == ' ' || c == '\t' ) 3192 c = inchar(); 3193 return c; 3194 } 3195 3196 #define N_PTREGS 44 3197 static const char *regnames[N_PTREGS] = { 3198 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3199 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3200 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3201 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3202 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", 3203 #ifdef CONFIG_PPC64 3204 "softe", 3205 #else 3206 "mq", 3207 #endif 3208 "trap", "dar", "dsisr", "res" 3209 }; 3210 3211 int 3212 scanhex(unsigned long *vp) 3213 { 3214 int c, d; 3215 unsigned long v; 3216 3217 c = skipbl(); 3218 if (c == '%') { 3219 /* parse register name */ 3220 char regname[8]; 3221 int i; 3222 3223 for (i = 0; i < sizeof(regname) - 1; ++i) { 3224 c = inchar(); 3225 if (!isalnum(c)) { 3226 termch = c; 3227 break; 3228 } 3229 regname[i] = c; 3230 } 3231 regname[i] = 0; 3232 i = match_string(regnames, N_PTREGS, regname); 3233 if (i < 0) { 3234 printf("invalid register name '%%%s'\n", regname); 3235 return 0; 3236 } 3237 if (xmon_regs == NULL) { 3238 printf("regs not available\n"); 3239 return 0; 3240 } 3241 *vp = ((unsigned long *)xmon_regs)[i]; 3242 return 1; 3243 } 3244 3245 /* skip leading "0x" if any */ 3246 3247 if (c == '0') { 3248 c = inchar(); 3249 if (c == 'x') { 3250 c = inchar(); 3251 } else { 3252 d = hexdigit(c); 3253 if (d == EOF) { 3254 termch = c; 3255 *vp = 0; 3256 return 1; 3257 } 3258 } 3259 } else if (c == '$') { 3260 int i; 3261 for (i=0; i<63; i++) { 3262 c = inchar(); 3263 if (isspace(c) || c == '\0') { 3264 termch = c; 3265 break; 3266 } 3267 tmpstr[i] = c; 3268 } 3269 tmpstr[i++] = 0; 3270 *vp = 0; 3271 if (setjmp(bus_error_jmp) == 0) { 3272 catch_memory_errors = 1; 3273 sync(); 3274 *vp = kallsyms_lookup_name(tmpstr); 3275 sync(); 3276 } 3277 catch_memory_errors = 0; 3278 if (!(*vp)) { 3279 printf("unknown symbol '%s'\n", tmpstr); 3280 return 0; 3281 } 3282 return 1; 3283 } 3284 3285 d = hexdigit(c); 3286 if (d == EOF) { 3287 termch = c; 3288 return 0; 3289 } 3290 v = 0; 3291 do { 3292 v = (v << 4) + d; 3293 c = inchar(); 3294 d = hexdigit(c); 3295 } while (d != EOF); 3296 termch = c; 3297 *vp = v; 3298 return 1; 3299 } 3300 3301 static void 3302 scannl(void) 3303 { 3304 int c; 3305 3306 c = termch; 3307 termch = 0; 3308 while( c != '\n' ) 3309 c = inchar(); 3310 } 3311 3312 static int hexdigit(int c) 3313 { 3314 if( '0' <= c && c <= '9' ) 3315 return c - '0'; 3316 if( 'A' <= c && c <= 'F' ) 3317 return c - ('A' - 10); 3318 if( 'a' <= c && c <= 'f' ) 3319 return c - ('a' - 10); 3320 return EOF; 3321 } 3322 3323 void 3324 getstring(char *s, int size) 3325 { 3326 int c; 3327 3328 c = skipbl(); 3329 do { 3330 if( size > 1 ){ 3331 *s++ = c; 3332 --size; 3333 } 3334 c = inchar(); 3335 } while( c != ' ' && c != '\t' && c != '\n' ); 3336 termch = c; 3337 *s = 0; 3338 } 3339 3340 static char line[256]; 3341 static char *lineptr; 3342 3343 static void 3344 flush_input(void) 3345 { 3346 lineptr = NULL; 3347 } 3348 3349 static int 3350 inchar(void) 3351 { 3352 if (lineptr == NULL || *lineptr == 0) { 3353 if (xmon_gets(line, sizeof(line)) == NULL) { 3354 lineptr = NULL; 3355 return EOF; 3356 } 3357 lineptr = line; 3358 } 3359 return *lineptr++; 3360 } 3361 3362 static void 3363 take_input(char *str) 3364 { 3365 lineptr = str; 3366 } 3367 3368 3369 static void 3370 symbol_lookup(void) 3371 { 3372 int type = inchar(); 3373 unsigned long addr, cpu; 3374 void __percpu *ptr = NULL; 3375 static char tmp[64]; 3376 3377 switch (type) { 3378 case 'a': 3379 if (scanhex(&addr)) 3380 xmon_print_symbol(addr, ": ", "\n"); 3381 termch = 0; 3382 break; 3383 case 's': 3384 getstring(tmp, 64); 3385 if (setjmp(bus_error_jmp) == 0) { 3386 catch_memory_errors = 1; 3387 sync(); 3388 addr = kallsyms_lookup_name(tmp); 3389 if (addr) 3390 printf("%s: %lx\n", tmp, addr); 3391 else 3392 printf("Symbol '%s' not found.\n", tmp); 3393 sync(); 3394 } 3395 catch_memory_errors = 0; 3396 termch = 0; 3397 break; 3398 case 'p': 3399 getstring(tmp, 64); 3400 if (setjmp(bus_error_jmp) == 0) { 3401 catch_memory_errors = 1; 3402 sync(); 3403 ptr = (void __percpu *)kallsyms_lookup_name(tmp); 3404 sync(); 3405 } 3406 3407 if (ptr && 3408 ptr >= (void __percpu *)__per_cpu_start && 3409 ptr < (void __percpu *)__per_cpu_end) 3410 { 3411 if (scanhex(&cpu) && cpu < num_possible_cpus()) { 3412 addr = (unsigned long)per_cpu_ptr(ptr, cpu); 3413 } else { 3414 cpu = raw_smp_processor_id(); 3415 addr = (unsigned long)this_cpu_ptr(ptr); 3416 } 3417 3418 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr); 3419 } else { 3420 printf("Percpu symbol '%s' not found.\n", tmp); 3421 } 3422 3423 catch_memory_errors = 0; 3424 termch = 0; 3425 break; 3426 } 3427 } 3428 3429 3430 /* Print an address in numeric and symbolic form (if possible) */ 3431 static void xmon_print_symbol(unsigned long address, const char *mid, 3432 const char *after) 3433 { 3434 char *modname; 3435 const char *name = NULL; 3436 unsigned long offset, size; 3437 3438 printf(REG, address); 3439 if (setjmp(bus_error_jmp) == 0) { 3440 catch_memory_errors = 1; 3441 sync(); 3442 name = kallsyms_lookup(address, &size, &offset, &modname, 3443 tmpstr); 3444 sync(); 3445 /* wait a little while to see if we get a machine check */ 3446 __delay(200); 3447 } 3448 3449 catch_memory_errors = 0; 3450 3451 if (name) { 3452 printf("%s%s+%#lx/%#lx", mid, name, offset, size); 3453 if (modname) 3454 printf(" [%s]", modname); 3455 } 3456 printf("%s", after); 3457 } 3458 3459 #ifdef CONFIG_PPC_BOOK3S_64 3460 void dump_segments(void) 3461 { 3462 int i; 3463 unsigned long esid,vsid; 3464 unsigned long llp; 3465 3466 printf("SLB contents of cpu 0x%x\n", smp_processor_id()); 3467 3468 for (i = 0; i < mmu_slb_size; i++) { 3469 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i)); 3470 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i)); 3471 3472 if (!esid && !vsid) 3473 continue; 3474 3475 printf("%02d %016lx %016lx", i, esid, vsid); 3476 3477 if (!(esid & SLB_ESID_V)) { 3478 printf("\n"); 3479 continue; 3480 } 3481 3482 llp = vsid & SLB_VSID_LLP; 3483 if (vsid & SLB_VSID_B_1T) { 3484 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n", 3485 GET_ESID_1T(esid), 3486 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T, 3487 llp); 3488 } else { 3489 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n", 3490 GET_ESID(esid), 3491 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT, 3492 llp); 3493 } 3494 } 3495 } 3496 #endif 3497 3498 #ifdef CONFIG_PPC_STD_MMU_32 3499 void dump_segments(void) 3500 { 3501 int i; 3502 3503 printf("sr0-15 ="); 3504 for (i = 0; i < 16; ++i) 3505 printf(" %x", mfsrin(i)); 3506 printf("\n"); 3507 } 3508 #endif 3509 3510 #ifdef CONFIG_44x 3511 static void dump_tlb_44x(void) 3512 { 3513 int i; 3514 3515 for (i = 0; i < PPC44x_TLB_SIZE; i++) { 3516 unsigned long w0,w1,w2; 3517 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i)); 3518 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i)); 3519 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i)); 3520 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2); 3521 if (w0 & PPC44x_TLB_VALID) { 3522 printf("V %08lx -> %01lx%08lx %c%c%c%c%c", 3523 w0 & PPC44x_TLB_EPN_MASK, 3524 w1 & PPC44x_TLB_ERPN_MASK, 3525 w1 & PPC44x_TLB_RPN_MASK, 3526 (w2 & PPC44x_TLB_W) ? 'W' : 'w', 3527 (w2 & PPC44x_TLB_I) ? 'I' : 'i', 3528 (w2 & PPC44x_TLB_M) ? 'M' : 'm', 3529 (w2 & PPC44x_TLB_G) ? 'G' : 'g', 3530 (w2 & PPC44x_TLB_E) ? 'E' : 'e'); 3531 } 3532 printf("\n"); 3533 } 3534 } 3535 #endif /* CONFIG_44x */ 3536 3537 #ifdef CONFIG_PPC_BOOK3E 3538 static void dump_tlb_book3e(void) 3539 { 3540 u32 mmucfg, pidmask, lpidmask; 3541 u64 ramask; 3542 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0; 3543 int mmu_version; 3544 static const char *pgsz_names[] = { 3545 " 1K", 3546 " 2K", 3547 " 4K", 3548 " 8K", 3549 " 16K", 3550 " 32K", 3551 " 64K", 3552 "128K", 3553 "256K", 3554 "512K", 3555 " 1M", 3556 " 2M", 3557 " 4M", 3558 " 8M", 3559 " 16M", 3560 " 32M", 3561 " 64M", 3562 "128M", 3563 "256M", 3564 "512M", 3565 " 1G", 3566 " 2G", 3567 " 4G", 3568 " 8G", 3569 " 16G", 3570 " 32G", 3571 " 64G", 3572 "128G", 3573 "256G", 3574 "512G", 3575 " 1T", 3576 " 2T", 3577 }; 3578 3579 /* Gather some infos about the MMU */ 3580 mmucfg = mfspr(SPRN_MMUCFG); 3581 mmu_version = (mmucfg & 3) + 1; 3582 ntlbs = ((mmucfg >> 2) & 3) + 1; 3583 pidsz = ((mmucfg >> 6) & 0x1f) + 1; 3584 lpidsz = (mmucfg >> 24) & 0xf; 3585 rasz = (mmucfg >> 16) & 0x7f; 3586 if ((mmu_version > 1) && (mmucfg & 0x10000)) 3587 lrat = 1; 3588 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n", 3589 mmu_version, ntlbs, pidsz, lpidsz, rasz); 3590 pidmask = (1ul << pidsz) - 1; 3591 lpidmask = (1ul << lpidsz) - 1; 3592 ramask = (1ull << rasz) - 1; 3593 3594 for (tlb = 0; tlb < ntlbs; tlb++) { 3595 u32 tlbcfg; 3596 int nent, assoc, new_cc = 1; 3597 printf("TLB %d:\n------\n", tlb); 3598 switch(tlb) { 3599 case 0: 3600 tlbcfg = mfspr(SPRN_TLB0CFG); 3601 break; 3602 case 1: 3603 tlbcfg = mfspr(SPRN_TLB1CFG); 3604 break; 3605 case 2: 3606 tlbcfg = mfspr(SPRN_TLB2CFG); 3607 break; 3608 case 3: 3609 tlbcfg = mfspr(SPRN_TLB3CFG); 3610 break; 3611 default: 3612 printf("Unsupported TLB number !\n"); 3613 continue; 3614 } 3615 nent = tlbcfg & 0xfff; 3616 assoc = (tlbcfg >> 24) & 0xff; 3617 for (i = 0; i < nent; i++) { 3618 u32 mas0 = MAS0_TLBSEL(tlb); 3619 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K); 3620 u64 mas2 = 0; 3621 u64 mas7_mas3; 3622 int esel = i, cc = i; 3623 3624 if (assoc != 0) { 3625 cc = i / assoc; 3626 esel = i % assoc; 3627 mas2 = cc * 0x1000; 3628 } 3629 3630 mas0 |= MAS0_ESEL(esel); 3631 mtspr(SPRN_MAS0, mas0); 3632 mtspr(SPRN_MAS1, mas1); 3633 mtspr(SPRN_MAS2, mas2); 3634 asm volatile("tlbre 0,0,0" : : : "memory"); 3635 mas1 = mfspr(SPRN_MAS1); 3636 mas2 = mfspr(SPRN_MAS2); 3637 mas7_mas3 = mfspr(SPRN_MAS7_MAS3); 3638 if (assoc && (i % assoc) == 0) 3639 new_cc = 1; 3640 if (!(mas1 & MAS1_VALID)) 3641 continue; 3642 if (assoc == 0) 3643 printf("%04x- ", i); 3644 else if (new_cc) 3645 printf("%04x-%c", cc, 'A' + esel); 3646 else 3647 printf(" |%c", 'A' + esel); 3648 new_cc = 0; 3649 printf(" %016llx %04x %s %c%c AS%c", 3650 mas2 & ~0x3ffull, 3651 (mas1 >> 16) & 0x3fff, 3652 pgsz_names[(mas1 >> 7) & 0x1f], 3653 mas1 & MAS1_IND ? 'I' : ' ', 3654 mas1 & MAS1_IPROT ? 'P' : ' ', 3655 mas1 & MAS1_TS ? '1' : '0'); 3656 printf(" %c%c%c%c%c%c%c", 3657 mas2 & MAS2_X0 ? 'a' : ' ', 3658 mas2 & MAS2_X1 ? 'v' : ' ', 3659 mas2 & MAS2_W ? 'w' : ' ', 3660 mas2 & MAS2_I ? 'i' : ' ', 3661 mas2 & MAS2_M ? 'm' : ' ', 3662 mas2 & MAS2_G ? 'g' : ' ', 3663 mas2 & MAS2_E ? 'e' : ' '); 3664 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull); 3665 if (mas1 & MAS1_IND) 3666 printf(" %s\n", 3667 pgsz_names[(mas7_mas3 >> 1) & 0x1f]); 3668 else 3669 printf(" U%c%c%c S%c%c%c\n", 3670 mas7_mas3 & MAS3_UX ? 'x' : ' ', 3671 mas7_mas3 & MAS3_UW ? 'w' : ' ', 3672 mas7_mas3 & MAS3_UR ? 'r' : ' ', 3673 mas7_mas3 & MAS3_SX ? 'x' : ' ', 3674 mas7_mas3 & MAS3_SW ? 'w' : ' ', 3675 mas7_mas3 & MAS3_SR ? 'r' : ' '); 3676 } 3677 } 3678 } 3679 #endif /* CONFIG_PPC_BOOK3E */ 3680 3681 static void xmon_init(int enable) 3682 { 3683 if (enable) { 3684 __debugger = xmon; 3685 __debugger_ipi = xmon_ipi; 3686 __debugger_bpt = xmon_bpt; 3687 __debugger_sstep = xmon_sstep; 3688 __debugger_iabr_match = xmon_iabr_match; 3689 __debugger_break_match = xmon_break_match; 3690 __debugger_fault_handler = xmon_fault_handler; 3691 } else { 3692 __debugger = NULL; 3693 __debugger_ipi = NULL; 3694 __debugger_bpt = NULL; 3695 __debugger_sstep = NULL; 3696 __debugger_iabr_match = NULL; 3697 __debugger_break_match = NULL; 3698 __debugger_fault_handler = NULL; 3699 } 3700 } 3701 3702 #ifdef CONFIG_MAGIC_SYSRQ 3703 static void sysrq_handle_xmon(int key) 3704 { 3705 /* ensure xmon is enabled */ 3706 xmon_init(1); 3707 debugger(get_irq_regs()); 3708 if (!xmon_on) 3709 xmon_init(0); 3710 } 3711 3712 static struct sysrq_key_op sysrq_xmon_op = { 3713 .handler = sysrq_handle_xmon, 3714 .help_msg = "xmon(x)", 3715 .action_msg = "Entering xmon", 3716 }; 3717 3718 static int __init setup_xmon_sysrq(void) 3719 { 3720 register_sysrq_key('x', &sysrq_xmon_op); 3721 return 0; 3722 } 3723 device_initcall(setup_xmon_sysrq); 3724 #endif /* CONFIG_MAGIC_SYSRQ */ 3725 3726 #ifdef CONFIG_DEBUG_FS 3727 static void clear_all_bpt(void) 3728 { 3729 int i; 3730 3731 /* clear/unpatch all breakpoints */ 3732 remove_bpts(); 3733 remove_cpu_bpts(); 3734 3735 /* Disable all breakpoints */ 3736 for (i = 0; i < NBPTS; ++i) 3737 bpts[i].enabled = 0; 3738 3739 /* Clear any data or iabr breakpoints */ 3740 if (iabr || dabr.enabled) { 3741 iabr = NULL; 3742 dabr.enabled = 0; 3743 } 3744 3745 printf("xmon: All breakpoints cleared\n"); 3746 } 3747 3748 static int xmon_dbgfs_set(void *data, u64 val) 3749 { 3750 xmon_on = !!val; 3751 xmon_init(xmon_on); 3752 3753 /* make sure all breakpoints removed when disabling */ 3754 if (!xmon_on) 3755 clear_all_bpt(); 3756 return 0; 3757 } 3758 3759 static int xmon_dbgfs_get(void *data, u64 *val) 3760 { 3761 *val = xmon_on; 3762 return 0; 3763 } 3764 3765 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get, 3766 xmon_dbgfs_set, "%llu\n"); 3767 3768 static int __init setup_xmon_dbgfs(void) 3769 { 3770 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL, 3771 &xmon_dbgfs_ops); 3772 return 0; 3773 } 3774 device_initcall(setup_xmon_dbgfs); 3775 #endif /* CONFIG_DEBUG_FS */ 3776 3777 static int xmon_early __initdata; 3778 3779 static int __init early_parse_xmon(char *p) 3780 { 3781 if (!p || strncmp(p, "early", 5) == 0) { 3782 /* just "xmon" is equivalent to "xmon=early" */ 3783 xmon_init(1); 3784 xmon_early = 1; 3785 xmon_on = 1; 3786 } else if (strncmp(p, "on", 2) == 0) { 3787 xmon_init(1); 3788 xmon_on = 1; 3789 } else if (strncmp(p, "off", 3) == 0) 3790 xmon_on = 0; 3791 else 3792 return 1; 3793 3794 return 0; 3795 } 3796 early_param("xmon", early_parse_xmon); 3797 3798 void __init xmon_setup(void) 3799 { 3800 if (xmon_on) 3801 xmon_init(1); 3802 if (xmon_early) 3803 debugger(NULL); 3804 } 3805 3806 #ifdef CONFIG_SPU_BASE 3807 3808 struct spu_info { 3809 struct spu *spu; 3810 u64 saved_mfc_sr1_RW; 3811 u32 saved_spu_runcntl_RW; 3812 unsigned long dump_addr; 3813 u8 stopped_ok; 3814 }; 3815 3816 #define XMON_NUM_SPUS 16 /* Enough for current hardware */ 3817 3818 static struct spu_info spu_info[XMON_NUM_SPUS]; 3819 3820 void xmon_register_spus(struct list_head *list) 3821 { 3822 struct spu *spu; 3823 3824 list_for_each_entry(spu, list, full_list) { 3825 if (spu->number >= XMON_NUM_SPUS) { 3826 WARN_ON(1); 3827 continue; 3828 } 3829 3830 spu_info[spu->number].spu = spu; 3831 spu_info[spu->number].stopped_ok = 0; 3832 spu_info[spu->number].dump_addr = (unsigned long) 3833 spu_info[spu->number].spu->local_store; 3834 } 3835 } 3836 3837 static void stop_spus(void) 3838 { 3839 struct spu *spu; 3840 int i; 3841 u64 tmp; 3842 3843 for (i = 0; i < XMON_NUM_SPUS; i++) { 3844 if (!spu_info[i].spu) 3845 continue; 3846 3847 if (setjmp(bus_error_jmp) == 0) { 3848 catch_memory_errors = 1; 3849 sync(); 3850 3851 spu = spu_info[i].spu; 3852 3853 spu_info[i].saved_spu_runcntl_RW = 3854 in_be32(&spu->problem->spu_runcntl_RW); 3855 3856 tmp = spu_mfc_sr1_get(spu); 3857 spu_info[i].saved_mfc_sr1_RW = tmp; 3858 3859 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 3860 spu_mfc_sr1_set(spu, tmp); 3861 3862 sync(); 3863 __delay(200); 3864 3865 spu_info[i].stopped_ok = 1; 3866 3867 printf("Stopped spu %.2d (was %s)\n", i, 3868 spu_info[i].saved_spu_runcntl_RW ? 3869 "running" : "stopped"); 3870 } else { 3871 catch_memory_errors = 0; 3872 printf("*** Error stopping spu %.2d\n", i); 3873 } 3874 catch_memory_errors = 0; 3875 } 3876 } 3877 3878 static void restart_spus(void) 3879 { 3880 struct spu *spu; 3881 int i; 3882 3883 for (i = 0; i < XMON_NUM_SPUS; i++) { 3884 if (!spu_info[i].spu) 3885 continue; 3886 3887 if (!spu_info[i].stopped_ok) { 3888 printf("*** Error, spu %d was not successfully stopped" 3889 ", not restarting\n", i); 3890 continue; 3891 } 3892 3893 if (setjmp(bus_error_jmp) == 0) { 3894 catch_memory_errors = 1; 3895 sync(); 3896 3897 spu = spu_info[i].spu; 3898 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW); 3899 out_be32(&spu->problem->spu_runcntl_RW, 3900 spu_info[i].saved_spu_runcntl_RW); 3901 3902 sync(); 3903 __delay(200); 3904 3905 printf("Restarted spu %.2d\n", i); 3906 } else { 3907 catch_memory_errors = 0; 3908 printf("*** Error restarting spu %.2d\n", i); 3909 } 3910 catch_memory_errors = 0; 3911 } 3912 } 3913 3914 #define DUMP_WIDTH 23 3915 #define DUMP_VALUE(format, field, value) \ 3916 do { \ 3917 if (setjmp(bus_error_jmp) == 0) { \ 3918 catch_memory_errors = 1; \ 3919 sync(); \ 3920 printf(" %-*s = "format"\n", DUMP_WIDTH, \ 3921 #field, value); \ 3922 sync(); \ 3923 __delay(200); \ 3924 } else { \ 3925 catch_memory_errors = 0; \ 3926 printf(" %-*s = *** Error reading field.\n", \ 3927 DUMP_WIDTH, #field); \ 3928 } \ 3929 catch_memory_errors = 0; \ 3930 } while (0) 3931 3932 #define DUMP_FIELD(obj, format, field) \ 3933 DUMP_VALUE(format, field, obj->field) 3934 3935 static void dump_spu_fields(struct spu *spu) 3936 { 3937 printf("Dumping spu fields at address %p:\n", spu); 3938 3939 DUMP_FIELD(spu, "0x%x", number); 3940 DUMP_FIELD(spu, "%s", name); 3941 DUMP_FIELD(spu, "0x%lx", local_store_phys); 3942 DUMP_FIELD(spu, "0x%p", local_store); 3943 DUMP_FIELD(spu, "0x%lx", ls_size); 3944 DUMP_FIELD(spu, "0x%x", node); 3945 DUMP_FIELD(spu, "0x%lx", flags); 3946 DUMP_FIELD(spu, "%llu", class_0_pending); 3947 DUMP_FIELD(spu, "0x%llx", class_0_dar); 3948 DUMP_FIELD(spu, "0x%llx", class_1_dar); 3949 DUMP_FIELD(spu, "0x%llx", class_1_dsisr); 3950 DUMP_FIELD(spu, "0x%x", irqs[0]); 3951 DUMP_FIELD(spu, "0x%x", irqs[1]); 3952 DUMP_FIELD(spu, "0x%x", irqs[2]); 3953 DUMP_FIELD(spu, "0x%x", slb_replace); 3954 DUMP_FIELD(spu, "%d", pid); 3955 DUMP_FIELD(spu, "0x%p", mm); 3956 DUMP_FIELD(spu, "0x%p", ctx); 3957 DUMP_FIELD(spu, "0x%p", rq); 3958 DUMP_FIELD(spu, "0x%llx", timestamp); 3959 DUMP_FIELD(spu, "0x%lx", problem_phys); 3960 DUMP_FIELD(spu, "0x%p", problem); 3961 DUMP_VALUE("0x%x", problem->spu_runcntl_RW, 3962 in_be32(&spu->problem->spu_runcntl_RW)); 3963 DUMP_VALUE("0x%x", problem->spu_status_R, 3964 in_be32(&spu->problem->spu_status_R)); 3965 DUMP_VALUE("0x%x", problem->spu_npc_RW, 3966 in_be32(&spu->problem->spu_npc_RW)); 3967 DUMP_FIELD(spu, "0x%p", priv2); 3968 DUMP_FIELD(spu, "0x%p", pdata); 3969 } 3970 3971 int 3972 spu_inst_dump(unsigned long adr, long count, int praddr) 3973 { 3974 return generic_inst_dump(adr, count, praddr, print_insn_spu); 3975 } 3976 3977 static void dump_spu_ls(unsigned long num, int subcmd) 3978 { 3979 unsigned long offset, addr, ls_addr; 3980 3981 if (setjmp(bus_error_jmp) == 0) { 3982 catch_memory_errors = 1; 3983 sync(); 3984 ls_addr = (unsigned long)spu_info[num].spu->local_store; 3985 sync(); 3986 __delay(200); 3987 } else { 3988 catch_memory_errors = 0; 3989 printf("*** Error: accessing spu info for spu %ld\n", num); 3990 return; 3991 } 3992 catch_memory_errors = 0; 3993 3994 if (scanhex(&offset)) 3995 addr = ls_addr + offset; 3996 else 3997 addr = spu_info[num].dump_addr; 3998 3999 if (addr >= ls_addr + LS_SIZE) { 4000 printf("*** Error: address outside of local store\n"); 4001 return; 4002 } 4003 4004 switch (subcmd) { 4005 case 'i': 4006 addr += spu_inst_dump(addr, 16, 1); 4007 last_cmd = "sdi\n"; 4008 break; 4009 default: 4010 prdump(addr, 64); 4011 addr += 64; 4012 last_cmd = "sd\n"; 4013 break; 4014 } 4015 4016 spu_info[num].dump_addr = addr; 4017 } 4018 4019 static int do_spu_cmd(void) 4020 { 4021 static unsigned long num = 0; 4022 int cmd, subcmd = 0; 4023 4024 cmd = inchar(); 4025 switch (cmd) { 4026 case 's': 4027 stop_spus(); 4028 break; 4029 case 'r': 4030 restart_spus(); 4031 break; 4032 case 'd': 4033 subcmd = inchar(); 4034 if (isxdigit(subcmd) || subcmd == '\n') 4035 termch = subcmd; 4036 case 'f': 4037 scanhex(&num); 4038 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) { 4039 printf("*** Error: invalid spu number\n"); 4040 return 0; 4041 } 4042 4043 switch (cmd) { 4044 case 'f': 4045 dump_spu_fields(spu_info[num].spu); 4046 break; 4047 default: 4048 dump_spu_ls(num, subcmd); 4049 break; 4050 } 4051 4052 break; 4053 default: 4054 return -1; 4055 } 4056 4057 return 0; 4058 } 4059 #else /* ! CONFIG_SPU_BASE */ 4060 static int do_spu_cmd(void) 4061 { 4062 return -1; 4063 } 4064 #endif 4065