1 /* 2 * Routines providing a simple monitor for use on the PowerMac. 3 * 4 * Copyright (C) 1996-2005 Paul Mackerras. 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 11 * 2 of the License, or (at your option) any later version. 12 */ 13 14 #include <linux/kernel.h> 15 #include <linux/errno.h> 16 #include <linux/sched/signal.h> 17 #include <linux/smp.h> 18 #include <linux/mm.h> 19 #include <linux/reboot.h> 20 #include <linux/delay.h> 21 #include <linux/kallsyms.h> 22 #include <linux/kmsg_dump.h> 23 #include <linux/cpumask.h> 24 #include <linux/export.h> 25 #include <linux/sysrq.h> 26 #include <linux/interrupt.h> 27 #include <linux/irq.h> 28 #include <linux/bug.h> 29 #include <linux/nmi.h> 30 #include <linux/ctype.h> 31 #include <linux/highmem.h> 32 33 #include <asm/debugfs.h> 34 #include <asm/ptrace.h> 35 #include <asm/smp.h> 36 #include <asm/string.h> 37 #include <asm/prom.h> 38 #include <asm/machdep.h> 39 #include <asm/xmon.h> 40 #include <asm/processor.h> 41 #include <asm/pgtable.h> 42 #include <asm/mmu.h> 43 #include <asm/mmu_context.h> 44 #include <asm/plpar_wrappers.h> 45 #include <asm/cputable.h> 46 #include <asm/rtas.h> 47 #include <asm/sstep.h> 48 #include <asm/irq_regs.h> 49 #include <asm/spu.h> 50 #include <asm/spu_priv1.h> 51 #include <asm/setjmp.h> 52 #include <asm/reg.h> 53 #include <asm/debug.h> 54 #include <asm/hw_breakpoint.h> 55 #include <asm/xive.h> 56 #include <asm/opal.h> 57 #include <asm/firmware.h> 58 #include <asm/code-patching.h> 59 #include <asm/sections.h> 60 61 #ifdef CONFIG_PPC64 62 #include <asm/hvcall.h> 63 #include <asm/paca.h> 64 #endif 65 66 #include "nonstdio.h" 67 #include "dis-asm.h" 68 69 #ifdef CONFIG_SMP 70 static cpumask_t cpus_in_xmon = CPU_MASK_NONE; 71 static unsigned long xmon_taken = 1; 72 static int xmon_owner; 73 static int xmon_gate; 74 #else 75 #define xmon_owner 0 76 #endif /* CONFIG_SMP */ 77 78 #ifdef CONFIG_PPC_PSERIES 79 static int set_indicator_token = RTAS_UNKNOWN_SERVICE; 80 #endif 81 static unsigned long in_xmon __read_mostly = 0; 82 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT); 83 static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE); 84 85 static unsigned long adrs; 86 static int size = 1; 87 #define MAX_DUMP (128 * 1024) 88 static unsigned long ndump = 64; 89 static unsigned long nidump = 16; 90 static unsigned long ncsum = 4096; 91 static int termch; 92 static char tmpstr[128]; 93 static int tracing_enabled; 94 95 static long bus_error_jmp[JMP_BUF_LEN]; 96 static int catch_memory_errors; 97 static int catch_spr_faults; 98 static long *xmon_fault_jmp[NR_CPUS]; 99 100 /* Breakpoint stuff */ 101 struct bpt { 102 unsigned long address; 103 unsigned int instr[2]; 104 atomic_t ref_count; 105 int enabled; 106 unsigned long pad; 107 }; 108 109 /* Bits in bpt.enabled */ 110 #define BP_CIABR 1 111 #define BP_TRAP 2 112 #define BP_DABR 4 113 114 #define NBPTS 256 115 static struct bpt bpts[NBPTS]; 116 static struct bpt dabr; 117 static struct bpt *iabr; 118 static unsigned bpinstr = 0x7fe00008; /* trap */ 119 120 #define BP_NUM(bp) ((bp) - bpts + 1) 121 122 /* Prototypes */ 123 static int cmds(struct pt_regs *); 124 static int mread(unsigned long, void *, int); 125 static int mwrite(unsigned long, void *, int); 126 static int handle_fault(struct pt_regs *); 127 static void byterev(unsigned char *, int); 128 static void memex(void); 129 static int bsesc(void); 130 static void dump(void); 131 static void show_pte(unsigned long); 132 static void prdump(unsigned long, long); 133 static int ppc_inst_dump(unsigned long, long, int); 134 static void dump_log_buf(void); 135 136 #ifdef CONFIG_PPC_POWERNV 137 static void dump_opal_msglog(void); 138 #else 139 static inline void dump_opal_msglog(void) 140 { 141 printf("Machine is not running OPAL firmware.\n"); 142 } 143 #endif 144 145 static void backtrace(struct pt_regs *); 146 static void excprint(struct pt_regs *); 147 static void prregs(struct pt_regs *); 148 static void memops(int); 149 static void memlocate(void); 150 static void memzcan(void); 151 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned); 152 int skipbl(void); 153 int scanhex(unsigned long *valp); 154 static void scannl(void); 155 static int hexdigit(int); 156 void getstring(char *, int); 157 static void flush_input(void); 158 static int inchar(void); 159 static void take_input(char *); 160 static int read_spr(int, unsigned long *); 161 static void write_spr(int, unsigned long); 162 static void super_regs(void); 163 static void remove_bpts(void); 164 static void insert_bpts(void); 165 static void remove_cpu_bpts(void); 166 static void insert_cpu_bpts(void); 167 static struct bpt *at_breakpoint(unsigned long pc); 168 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp); 169 static int do_step(struct pt_regs *); 170 static void bpt_cmds(void); 171 static void cacheflush(void); 172 static int cpu_cmd(void); 173 static void csum(void); 174 static void bootcmds(void); 175 static void proccall(void); 176 static void show_tasks(void); 177 void dump_segments(void); 178 static void symbol_lookup(void); 179 static void xmon_show_stack(unsigned long sp, unsigned long lr, 180 unsigned long pc); 181 static void xmon_print_symbol(unsigned long address, const char *mid, 182 const char *after); 183 static const char *getvecname(unsigned long vec); 184 185 static int do_spu_cmd(void); 186 187 #ifdef CONFIG_44x 188 static void dump_tlb_44x(void); 189 #endif 190 #ifdef CONFIG_PPC_BOOK3E 191 static void dump_tlb_book3e(void); 192 #endif 193 194 #ifdef CONFIG_PPC64 195 #define REG "%.16lx" 196 #else 197 #define REG "%.8lx" 198 #endif 199 200 #ifdef __LITTLE_ENDIAN__ 201 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0]) 202 #else 203 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3]) 204 #endif 205 206 static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n"; 207 208 static char *help_string = "\ 209 Commands:\n\ 210 b show breakpoints\n\ 211 bd set data breakpoint\n\ 212 bi set instruction breakpoint\n\ 213 bc clear breakpoint\n" 214 #ifdef CONFIG_SMP 215 "\ 216 c print cpus stopped in xmon\n\ 217 c# try to switch to cpu number h (in hex)\n" 218 #endif 219 "\ 220 C checksum\n\ 221 d dump bytes\n\ 222 d1 dump 1 byte values\n\ 223 d2 dump 2 byte values\n\ 224 d4 dump 4 byte values\n\ 225 d8 dump 8 byte values\n\ 226 di dump instructions\n\ 227 df dump float values\n\ 228 dd dump double values\n\ 229 dl dump the kernel log buffer\n" 230 #ifdef CONFIG_PPC_POWERNV 231 "\ 232 do dump the OPAL message log\n" 233 #endif 234 #ifdef CONFIG_PPC64 235 "\ 236 dp[#] dump paca for current cpu, or cpu #\n\ 237 dpa dump paca for all possible cpus\n" 238 #endif 239 "\ 240 dr dump stream of raw bytes\n\ 241 dv dump virtual address translation \n\ 242 dt dump the tracing buffers (uses printk)\n\ 243 dtc dump the tracing buffers for current CPU (uses printk)\n\ 244 " 245 #ifdef CONFIG_PPC_POWERNV 246 " dx# dump xive on CPU #\n\ 247 dxi# dump xive irq state #\n\ 248 dxa dump xive on all CPUs\n" 249 #endif 250 " e print exception information\n\ 251 f flush cache\n\ 252 la lookup symbol+offset of specified address\n\ 253 ls lookup address of specified symbol\n\ 254 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\ 255 m examine/change memory\n\ 256 mm move a block of memory\n\ 257 ms set a block of memory\n\ 258 md compare two blocks of memory\n\ 259 ml locate a block of memory\n\ 260 mz zero a block of memory\n\ 261 mi show information about memory allocation\n\ 262 p call a procedure\n\ 263 P list processes/tasks\n\ 264 r print registers\n\ 265 s single step\n" 266 #ifdef CONFIG_SPU_BASE 267 " ss stop execution on all spus\n\ 268 sr restore execution on stopped spus\n\ 269 sf # dump spu fields for spu # (in hex)\n\ 270 sd # dump spu local store for spu # (in hex)\n\ 271 sdi # disassemble spu local store for spu # (in hex)\n" 272 #endif 273 " S print special registers\n\ 274 Sa print all SPRs\n\ 275 Sr # read SPR #\n\ 276 Sw #v write v to SPR #\n\ 277 t print backtrace\n\ 278 x exit monitor and recover\n\ 279 X exit monitor and don't recover\n" 280 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E) 281 " u dump segment table or SLB\n" 282 #elif defined(CONFIG_PPC_BOOK3S_32) 283 " u dump segment registers\n" 284 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E) 285 " u dump TLB\n" 286 #endif 287 " U show uptime information\n" 288 " ? help\n" 289 " # n limit output to n lines per page (for dp, dpa, dl)\n" 290 " zr reboot\n\ 291 zh halt\n" 292 ; 293 294 static struct pt_regs *xmon_regs; 295 296 static inline void sync(void) 297 { 298 asm volatile("sync; isync"); 299 } 300 301 static inline void store_inst(void *p) 302 { 303 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p)); 304 } 305 306 static inline void cflush(void *p) 307 { 308 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p)); 309 } 310 311 static inline void cinval(void *p) 312 { 313 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p)); 314 } 315 316 /** 317 * write_ciabr() - write the CIABR SPR 318 * @ciabr: The value to write. 319 * 320 * This function writes a value to the CIARB register either directly 321 * through mtspr instruction if the kernel is in HV privilege mode or 322 * call a hypervisor function to achieve the same in case the kernel 323 * is in supervisor privilege mode. 324 */ 325 static void write_ciabr(unsigned long ciabr) 326 { 327 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 328 return; 329 330 if (cpu_has_feature(CPU_FTR_HVMODE)) { 331 mtspr(SPRN_CIABR, ciabr); 332 return; 333 } 334 plpar_set_ciabr(ciabr); 335 } 336 337 /** 338 * set_ciabr() - set the CIABR 339 * @addr: The value to set. 340 * 341 * This function sets the correct privilege value into the the HW 342 * breakpoint address before writing it up in the CIABR register. 343 */ 344 static void set_ciabr(unsigned long addr) 345 { 346 addr &= ~CIABR_PRIV; 347 348 if (cpu_has_feature(CPU_FTR_HVMODE)) 349 addr |= CIABR_PRIV_HYPER; 350 else 351 addr |= CIABR_PRIV_SUPER; 352 write_ciabr(addr); 353 } 354 355 /* 356 * Disable surveillance (the service processor watchdog function) 357 * while we are in xmon. 358 * XXX we should re-enable it when we leave. :) 359 */ 360 #define SURVEILLANCE_TOKEN 9000 361 362 static inline void disable_surveillance(void) 363 { 364 #ifdef CONFIG_PPC_PSERIES 365 /* Since this can't be a module, args should end up below 4GB. */ 366 static struct rtas_args args; 367 368 /* 369 * At this point we have got all the cpus we can into 370 * xmon, so there is hopefully no other cpu calling RTAS 371 * at the moment, even though we don't take rtas.lock. 372 * If we did try to take rtas.lock there would be a 373 * real possibility of deadlock. 374 */ 375 if (set_indicator_token == RTAS_UNKNOWN_SERVICE) 376 return; 377 378 rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL, 379 SURVEILLANCE_TOKEN, 0, 0); 380 381 #endif /* CONFIG_PPC_PSERIES */ 382 } 383 384 #ifdef CONFIG_SMP 385 static int xmon_speaker; 386 387 static void get_output_lock(void) 388 { 389 int me = smp_processor_id() + 0x100; 390 int last_speaker = 0, prev; 391 long timeout; 392 393 if (xmon_speaker == me) 394 return; 395 396 for (;;) { 397 last_speaker = cmpxchg(&xmon_speaker, 0, me); 398 if (last_speaker == 0) 399 return; 400 401 /* 402 * Wait a full second for the lock, we might be on a slow 403 * console, but check every 100us. 404 */ 405 timeout = 10000; 406 while (xmon_speaker == last_speaker) { 407 if (--timeout > 0) { 408 udelay(100); 409 continue; 410 } 411 412 /* hostile takeover */ 413 prev = cmpxchg(&xmon_speaker, last_speaker, me); 414 if (prev == last_speaker) 415 return; 416 break; 417 } 418 } 419 } 420 421 static void release_output_lock(void) 422 { 423 xmon_speaker = 0; 424 } 425 426 int cpus_are_in_xmon(void) 427 { 428 return !cpumask_empty(&cpus_in_xmon); 429 } 430 431 static bool wait_for_other_cpus(int ncpus) 432 { 433 unsigned long timeout; 434 435 /* We wait for 2s, which is a metric "little while" */ 436 for (timeout = 20000; timeout != 0; --timeout) { 437 if (cpumask_weight(&cpus_in_xmon) >= ncpus) 438 return true; 439 udelay(100); 440 barrier(); 441 } 442 443 return false; 444 } 445 #endif /* CONFIG_SMP */ 446 447 static inline int unrecoverable_excp(struct pt_regs *regs) 448 { 449 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E) 450 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */ 451 return 0; 452 #else 453 return ((regs->msr & MSR_RI) == 0); 454 #endif 455 } 456 457 static int xmon_core(struct pt_regs *regs, int fromipi) 458 { 459 int cmd = 0; 460 struct bpt *bp; 461 long recurse_jmp[JMP_BUF_LEN]; 462 unsigned long offset; 463 unsigned long flags; 464 #ifdef CONFIG_SMP 465 int cpu; 466 int secondary; 467 #endif 468 469 local_irq_save(flags); 470 hard_irq_disable(); 471 472 tracing_enabled = tracing_is_on(); 473 tracing_off(); 474 475 bp = in_breakpoint_table(regs->nip, &offset); 476 if (bp != NULL) { 477 regs->nip = bp->address + offset; 478 atomic_dec(&bp->ref_count); 479 } 480 481 remove_cpu_bpts(); 482 483 #ifdef CONFIG_SMP 484 cpu = smp_processor_id(); 485 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 486 /* 487 * We catch SPR read/write faults here because the 0x700, 0xf60 488 * etc. handlers don't call debugger_fault_handler(). 489 */ 490 if (catch_spr_faults) 491 longjmp(bus_error_jmp, 1); 492 get_output_lock(); 493 excprint(regs); 494 printf("cpu 0x%x: Exception %lx %s in xmon, " 495 "returning to main loop\n", 496 cpu, regs->trap, getvecname(TRAP(regs))); 497 release_output_lock(); 498 longjmp(xmon_fault_jmp[cpu], 1); 499 } 500 501 if (setjmp(recurse_jmp) != 0) { 502 if (!in_xmon || !xmon_gate) { 503 get_output_lock(); 504 printf("xmon: WARNING: bad recursive fault " 505 "on cpu 0x%x\n", cpu); 506 release_output_lock(); 507 goto waiting; 508 } 509 secondary = !(xmon_taken && cpu == xmon_owner); 510 goto cmdloop; 511 } 512 513 xmon_fault_jmp[cpu] = recurse_jmp; 514 515 bp = NULL; 516 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) 517 bp = at_breakpoint(regs->nip); 518 if (bp || unrecoverable_excp(regs)) 519 fromipi = 0; 520 521 if (!fromipi) { 522 get_output_lock(); 523 excprint(regs); 524 if (bp) { 525 printf("cpu 0x%x stopped at breakpoint 0x%tx (", 526 cpu, BP_NUM(bp)); 527 xmon_print_symbol(regs->nip, " ", ")\n"); 528 } 529 if (unrecoverable_excp(regs)) 530 printf("WARNING: exception is not recoverable, " 531 "can't continue\n"); 532 release_output_lock(); 533 } 534 535 cpumask_set_cpu(cpu, &cpus_in_xmon); 536 537 waiting: 538 secondary = 1; 539 spin_begin(); 540 while (secondary && !xmon_gate) { 541 if (in_xmon == 0) { 542 if (fromipi) { 543 spin_end(); 544 goto leave; 545 } 546 secondary = test_and_set_bit(0, &in_xmon); 547 } 548 spin_cpu_relax(); 549 touch_nmi_watchdog(); 550 } 551 spin_end(); 552 553 if (!secondary && !xmon_gate) { 554 /* we are the first cpu to come in */ 555 /* interrupt other cpu(s) */ 556 int ncpus = num_online_cpus(); 557 558 xmon_owner = cpu; 559 mb(); 560 if (ncpus > 1) { 561 /* 562 * A system reset (trap == 0x100) can be triggered on 563 * all CPUs, so when we come in via 0x100 try waiting 564 * for the other CPUs to come in before we send the 565 * debugger break (IPI). This is similar to 566 * crash_kexec_secondary(). 567 */ 568 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus)) 569 smp_send_debugger_break(); 570 571 wait_for_other_cpus(ncpus); 572 } 573 remove_bpts(); 574 disable_surveillance(); 575 /* for breakpoint or single step, print the current instr. */ 576 if (bp || TRAP(regs) == 0xd00) 577 ppc_inst_dump(regs->nip, 1, 0); 578 printf("enter ? for help\n"); 579 mb(); 580 xmon_gate = 1; 581 barrier(); 582 touch_nmi_watchdog(); 583 } 584 585 cmdloop: 586 while (in_xmon) { 587 if (secondary) { 588 spin_begin(); 589 if (cpu == xmon_owner) { 590 if (!test_and_set_bit(0, &xmon_taken)) { 591 secondary = 0; 592 spin_end(); 593 continue; 594 } 595 /* missed it */ 596 while (cpu == xmon_owner) 597 spin_cpu_relax(); 598 } 599 spin_cpu_relax(); 600 touch_nmi_watchdog(); 601 } else { 602 cmd = cmds(regs); 603 if (cmd != 0) { 604 /* exiting xmon */ 605 insert_bpts(); 606 xmon_gate = 0; 607 wmb(); 608 in_xmon = 0; 609 break; 610 } 611 /* have switched to some other cpu */ 612 secondary = 1; 613 } 614 } 615 leave: 616 cpumask_clear_cpu(cpu, &cpus_in_xmon); 617 xmon_fault_jmp[cpu] = NULL; 618 #else 619 /* UP is simple... */ 620 if (in_xmon) { 621 printf("Exception %lx %s in xmon, returning to main loop\n", 622 regs->trap, getvecname(TRAP(regs))); 623 longjmp(xmon_fault_jmp[0], 1); 624 } 625 if (setjmp(recurse_jmp) == 0) { 626 xmon_fault_jmp[0] = recurse_jmp; 627 in_xmon = 1; 628 629 excprint(regs); 630 bp = at_breakpoint(regs->nip); 631 if (bp) { 632 printf("Stopped at breakpoint %tx (", BP_NUM(bp)); 633 xmon_print_symbol(regs->nip, " ", ")\n"); 634 } 635 if (unrecoverable_excp(regs)) 636 printf("WARNING: exception is not recoverable, " 637 "can't continue\n"); 638 remove_bpts(); 639 disable_surveillance(); 640 /* for breakpoint or single step, print the current instr. */ 641 if (bp || TRAP(regs) == 0xd00) 642 ppc_inst_dump(regs->nip, 1, 0); 643 printf("enter ? for help\n"); 644 } 645 646 cmd = cmds(regs); 647 648 insert_bpts(); 649 in_xmon = 0; 650 #endif 651 652 #ifdef CONFIG_BOOKE 653 if (regs->msr & MSR_DE) { 654 bp = at_breakpoint(regs->nip); 655 if (bp != NULL) { 656 regs->nip = (unsigned long) &bp->instr[0]; 657 atomic_inc(&bp->ref_count); 658 } 659 } 660 #else 661 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 662 bp = at_breakpoint(regs->nip); 663 if (bp != NULL) { 664 int stepped = emulate_step(regs, bp->instr[0]); 665 if (stepped == 0) { 666 regs->nip = (unsigned long) &bp->instr[0]; 667 atomic_inc(&bp->ref_count); 668 } else if (stepped < 0) { 669 printf("Couldn't single-step %s instruction\n", 670 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd")); 671 } 672 } 673 } 674 #endif 675 insert_cpu_bpts(); 676 677 touch_nmi_watchdog(); 678 local_irq_restore(flags); 679 680 return cmd != 'X' && cmd != EOF; 681 } 682 683 int xmon(struct pt_regs *excp) 684 { 685 struct pt_regs regs; 686 687 if (excp == NULL) { 688 ppc_save_regs(®s); 689 excp = ®s; 690 } 691 692 return xmon_core(excp, 0); 693 } 694 EXPORT_SYMBOL(xmon); 695 696 irqreturn_t xmon_irq(int irq, void *d) 697 { 698 unsigned long flags; 699 local_irq_save(flags); 700 printf("Keyboard interrupt\n"); 701 xmon(get_irq_regs()); 702 local_irq_restore(flags); 703 return IRQ_HANDLED; 704 } 705 706 static int xmon_bpt(struct pt_regs *regs) 707 { 708 struct bpt *bp; 709 unsigned long offset; 710 711 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 712 return 0; 713 714 /* Are we at the trap at bp->instr[1] for some bp? */ 715 bp = in_breakpoint_table(regs->nip, &offset); 716 if (bp != NULL && offset == 4) { 717 regs->nip = bp->address + 4; 718 atomic_dec(&bp->ref_count); 719 return 1; 720 } 721 722 /* Are we at a breakpoint? */ 723 bp = at_breakpoint(regs->nip); 724 if (!bp) 725 return 0; 726 727 xmon_core(regs, 0); 728 729 return 1; 730 } 731 732 static int xmon_sstep(struct pt_regs *regs) 733 { 734 if (user_mode(regs)) 735 return 0; 736 xmon_core(regs, 0); 737 return 1; 738 } 739 740 static int xmon_break_match(struct pt_regs *regs) 741 { 742 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 743 return 0; 744 if (dabr.enabled == 0) 745 return 0; 746 xmon_core(regs, 0); 747 return 1; 748 } 749 750 static int xmon_iabr_match(struct pt_regs *regs) 751 { 752 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 753 return 0; 754 if (iabr == NULL) 755 return 0; 756 xmon_core(regs, 0); 757 return 1; 758 } 759 760 static int xmon_ipi(struct pt_regs *regs) 761 { 762 #ifdef CONFIG_SMP 763 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon)) 764 xmon_core(regs, 1); 765 #endif 766 return 0; 767 } 768 769 static int xmon_fault_handler(struct pt_regs *regs) 770 { 771 struct bpt *bp; 772 unsigned long offset; 773 774 if (in_xmon && catch_memory_errors) 775 handle_fault(regs); /* doesn't return */ 776 777 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { 778 bp = in_breakpoint_table(regs->nip, &offset); 779 if (bp != NULL) { 780 regs->nip = bp->address + offset; 781 atomic_dec(&bp->ref_count); 782 } 783 } 784 785 return 0; 786 } 787 788 /* Force enable xmon if not already enabled */ 789 static inline void force_enable_xmon(void) 790 { 791 /* Enable xmon hooks if needed */ 792 if (!xmon_on) { 793 printf("xmon: Enabling debugger hooks\n"); 794 xmon_on = 1; 795 } 796 } 797 798 static struct bpt *at_breakpoint(unsigned long pc) 799 { 800 int i; 801 struct bpt *bp; 802 803 bp = bpts; 804 for (i = 0; i < NBPTS; ++i, ++bp) 805 if (bp->enabled && pc == bp->address) 806 return bp; 807 return NULL; 808 } 809 810 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp) 811 { 812 unsigned long off; 813 814 off = nip - (unsigned long) bpts; 815 if (off >= sizeof(bpts)) 816 return NULL; 817 off %= sizeof(struct bpt); 818 if (off != offsetof(struct bpt, instr[0]) 819 && off != offsetof(struct bpt, instr[1])) 820 return NULL; 821 *offp = off - offsetof(struct bpt, instr[0]); 822 return (struct bpt *) (nip - off); 823 } 824 825 static struct bpt *new_breakpoint(unsigned long a) 826 { 827 struct bpt *bp; 828 829 a &= ~3UL; 830 bp = at_breakpoint(a); 831 if (bp) 832 return bp; 833 834 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 835 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) { 836 bp->address = a; 837 bp->instr[1] = bpinstr; 838 store_inst(&bp->instr[1]); 839 return bp; 840 } 841 } 842 843 printf("Sorry, no free breakpoints. Please clear one first.\n"); 844 return NULL; 845 } 846 847 static void insert_bpts(void) 848 { 849 int i; 850 struct bpt *bp; 851 852 bp = bpts; 853 for (i = 0; i < NBPTS; ++i, ++bp) { 854 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0) 855 continue; 856 if (mread(bp->address, &bp->instr[0], 4) != 4) { 857 printf("Couldn't read instruction at %lx, " 858 "disabling breakpoint there\n", bp->address); 859 bp->enabled = 0; 860 continue; 861 } 862 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) { 863 printf("Breakpoint at %lx is on an mtmsrd or rfid " 864 "instruction, disabling it\n", bp->address); 865 bp->enabled = 0; 866 continue; 867 } 868 store_inst(&bp->instr[0]); 869 if (bp->enabled & BP_CIABR) 870 continue; 871 if (patch_instruction((unsigned int *)bp->address, 872 bpinstr) != 0) { 873 printf("Couldn't write instruction at %lx, " 874 "disabling breakpoint there\n", bp->address); 875 bp->enabled &= ~BP_TRAP; 876 continue; 877 } 878 store_inst((void *)bp->address); 879 } 880 } 881 882 static void insert_cpu_bpts(void) 883 { 884 struct arch_hw_breakpoint brk; 885 886 if (dabr.enabled) { 887 brk.address = dabr.address; 888 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL; 889 brk.len = 8; 890 __set_breakpoint(&brk); 891 } 892 893 if (iabr) 894 set_ciabr(iabr->address); 895 } 896 897 static void remove_bpts(void) 898 { 899 int i; 900 struct bpt *bp; 901 unsigned instr; 902 903 bp = bpts; 904 for (i = 0; i < NBPTS; ++i, ++bp) { 905 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) 906 continue; 907 if (mread(bp->address, &instr, 4) == 4 908 && instr == bpinstr 909 && patch_instruction( 910 (unsigned int *)bp->address, bp->instr[0]) != 0) 911 printf("Couldn't remove breakpoint at %lx\n", 912 bp->address); 913 else 914 store_inst((void *)bp->address); 915 } 916 } 917 918 static void remove_cpu_bpts(void) 919 { 920 hw_breakpoint_disable(); 921 write_ciabr(0); 922 } 923 924 /* Based on uptime_proc_show(). */ 925 static void 926 show_uptime(void) 927 { 928 struct timespec64 uptime; 929 930 if (setjmp(bus_error_jmp) == 0) { 931 catch_memory_errors = 1; 932 sync(); 933 934 ktime_get_coarse_boottime_ts64(&uptime); 935 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec, 936 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100))); 937 938 sync(); 939 __delay(200); \ 940 } 941 catch_memory_errors = 0; 942 } 943 944 static void set_lpp_cmd(void) 945 { 946 unsigned long lpp; 947 948 if (!scanhex(&lpp)) { 949 printf("Invalid number.\n"); 950 lpp = 0; 951 } 952 xmon_set_pagination_lpp(lpp); 953 } 954 /* Command interpreting routine */ 955 static char *last_cmd; 956 957 static int 958 cmds(struct pt_regs *excp) 959 { 960 int cmd = 0; 961 962 last_cmd = NULL; 963 xmon_regs = excp; 964 965 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 966 967 for(;;) { 968 #ifdef CONFIG_SMP 969 printf("%x:", smp_processor_id()); 970 #endif /* CONFIG_SMP */ 971 printf("mon> "); 972 flush_input(); 973 termch = 0; 974 cmd = skipbl(); 975 if( cmd == '\n' ) { 976 if (last_cmd == NULL) 977 continue; 978 take_input(last_cmd); 979 last_cmd = NULL; 980 cmd = inchar(); 981 } 982 switch (cmd) { 983 case 'm': 984 cmd = inchar(); 985 switch (cmd) { 986 case 'm': 987 case 's': 988 case 'd': 989 memops(cmd); 990 break; 991 case 'l': 992 memlocate(); 993 break; 994 case 'z': 995 if (xmon_is_ro) { 996 printf(xmon_ro_msg); 997 break; 998 } 999 memzcan(); 1000 break; 1001 case 'i': 1002 show_mem(0, NULL); 1003 break; 1004 default: 1005 termch = cmd; 1006 memex(); 1007 } 1008 break; 1009 case 'd': 1010 dump(); 1011 break; 1012 case 'l': 1013 symbol_lookup(); 1014 break; 1015 case 'r': 1016 prregs(excp); /* print regs */ 1017 break; 1018 case 'e': 1019 excprint(excp); 1020 break; 1021 case 'S': 1022 super_regs(); 1023 break; 1024 case 't': 1025 backtrace(excp); 1026 break; 1027 case 'f': 1028 cacheflush(); 1029 break; 1030 case 's': 1031 if (do_spu_cmd() == 0) 1032 break; 1033 if (do_step(excp)) 1034 return cmd; 1035 break; 1036 case 'x': 1037 case 'X': 1038 if (tracing_enabled) 1039 tracing_on(); 1040 return cmd; 1041 case EOF: 1042 printf(" <no input ...>\n"); 1043 mdelay(2000); 1044 return cmd; 1045 case '?': 1046 xmon_puts(help_string); 1047 break; 1048 case '#': 1049 set_lpp_cmd(); 1050 break; 1051 case 'b': 1052 if (xmon_is_ro) { 1053 printf(xmon_ro_msg); 1054 break; 1055 } 1056 bpt_cmds(); 1057 break; 1058 case 'C': 1059 csum(); 1060 break; 1061 case 'c': 1062 if (cpu_cmd()) 1063 return 0; 1064 break; 1065 case 'z': 1066 bootcmds(); 1067 break; 1068 case 'p': 1069 if (xmon_is_ro) { 1070 printf(xmon_ro_msg); 1071 break; 1072 } 1073 proccall(); 1074 break; 1075 case 'P': 1076 show_tasks(); 1077 break; 1078 #ifdef CONFIG_PPC_BOOK3S 1079 case 'u': 1080 dump_segments(); 1081 break; 1082 #elif defined(CONFIG_44x) 1083 case 'u': 1084 dump_tlb_44x(); 1085 break; 1086 #elif defined(CONFIG_PPC_BOOK3E) 1087 case 'u': 1088 dump_tlb_book3e(); 1089 break; 1090 #endif 1091 case 'U': 1092 show_uptime(); 1093 break; 1094 default: 1095 printf("Unrecognized command: "); 1096 do { 1097 if (' ' < cmd && cmd <= '~') 1098 putchar(cmd); 1099 else 1100 printf("\\x%x", cmd); 1101 cmd = inchar(); 1102 } while (cmd != '\n'); 1103 printf(" (type ? for help)\n"); 1104 break; 1105 } 1106 } 1107 } 1108 1109 #ifdef CONFIG_BOOKE 1110 static int do_step(struct pt_regs *regs) 1111 { 1112 regs->msr |= MSR_DE; 1113 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 1114 return 1; 1115 } 1116 #else 1117 /* 1118 * Step a single instruction. 1119 * Some instructions we emulate, others we execute with MSR_SE set. 1120 */ 1121 static int do_step(struct pt_regs *regs) 1122 { 1123 unsigned int instr; 1124 int stepped; 1125 1126 force_enable_xmon(); 1127 /* check we are in 64-bit kernel mode, translation enabled */ 1128 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { 1129 if (mread(regs->nip, &instr, 4) == 4) { 1130 stepped = emulate_step(regs, instr); 1131 if (stepped < 0) { 1132 printf("Couldn't single-step %s instruction\n", 1133 (IS_RFID(instr)? "rfid": "mtmsrd")); 1134 return 0; 1135 } 1136 if (stepped > 0) { 1137 regs->trap = 0xd00 | (regs->trap & 1); 1138 printf("stepped to "); 1139 xmon_print_symbol(regs->nip, " ", "\n"); 1140 ppc_inst_dump(regs->nip, 1, 0); 1141 return 0; 1142 } 1143 } 1144 } 1145 regs->msr |= MSR_SE; 1146 return 1; 1147 } 1148 #endif 1149 1150 static void bootcmds(void) 1151 { 1152 int cmd; 1153 1154 cmd = inchar(); 1155 if (cmd == 'r') 1156 ppc_md.restart(NULL); 1157 else if (cmd == 'h') 1158 ppc_md.halt(); 1159 else if (cmd == 'p') 1160 if (pm_power_off) 1161 pm_power_off(); 1162 } 1163 1164 static int cpu_cmd(void) 1165 { 1166 #ifdef CONFIG_SMP 1167 unsigned long cpu, first_cpu, last_cpu; 1168 int timeout; 1169 1170 if (!scanhex(&cpu)) { 1171 /* print cpus waiting or in xmon */ 1172 printf("cpus stopped:"); 1173 last_cpu = first_cpu = NR_CPUS; 1174 for_each_possible_cpu(cpu) { 1175 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1176 if (cpu == last_cpu + 1) { 1177 last_cpu = cpu; 1178 } else { 1179 if (last_cpu != first_cpu) 1180 printf("-0x%lx", last_cpu); 1181 last_cpu = first_cpu = cpu; 1182 printf(" 0x%lx", cpu); 1183 } 1184 } 1185 } 1186 if (last_cpu != first_cpu) 1187 printf("-0x%lx", last_cpu); 1188 printf("\n"); 1189 return 0; 1190 } 1191 /* try to switch to cpu specified */ 1192 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) { 1193 printf("cpu 0x%lx isn't in xmon\n", cpu); 1194 #ifdef CONFIG_PPC64 1195 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu); 1196 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0); 1197 #endif 1198 return 0; 1199 } 1200 xmon_taken = 0; 1201 mb(); 1202 xmon_owner = cpu; 1203 timeout = 10000000; 1204 while (!xmon_taken) { 1205 if (--timeout == 0) { 1206 if (test_and_set_bit(0, &xmon_taken)) 1207 break; 1208 /* take control back */ 1209 mb(); 1210 xmon_owner = smp_processor_id(); 1211 printf("cpu 0x%lx didn't take control\n", cpu); 1212 return 0; 1213 } 1214 barrier(); 1215 } 1216 return 1; 1217 #else 1218 return 0; 1219 #endif /* CONFIG_SMP */ 1220 } 1221 1222 static unsigned short fcstab[256] = { 1223 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 1224 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, 1225 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 1226 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, 1227 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, 1228 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, 1229 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, 1230 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, 1231 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, 1232 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, 1233 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, 1234 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, 1235 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, 1236 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, 1237 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, 1238 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, 1239 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, 1240 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, 1241 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, 1242 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, 1243 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, 1244 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, 1245 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, 1246 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, 1247 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, 1248 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, 1249 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, 1250 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, 1251 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, 1252 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, 1253 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, 1254 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 1255 }; 1256 1257 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) 1258 1259 static void 1260 csum(void) 1261 { 1262 unsigned int i; 1263 unsigned short fcs; 1264 unsigned char v; 1265 1266 if (!scanhex(&adrs)) 1267 return; 1268 if (!scanhex(&ncsum)) 1269 return; 1270 fcs = 0xffff; 1271 for (i = 0; i < ncsum; ++i) { 1272 if (mread(adrs+i, &v, 1) == 0) { 1273 printf("csum stopped at "REG"\n", adrs+i); 1274 break; 1275 } 1276 fcs = FCS(fcs, v); 1277 } 1278 printf("%x\n", fcs); 1279 } 1280 1281 /* 1282 * Check if this is a suitable place to put a breakpoint. 1283 */ 1284 static long check_bp_loc(unsigned long addr) 1285 { 1286 unsigned int instr; 1287 1288 addr &= ~3; 1289 if (!is_kernel_addr(addr)) { 1290 printf("Breakpoints may only be placed at kernel addresses\n"); 1291 return 0; 1292 } 1293 if (!mread(addr, &instr, sizeof(instr))) { 1294 printf("Can't read instruction at address %lx\n", addr); 1295 return 0; 1296 } 1297 if (IS_MTMSRD(instr) || IS_RFID(instr)) { 1298 printf("Breakpoints may not be placed on mtmsrd or rfid " 1299 "instructions\n"); 1300 return 0; 1301 } 1302 return 1; 1303 } 1304 1305 static char *breakpoint_help_string = 1306 "Breakpoint command usage:\n" 1307 "b show breakpoints\n" 1308 "b <addr> [cnt] set breakpoint at given instr addr\n" 1309 "bc clear all breakpoints\n" 1310 "bc <n/addr> clear breakpoint number n or at addr\n" 1311 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n" 1312 "bd <addr> [cnt] set hardware data breakpoint\n" 1313 ""; 1314 1315 static void 1316 bpt_cmds(void) 1317 { 1318 int cmd; 1319 unsigned long a; 1320 int i; 1321 struct bpt *bp; 1322 1323 cmd = inchar(); 1324 switch (cmd) { 1325 #ifndef CONFIG_PPC_8xx 1326 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n"; 1327 int mode; 1328 case 'd': /* bd - hardware data breakpoint */ 1329 if (!ppc_breakpoint_available()) { 1330 printf("Hardware data breakpoint not supported on this cpu\n"); 1331 break; 1332 } 1333 mode = 7; 1334 cmd = inchar(); 1335 if (cmd == 'r') 1336 mode = 5; 1337 else if (cmd == 'w') 1338 mode = 6; 1339 else 1340 termch = cmd; 1341 dabr.address = 0; 1342 dabr.enabled = 0; 1343 if (scanhex(&dabr.address)) { 1344 if (!is_kernel_addr(dabr.address)) { 1345 printf(badaddr); 1346 break; 1347 } 1348 dabr.address &= ~HW_BRK_TYPE_DABR; 1349 dabr.enabled = mode | BP_DABR; 1350 } 1351 1352 force_enable_xmon(); 1353 break; 1354 1355 case 'i': /* bi - hardware instr breakpoint */ 1356 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) { 1357 printf("Hardware instruction breakpoint " 1358 "not supported on this cpu\n"); 1359 break; 1360 } 1361 if (iabr) { 1362 iabr->enabled &= ~BP_CIABR; 1363 iabr = NULL; 1364 } 1365 if (!scanhex(&a)) 1366 break; 1367 if (!check_bp_loc(a)) 1368 break; 1369 bp = new_breakpoint(a); 1370 if (bp != NULL) { 1371 bp->enabled |= BP_CIABR; 1372 iabr = bp; 1373 force_enable_xmon(); 1374 } 1375 break; 1376 #endif 1377 1378 case 'c': 1379 if (!scanhex(&a)) { 1380 /* clear all breakpoints */ 1381 for (i = 0; i < NBPTS; ++i) 1382 bpts[i].enabled = 0; 1383 iabr = NULL; 1384 dabr.enabled = 0; 1385 printf("All breakpoints cleared\n"); 1386 break; 1387 } 1388 1389 if (a <= NBPTS && a >= 1) { 1390 /* assume a breakpoint number */ 1391 bp = &bpts[a-1]; /* bp nums are 1 based */ 1392 } else { 1393 /* assume a breakpoint address */ 1394 bp = at_breakpoint(a); 1395 if (bp == NULL) { 1396 printf("No breakpoint at %lx\n", a); 1397 break; 1398 } 1399 } 1400 1401 printf("Cleared breakpoint %tx (", BP_NUM(bp)); 1402 xmon_print_symbol(bp->address, " ", ")\n"); 1403 bp->enabled = 0; 1404 break; 1405 1406 default: 1407 termch = cmd; 1408 cmd = skipbl(); 1409 if (cmd == '?') { 1410 printf(breakpoint_help_string); 1411 break; 1412 } 1413 termch = cmd; 1414 if (!scanhex(&a)) { 1415 /* print all breakpoints */ 1416 printf(" type address\n"); 1417 if (dabr.enabled) { 1418 printf(" data "REG" [", dabr.address); 1419 if (dabr.enabled & 1) 1420 printf("r"); 1421 if (dabr.enabled & 2) 1422 printf("w"); 1423 printf("]\n"); 1424 } 1425 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) { 1426 if (!bp->enabled) 1427 continue; 1428 printf("%tx %s ", BP_NUM(bp), 1429 (bp->enabled & BP_CIABR) ? "inst": "trap"); 1430 xmon_print_symbol(bp->address, " ", "\n"); 1431 } 1432 break; 1433 } 1434 1435 if (!check_bp_loc(a)) 1436 break; 1437 bp = new_breakpoint(a); 1438 if (bp != NULL) { 1439 bp->enabled |= BP_TRAP; 1440 force_enable_xmon(); 1441 } 1442 break; 1443 } 1444 } 1445 1446 /* Very cheap human name for vector lookup. */ 1447 static 1448 const char *getvecname(unsigned long vec) 1449 { 1450 char *ret; 1451 1452 switch (vec) { 1453 case 0x100: ret = "(System Reset)"; break; 1454 case 0x200: ret = "(Machine Check)"; break; 1455 case 0x300: ret = "(Data Access)"; break; 1456 case 0x380: 1457 if (radix_enabled()) 1458 ret = "(Data Access Out of Range)"; 1459 else 1460 ret = "(Data SLB Access)"; 1461 break; 1462 case 0x400: ret = "(Instruction Access)"; break; 1463 case 0x480: 1464 if (radix_enabled()) 1465 ret = "(Instruction Access Out of Range)"; 1466 else 1467 ret = "(Instruction SLB Access)"; 1468 break; 1469 case 0x500: ret = "(Hardware Interrupt)"; break; 1470 case 0x600: ret = "(Alignment)"; break; 1471 case 0x700: ret = "(Program Check)"; break; 1472 case 0x800: ret = "(FPU Unavailable)"; break; 1473 case 0x900: ret = "(Decrementer)"; break; 1474 case 0x980: ret = "(Hypervisor Decrementer)"; break; 1475 case 0xa00: ret = "(Doorbell)"; break; 1476 case 0xc00: ret = "(System Call)"; break; 1477 case 0xd00: ret = "(Single Step)"; break; 1478 case 0xe40: ret = "(Emulation Assist)"; break; 1479 case 0xe60: ret = "(HMI)"; break; 1480 case 0xe80: ret = "(Hypervisor Doorbell)"; break; 1481 case 0xf00: ret = "(Performance Monitor)"; break; 1482 case 0xf20: ret = "(Altivec Unavailable)"; break; 1483 case 0x1300: ret = "(Instruction Breakpoint)"; break; 1484 case 0x1500: ret = "(Denormalisation)"; break; 1485 case 0x1700: ret = "(Altivec Assist)"; break; 1486 default: ret = ""; 1487 } 1488 return ret; 1489 } 1490 1491 static void get_function_bounds(unsigned long pc, unsigned long *startp, 1492 unsigned long *endp) 1493 { 1494 unsigned long size, offset; 1495 const char *name; 1496 1497 *startp = *endp = 0; 1498 if (pc == 0) 1499 return; 1500 if (setjmp(bus_error_jmp) == 0) { 1501 catch_memory_errors = 1; 1502 sync(); 1503 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr); 1504 if (name != NULL) { 1505 *startp = pc - offset; 1506 *endp = pc - offset + size; 1507 } 1508 sync(); 1509 } 1510 catch_memory_errors = 0; 1511 } 1512 1513 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long)) 1514 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long)) 1515 1516 static void xmon_show_stack(unsigned long sp, unsigned long lr, 1517 unsigned long pc) 1518 { 1519 int max_to_print = 64; 1520 unsigned long ip; 1521 unsigned long newsp; 1522 unsigned long marker; 1523 struct pt_regs regs; 1524 1525 while (max_to_print--) { 1526 if (!is_kernel_addr(sp)) { 1527 if (sp != 0) 1528 printf("SP (%lx) is in userspace\n", sp); 1529 break; 1530 } 1531 1532 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long)) 1533 || !mread(sp, &newsp, sizeof(unsigned long))) { 1534 printf("Couldn't read stack frame at %lx\n", sp); 1535 break; 1536 } 1537 1538 /* 1539 * For the first stack frame, try to work out if 1540 * LR and/or the saved LR value in the bottommost 1541 * stack frame are valid. 1542 */ 1543 if ((pc | lr) != 0) { 1544 unsigned long fnstart, fnend; 1545 unsigned long nextip; 1546 int printip = 1; 1547 1548 get_function_bounds(pc, &fnstart, &fnend); 1549 nextip = 0; 1550 if (newsp > sp) 1551 mread(newsp + LRSAVE_OFFSET, &nextip, 1552 sizeof(unsigned long)); 1553 if (lr == ip) { 1554 if (!is_kernel_addr(lr) 1555 || (fnstart <= lr && lr < fnend)) 1556 printip = 0; 1557 } else if (lr == nextip) { 1558 printip = 0; 1559 } else if (is_kernel_addr(lr) 1560 && !(fnstart <= lr && lr < fnend)) { 1561 printf("[link register ] "); 1562 xmon_print_symbol(lr, " ", "\n"); 1563 } 1564 if (printip) { 1565 printf("["REG"] ", sp); 1566 xmon_print_symbol(ip, " ", " (unreliable)\n"); 1567 } 1568 pc = lr = 0; 1569 1570 } else { 1571 printf("["REG"] ", sp); 1572 xmon_print_symbol(ip, " ", "\n"); 1573 } 1574 1575 /* Look for "regshere" marker to see if this is 1576 an exception frame. */ 1577 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long)) 1578 && marker == STACK_FRAME_REGS_MARKER) { 1579 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs)) 1580 != sizeof(regs)) { 1581 printf("Couldn't read registers at %lx\n", 1582 sp + STACK_FRAME_OVERHEAD); 1583 break; 1584 } 1585 printf("--- Exception: %lx %s at ", regs.trap, 1586 getvecname(TRAP(®s))); 1587 pc = regs.nip; 1588 lr = regs.link; 1589 xmon_print_symbol(pc, " ", "\n"); 1590 } 1591 1592 if (newsp == 0) 1593 break; 1594 1595 sp = newsp; 1596 } 1597 } 1598 1599 static void backtrace(struct pt_regs *excp) 1600 { 1601 unsigned long sp; 1602 1603 if (scanhex(&sp)) 1604 xmon_show_stack(sp, 0, 0); 1605 else 1606 xmon_show_stack(excp->gpr[1], excp->link, excp->nip); 1607 scannl(); 1608 } 1609 1610 static void print_bug_trap(struct pt_regs *regs) 1611 { 1612 #ifdef CONFIG_BUG 1613 const struct bug_entry *bug; 1614 unsigned long addr; 1615 1616 if (regs->msr & MSR_PR) 1617 return; /* not in kernel */ 1618 addr = regs->nip; /* address of trap instruction */ 1619 if (!is_kernel_addr(addr)) 1620 return; 1621 bug = find_bug(regs->nip); 1622 if (bug == NULL) 1623 return; 1624 if (is_warning_bug(bug)) 1625 return; 1626 1627 #ifdef CONFIG_DEBUG_BUGVERBOSE 1628 printf("kernel BUG at %s:%u!\n", 1629 bug->file, bug->line); 1630 #else 1631 printf("kernel BUG at %px!\n", (void *)bug->bug_addr); 1632 #endif 1633 #endif /* CONFIG_BUG */ 1634 } 1635 1636 static void excprint(struct pt_regs *fp) 1637 { 1638 unsigned long trap; 1639 1640 #ifdef CONFIG_SMP 1641 printf("cpu 0x%x: ", smp_processor_id()); 1642 #endif /* CONFIG_SMP */ 1643 1644 trap = TRAP(fp); 1645 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp); 1646 printf(" pc: "); 1647 xmon_print_symbol(fp->nip, ": ", "\n"); 1648 1649 printf(" lr: "); 1650 xmon_print_symbol(fp->link, ": ", "\n"); 1651 1652 printf(" sp: %lx\n", fp->gpr[1]); 1653 printf(" msr: %lx\n", fp->msr); 1654 1655 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) { 1656 printf(" dar: %lx\n", fp->dar); 1657 if (trap != 0x380) 1658 printf(" dsisr: %lx\n", fp->dsisr); 1659 } 1660 1661 printf(" current = 0x%px\n", current); 1662 #ifdef CONFIG_PPC64 1663 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n", 1664 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened); 1665 #endif 1666 if (current) { 1667 printf(" pid = %d, comm = %s\n", 1668 current->pid, current->comm); 1669 } 1670 1671 if (trap == 0x700) 1672 print_bug_trap(fp); 1673 1674 printf(linux_banner); 1675 } 1676 1677 static void prregs(struct pt_regs *fp) 1678 { 1679 int n, trap; 1680 unsigned long base; 1681 struct pt_regs regs; 1682 1683 if (scanhex(&base)) { 1684 if (setjmp(bus_error_jmp) == 0) { 1685 catch_memory_errors = 1; 1686 sync(); 1687 regs = *(struct pt_regs *)base; 1688 sync(); 1689 __delay(200); 1690 } else { 1691 catch_memory_errors = 0; 1692 printf("*** Error reading registers from "REG"\n", 1693 base); 1694 return; 1695 } 1696 catch_memory_errors = 0; 1697 fp = ®s; 1698 } 1699 1700 #ifdef CONFIG_PPC64 1701 if (FULL_REGS(fp)) { 1702 for (n = 0; n < 16; ++n) 1703 printf("R%.2d = "REG" R%.2d = "REG"\n", 1704 n, fp->gpr[n], n+16, fp->gpr[n+16]); 1705 } else { 1706 for (n = 0; n < 7; ++n) 1707 printf("R%.2d = "REG" R%.2d = "REG"\n", 1708 n, fp->gpr[n], n+7, fp->gpr[n+7]); 1709 } 1710 #else 1711 for (n = 0; n < 32; ++n) { 1712 printf("R%.2d = %.8lx%s", n, fp->gpr[n], 1713 (n & 3) == 3? "\n": " "); 1714 if (n == 12 && !FULL_REGS(fp)) { 1715 printf("\n"); 1716 break; 1717 } 1718 } 1719 #endif 1720 printf("pc = "); 1721 xmon_print_symbol(fp->nip, " ", "\n"); 1722 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) { 1723 printf("cfar= "); 1724 xmon_print_symbol(fp->orig_gpr3, " ", "\n"); 1725 } 1726 printf("lr = "); 1727 xmon_print_symbol(fp->link, " ", "\n"); 1728 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr); 1729 printf("ctr = "REG" xer = "REG" trap = %4lx\n", 1730 fp->ctr, fp->xer, fp->trap); 1731 trap = TRAP(fp); 1732 if (trap == 0x300 || trap == 0x380 || trap == 0x600) 1733 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); 1734 } 1735 1736 static void cacheflush(void) 1737 { 1738 int cmd; 1739 unsigned long nflush; 1740 1741 cmd = inchar(); 1742 if (cmd != 'i') 1743 termch = cmd; 1744 scanhex((void *)&adrs); 1745 if (termch != '\n') 1746 termch = 0; 1747 nflush = 1; 1748 scanhex(&nflush); 1749 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES; 1750 if (setjmp(bus_error_jmp) == 0) { 1751 catch_memory_errors = 1; 1752 sync(); 1753 1754 if (cmd != 'i') { 1755 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1756 cflush((void *) adrs); 1757 } else { 1758 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES) 1759 cinval((void *) adrs); 1760 } 1761 sync(); 1762 /* wait a little while to see if we get a machine check */ 1763 __delay(200); 1764 } 1765 catch_memory_errors = 0; 1766 } 1767 1768 extern unsigned long xmon_mfspr(int spr, unsigned long default_value); 1769 extern void xmon_mtspr(int spr, unsigned long value); 1770 1771 static int 1772 read_spr(int n, unsigned long *vp) 1773 { 1774 unsigned long ret = -1UL; 1775 int ok = 0; 1776 1777 if (setjmp(bus_error_jmp) == 0) { 1778 catch_spr_faults = 1; 1779 sync(); 1780 1781 ret = xmon_mfspr(n, *vp); 1782 1783 sync(); 1784 *vp = ret; 1785 ok = 1; 1786 } 1787 catch_spr_faults = 0; 1788 1789 return ok; 1790 } 1791 1792 static void 1793 write_spr(int n, unsigned long val) 1794 { 1795 if (xmon_is_ro) { 1796 printf(xmon_ro_msg); 1797 return; 1798 } 1799 1800 if (setjmp(bus_error_jmp) == 0) { 1801 catch_spr_faults = 1; 1802 sync(); 1803 1804 xmon_mtspr(n, val); 1805 1806 sync(); 1807 } else { 1808 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n); 1809 } 1810 catch_spr_faults = 0; 1811 } 1812 1813 static void dump_206_sprs(void) 1814 { 1815 #ifdef CONFIG_PPC64 1816 if (!cpu_has_feature(CPU_FTR_ARCH_206)) 1817 return; 1818 1819 /* Actually some of these pre-date 2.06, but whatevs */ 1820 1821 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n", 1822 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR)); 1823 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n", 1824 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR)); 1825 printf("amr = %.16lx uamor = %.16lx\n", 1826 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR)); 1827 1828 if (!(mfmsr() & MSR_HV)) 1829 return; 1830 1831 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n", 1832 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR)); 1833 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n", 1834 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC)); 1835 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n", 1836 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID)); 1837 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n", 1838 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR)); 1839 printf("dabr = %.16lx dabrx = %.16lx\n", 1840 mfspr(SPRN_DABR), mfspr(SPRN_DABRX)); 1841 #endif 1842 } 1843 1844 static void dump_207_sprs(void) 1845 { 1846 #ifdef CONFIG_PPC64 1847 unsigned long msr; 1848 1849 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1850 return; 1851 1852 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n", 1853 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR)); 1854 1855 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n", 1856 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB)); 1857 1858 msr = mfmsr(); 1859 if (msr & MSR_TM) { 1860 /* Only if TM has been enabled in the kernel */ 1861 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n", 1862 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR), 1863 mfspr(SPRN_TEXASR)); 1864 } 1865 1866 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n", 1867 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2)); 1868 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n", 1869 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), 1870 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4)); 1871 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n", 1872 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5)); 1873 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n", 1874 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6)); 1875 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n", 1876 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR)); 1877 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR)); 1878 1879 if (!(msr & MSR_HV)) 1880 return; 1881 1882 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n", 1883 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR)); 1884 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n", 1885 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR)); 1886 #endif 1887 } 1888 1889 static void dump_300_sprs(void) 1890 { 1891 #ifdef CONFIG_PPC64 1892 bool hv = mfmsr() & MSR_HV; 1893 1894 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 1895 return; 1896 1897 printf("pidr = %.16lx tidr = %.16lx\n", 1898 mfspr(SPRN_PID), mfspr(SPRN_TIDR)); 1899 printf("asdr = %.16lx psscr = %.16lx\n", 1900 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR) 1901 : mfspr(SPRN_PSSCR_PR)); 1902 1903 if (!hv) 1904 return; 1905 1906 printf("ptcr = %.16lx\n", 1907 mfspr(SPRN_PTCR)); 1908 #endif 1909 } 1910 1911 static void dump_one_spr(int spr, bool show_unimplemented) 1912 { 1913 unsigned long val; 1914 1915 val = 0xdeadbeef; 1916 if (!read_spr(spr, &val)) { 1917 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 1918 return; 1919 } 1920 1921 if (val == 0xdeadbeef) { 1922 /* Looks like read was a nop, confirm */ 1923 val = 0x0badcafe; 1924 if (!read_spr(spr, &val)) { 1925 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr); 1926 return; 1927 } 1928 1929 if (val == 0x0badcafe) { 1930 if (show_unimplemented) 1931 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr); 1932 return; 1933 } 1934 } 1935 1936 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val); 1937 } 1938 1939 static void super_regs(void) 1940 { 1941 static unsigned long regno; 1942 int cmd; 1943 int spr; 1944 1945 cmd = skipbl(); 1946 1947 switch (cmd) { 1948 case '\n': { 1949 unsigned long sp, toc; 1950 asm("mr %0,1" : "=r" (sp) :); 1951 asm("mr %0,2" : "=r" (toc) :); 1952 1953 printf("msr = "REG" sprg0 = "REG"\n", 1954 mfmsr(), mfspr(SPRN_SPRG0)); 1955 printf("pvr = "REG" sprg1 = "REG"\n", 1956 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); 1957 printf("dec = "REG" sprg2 = "REG"\n", 1958 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); 1959 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3)); 1960 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR)); 1961 1962 dump_206_sprs(); 1963 dump_207_sprs(); 1964 dump_300_sprs(); 1965 1966 return; 1967 } 1968 case 'w': { 1969 unsigned long val; 1970 scanhex(®no); 1971 val = 0; 1972 read_spr(regno, &val); 1973 scanhex(&val); 1974 write_spr(regno, val); 1975 dump_one_spr(regno, true); 1976 break; 1977 } 1978 case 'r': 1979 scanhex(®no); 1980 dump_one_spr(regno, true); 1981 break; 1982 case 'a': 1983 /* dump ALL SPRs */ 1984 for (spr = 1; spr < 1024; ++spr) 1985 dump_one_spr(spr, false); 1986 break; 1987 } 1988 1989 scannl(); 1990 } 1991 1992 /* 1993 * Stuff for reading and writing memory safely 1994 */ 1995 static int 1996 mread(unsigned long adrs, void *buf, int size) 1997 { 1998 volatile int n; 1999 char *p, *q; 2000 2001 n = 0; 2002 if (setjmp(bus_error_jmp) == 0) { 2003 catch_memory_errors = 1; 2004 sync(); 2005 p = (char *)adrs; 2006 q = (char *)buf; 2007 switch (size) { 2008 case 2: 2009 *(u16 *)q = *(u16 *)p; 2010 break; 2011 case 4: 2012 *(u32 *)q = *(u32 *)p; 2013 break; 2014 case 8: 2015 *(u64 *)q = *(u64 *)p; 2016 break; 2017 default: 2018 for( ; n < size; ++n) { 2019 *q++ = *p++; 2020 sync(); 2021 } 2022 } 2023 sync(); 2024 /* wait a little while to see if we get a machine check */ 2025 __delay(200); 2026 n = size; 2027 } 2028 catch_memory_errors = 0; 2029 return n; 2030 } 2031 2032 static int 2033 mwrite(unsigned long adrs, void *buf, int size) 2034 { 2035 volatile int n; 2036 char *p, *q; 2037 2038 n = 0; 2039 2040 if (xmon_is_ro) { 2041 printf(xmon_ro_msg); 2042 return n; 2043 } 2044 2045 if (setjmp(bus_error_jmp) == 0) { 2046 catch_memory_errors = 1; 2047 sync(); 2048 p = (char *) adrs; 2049 q = (char *) buf; 2050 switch (size) { 2051 case 2: 2052 *(u16 *)p = *(u16 *)q; 2053 break; 2054 case 4: 2055 *(u32 *)p = *(u32 *)q; 2056 break; 2057 case 8: 2058 *(u64 *)p = *(u64 *)q; 2059 break; 2060 default: 2061 for ( ; n < size; ++n) { 2062 *p++ = *q++; 2063 sync(); 2064 } 2065 } 2066 sync(); 2067 /* wait a little while to see if we get a machine check */ 2068 __delay(200); 2069 n = size; 2070 } else { 2071 printf("*** Error writing address "REG"\n", adrs + n); 2072 } 2073 catch_memory_errors = 0; 2074 return n; 2075 } 2076 2077 static int fault_type; 2078 static int fault_except; 2079 static char *fault_chars[] = { "--", "**", "##" }; 2080 2081 static int handle_fault(struct pt_regs *regs) 2082 { 2083 fault_except = TRAP(regs); 2084 switch (TRAP(regs)) { 2085 case 0x200: 2086 fault_type = 0; 2087 break; 2088 case 0x300: 2089 case 0x380: 2090 fault_type = 1; 2091 break; 2092 default: 2093 fault_type = 2; 2094 } 2095 2096 longjmp(bus_error_jmp, 1); 2097 2098 return 0; 2099 } 2100 2101 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) 2102 2103 static void 2104 byterev(unsigned char *val, int size) 2105 { 2106 int t; 2107 2108 switch (size) { 2109 case 2: 2110 SWAP(val[0], val[1], t); 2111 break; 2112 case 4: 2113 SWAP(val[0], val[3], t); 2114 SWAP(val[1], val[2], t); 2115 break; 2116 case 8: /* is there really any use for this? */ 2117 SWAP(val[0], val[7], t); 2118 SWAP(val[1], val[6], t); 2119 SWAP(val[2], val[5], t); 2120 SWAP(val[3], val[4], t); 2121 break; 2122 } 2123 } 2124 2125 static int brev; 2126 static int mnoread; 2127 2128 static char *memex_help_string = 2129 "Memory examine command usage:\n" 2130 "m [addr] [flags] examine/change memory\n" 2131 " addr is optional. will start where left off.\n" 2132 " flags may include chars from this set:\n" 2133 " b modify by bytes (default)\n" 2134 " w modify by words (2 byte)\n" 2135 " l modify by longs (4 byte)\n" 2136 " d modify by doubleword (8 byte)\n" 2137 " r toggle reverse byte order mode\n" 2138 " n do not read memory (for i/o spaces)\n" 2139 " . ok to read (default)\n" 2140 "NOTE: flags are saved as defaults\n" 2141 ""; 2142 2143 static char *memex_subcmd_help_string = 2144 "Memory examine subcommands:\n" 2145 " hexval write this val to current location\n" 2146 " 'string' write chars from string to this location\n" 2147 " ' increment address\n" 2148 " ^ decrement address\n" 2149 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n" 2150 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n" 2151 " ` clear no-read flag\n" 2152 " ; stay at this addr\n" 2153 " v change to byte mode\n" 2154 " w change to word (2 byte) mode\n" 2155 " l change to long (4 byte) mode\n" 2156 " u change to doubleword (8 byte) mode\n" 2157 " m addr change current addr\n" 2158 " n toggle no-read flag\n" 2159 " r toggle byte reverse flag\n" 2160 " < count back up count bytes\n" 2161 " > count skip forward count bytes\n" 2162 " x exit this mode\n" 2163 ""; 2164 2165 static void 2166 memex(void) 2167 { 2168 int cmd, inc, i, nslash; 2169 unsigned long n; 2170 unsigned char val[16]; 2171 2172 scanhex((void *)&adrs); 2173 cmd = skipbl(); 2174 if (cmd == '?') { 2175 printf(memex_help_string); 2176 return; 2177 } else { 2178 termch = cmd; 2179 } 2180 last_cmd = "m\n"; 2181 while ((cmd = skipbl()) != '\n') { 2182 switch( cmd ){ 2183 case 'b': size = 1; break; 2184 case 'w': size = 2; break; 2185 case 'l': size = 4; break; 2186 case 'd': size = 8; break; 2187 case 'r': brev = !brev; break; 2188 case 'n': mnoread = 1; break; 2189 case '.': mnoread = 0; break; 2190 } 2191 } 2192 if( size <= 0 ) 2193 size = 1; 2194 else if( size > 8 ) 2195 size = 8; 2196 for(;;){ 2197 if (!mnoread) 2198 n = mread(adrs, val, size); 2199 printf(REG"%c", adrs, brev? 'r': ' '); 2200 if (!mnoread) { 2201 if (brev) 2202 byterev(val, size); 2203 putchar(' '); 2204 for (i = 0; i < n; ++i) 2205 printf("%.2x", val[i]); 2206 for (; i < size; ++i) 2207 printf("%s", fault_chars[fault_type]); 2208 } 2209 putchar(' '); 2210 inc = size; 2211 nslash = 0; 2212 for(;;){ 2213 if( scanhex(&n) ){ 2214 for (i = 0; i < size; ++i) 2215 val[i] = n >> (i * 8); 2216 if (!brev) 2217 byterev(val, size); 2218 mwrite(adrs, val, size); 2219 inc = size; 2220 } 2221 cmd = skipbl(); 2222 if (cmd == '\n') 2223 break; 2224 inc = 0; 2225 switch (cmd) { 2226 case '\'': 2227 for(;;){ 2228 n = inchar(); 2229 if( n == '\\' ) 2230 n = bsesc(); 2231 else if( n == '\'' ) 2232 break; 2233 for (i = 0; i < size; ++i) 2234 val[i] = n >> (i * 8); 2235 if (!brev) 2236 byterev(val, size); 2237 mwrite(adrs, val, size); 2238 adrs += size; 2239 } 2240 adrs -= size; 2241 inc = size; 2242 break; 2243 case ',': 2244 adrs += size; 2245 break; 2246 case '.': 2247 mnoread = 0; 2248 break; 2249 case ';': 2250 break; 2251 case 'x': 2252 case EOF: 2253 scannl(); 2254 return; 2255 case 'b': 2256 case 'v': 2257 size = 1; 2258 break; 2259 case 'w': 2260 size = 2; 2261 break; 2262 case 'l': 2263 size = 4; 2264 break; 2265 case 'u': 2266 size = 8; 2267 break; 2268 case '^': 2269 adrs -= size; 2270 break; 2271 case '/': 2272 if (nslash > 0) 2273 adrs -= 1 << nslash; 2274 else 2275 nslash = 0; 2276 nslash += 4; 2277 adrs += 1 << nslash; 2278 break; 2279 case '\\': 2280 if (nslash < 0) 2281 adrs += 1 << -nslash; 2282 else 2283 nslash = 0; 2284 nslash -= 4; 2285 adrs -= 1 << -nslash; 2286 break; 2287 case 'm': 2288 scanhex((void *)&adrs); 2289 break; 2290 case 'n': 2291 mnoread = 1; 2292 break; 2293 case 'r': 2294 brev = !brev; 2295 break; 2296 case '<': 2297 n = size; 2298 scanhex(&n); 2299 adrs -= n; 2300 break; 2301 case '>': 2302 n = size; 2303 scanhex(&n); 2304 adrs += n; 2305 break; 2306 case '?': 2307 printf(memex_subcmd_help_string); 2308 break; 2309 } 2310 } 2311 adrs += inc; 2312 } 2313 } 2314 2315 static int 2316 bsesc(void) 2317 { 2318 int c; 2319 2320 c = inchar(); 2321 switch( c ){ 2322 case 'n': c = '\n'; break; 2323 case 'r': c = '\r'; break; 2324 case 'b': c = '\b'; break; 2325 case 't': c = '\t'; break; 2326 } 2327 return c; 2328 } 2329 2330 static void xmon_rawdump (unsigned long adrs, long ndump) 2331 { 2332 long n, m, r, nr; 2333 unsigned char temp[16]; 2334 2335 for (n = ndump; n > 0;) { 2336 r = n < 16? n: 16; 2337 nr = mread(adrs, temp, r); 2338 adrs += nr; 2339 for (m = 0; m < r; ++m) { 2340 if (m < nr) 2341 printf("%.2x", temp[m]); 2342 else 2343 printf("%s", fault_chars[fault_type]); 2344 } 2345 n -= r; 2346 if (nr < r) 2347 break; 2348 } 2349 printf("\n"); 2350 } 2351 2352 static void dump_tracing(void) 2353 { 2354 int c; 2355 2356 c = inchar(); 2357 if (c == 'c') 2358 ftrace_dump(DUMP_ORIG); 2359 else 2360 ftrace_dump(DUMP_ALL); 2361 } 2362 2363 #ifdef CONFIG_PPC64 2364 static void dump_one_paca(int cpu) 2365 { 2366 struct paca_struct *p; 2367 #ifdef CONFIG_PPC_BOOK3S_64 2368 int i = 0; 2369 #endif 2370 2371 if (setjmp(bus_error_jmp) != 0) { 2372 printf("*** Error dumping paca for cpu 0x%x!\n", cpu); 2373 return; 2374 } 2375 2376 catch_memory_errors = 1; 2377 sync(); 2378 2379 p = paca_ptrs[cpu]; 2380 2381 printf("paca for cpu 0x%x @ %px:\n", cpu, p); 2382 2383 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no"); 2384 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no"); 2385 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no"); 2386 2387 #define DUMP(paca, name, format) \ 2388 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \ 2389 offsetof(struct paca_struct, name)); 2390 2391 DUMP(p, lock_token, "%#-*x"); 2392 DUMP(p, paca_index, "%#-*x"); 2393 DUMP(p, kernel_toc, "%#-*llx"); 2394 DUMP(p, kernelbase, "%#-*llx"); 2395 DUMP(p, kernel_msr, "%#-*llx"); 2396 DUMP(p, emergency_sp, "%-*px"); 2397 #ifdef CONFIG_PPC_BOOK3S_64 2398 DUMP(p, nmi_emergency_sp, "%-*px"); 2399 DUMP(p, mc_emergency_sp, "%-*px"); 2400 DUMP(p, in_nmi, "%#-*x"); 2401 DUMP(p, in_mce, "%#-*x"); 2402 DUMP(p, hmi_event_available, "%#-*x"); 2403 #endif 2404 DUMP(p, data_offset, "%#-*llx"); 2405 DUMP(p, hw_cpu_id, "%#-*x"); 2406 DUMP(p, cpu_start, "%#-*x"); 2407 DUMP(p, kexec_state, "%#-*x"); 2408 #ifdef CONFIG_PPC_BOOK3S_64 2409 if (!early_radix_enabled()) { 2410 for (i = 0; i < SLB_NUM_BOLTED; i++) { 2411 u64 esid, vsid; 2412 2413 if (!p->slb_shadow_ptr) 2414 continue; 2415 2416 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid); 2417 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid); 2418 2419 if (esid || vsid) { 2420 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n", 2421 22, "slb_shadow", i, esid, vsid); 2422 } 2423 } 2424 DUMP(p, vmalloc_sllp, "%#-*x"); 2425 DUMP(p, stab_rr, "%#-*x"); 2426 DUMP(p, slb_used_bitmap, "%#-*x"); 2427 DUMP(p, slb_kern_bitmap, "%#-*x"); 2428 2429 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2430 DUMP(p, slb_cache_ptr, "%#-*x"); 2431 for (i = 0; i < SLB_CACHE_ENTRIES; i++) 2432 printf(" %-*s[%d] = 0x%016x\n", 2433 22, "slb_cache", i, p->slb_cache[i]); 2434 } 2435 } 2436 2437 DUMP(p, rfi_flush_fallback_area, "%-*px"); 2438 #endif 2439 DUMP(p, dscr_default, "%#-*llx"); 2440 #ifdef CONFIG_PPC_BOOK3E 2441 DUMP(p, pgd, "%-*px"); 2442 DUMP(p, kernel_pgd, "%-*px"); 2443 DUMP(p, tcd_ptr, "%-*px"); 2444 DUMP(p, mc_kstack, "%-*px"); 2445 DUMP(p, crit_kstack, "%-*px"); 2446 DUMP(p, dbg_kstack, "%-*px"); 2447 #endif 2448 DUMP(p, __current, "%-*px"); 2449 DUMP(p, kstack, "%#-*llx"); 2450 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1)); 2451 #ifdef CONFIG_STACKPROTECTOR 2452 DUMP(p, canary, "%#-*lx"); 2453 #endif 2454 DUMP(p, saved_r1, "%#-*llx"); 2455 DUMP(p, trap_save, "%#-*x"); 2456 DUMP(p, irq_soft_mask, "%#-*x"); 2457 DUMP(p, irq_happened, "%#-*x"); 2458 #ifdef CONFIG_MMIOWB 2459 DUMP(p, mmiowb_state.nesting_count, "%#-*x"); 2460 DUMP(p, mmiowb_state.mmiowb_pending, "%#-*x"); 2461 #endif 2462 DUMP(p, irq_work_pending, "%#-*x"); 2463 DUMP(p, sprg_vdso, "%#-*llx"); 2464 2465 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2466 DUMP(p, tm_scratch, "%#-*llx"); 2467 #endif 2468 2469 #ifdef CONFIG_PPC_POWERNV 2470 DUMP(p, idle_state, "%#-*lx"); 2471 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 2472 DUMP(p, thread_idle_state, "%#-*x"); 2473 DUMP(p, subcore_sibling_mask, "%#-*x"); 2474 } else { 2475 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 2476 DUMP(p, requested_psscr, "%#-*llx"); 2477 DUMP(p, dont_stop.counter, "%#-*x"); 2478 #endif 2479 } 2480 #endif 2481 2482 DUMP(p, accounting.utime, "%#-*lx"); 2483 DUMP(p, accounting.stime, "%#-*lx"); 2484 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2485 DUMP(p, accounting.utime_scaled, "%#-*lx"); 2486 #endif 2487 DUMP(p, accounting.starttime, "%#-*lx"); 2488 DUMP(p, accounting.starttime_user, "%#-*lx"); 2489 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME 2490 DUMP(p, accounting.startspurr, "%#-*lx"); 2491 DUMP(p, accounting.utime_sspurr, "%#-*lx"); 2492 #endif 2493 DUMP(p, accounting.steal_time, "%#-*lx"); 2494 #undef DUMP 2495 2496 catch_memory_errors = 0; 2497 sync(); 2498 } 2499 2500 static void dump_all_pacas(void) 2501 { 2502 int cpu; 2503 2504 if (num_possible_cpus() == 0) { 2505 printf("No possible cpus, use 'dp #' to dump individual cpus\n"); 2506 return; 2507 } 2508 2509 for_each_possible_cpu(cpu) 2510 dump_one_paca(cpu); 2511 } 2512 2513 static void dump_pacas(void) 2514 { 2515 unsigned long num; 2516 int c; 2517 2518 c = inchar(); 2519 if (c == 'a') { 2520 dump_all_pacas(); 2521 return; 2522 } 2523 2524 termch = c; /* Put c back, it wasn't 'a' */ 2525 2526 if (scanhex(&num)) 2527 dump_one_paca(num); 2528 else 2529 dump_one_paca(xmon_owner); 2530 } 2531 #endif 2532 2533 #ifdef CONFIG_PPC_POWERNV 2534 static void dump_one_xive(int cpu) 2535 { 2536 unsigned int hwid = get_hard_smp_processor_id(cpu); 2537 2538 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid); 2539 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid); 2540 opal_xive_dump(XIVE_DUMP_TM_OS, hwid); 2541 opal_xive_dump(XIVE_DUMP_TM_USER, hwid); 2542 opal_xive_dump(XIVE_DUMP_VP, hwid); 2543 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid); 2544 2545 if (setjmp(bus_error_jmp) != 0) { 2546 catch_memory_errors = 0; 2547 printf("*** Error dumping xive on cpu %d\n", cpu); 2548 return; 2549 } 2550 2551 catch_memory_errors = 1; 2552 sync(); 2553 xmon_xive_do_dump(cpu); 2554 sync(); 2555 __delay(200); 2556 catch_memory_errors = 0; 2557 } 2558 2559 static void dump_all_xives(void) 2560 { 2561 int cpu; 2562 2563 if (num_possible_cpus() == 0) { 2564 printf("No possible cpus, use 'dx #' to dump individual cpus\n"); 2565 return; 2566 } 2567 2568 for_each_possible_cpu(cpu) 2569 dump_one_xive(cpu); 2570 } 2571 2572 static void dump_one_xive_irq(u32 num) 2573 { 2574 s64 rc; 2575 __be64 vp; 2576 u8 prio; 2577 __be32 lirq; 2578 2579 rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq); 2580 xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n", 2581 num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc); 2582 } 2583 2584 static void dump_xives(void) 2585 { 2586 unsigned long num; 2587 int c; 2588 2589 if (!xive_enabled()) { 2590 printf("Xive disabled on this system\n"); 2591 return; 2592 } 2593 2594 c = inchar(); 2595 if (c == 'a') { 2596 dump_all_xives(); 2597 return; 2598 } else if (c == 'i') { 2599 if (scanhex(&num)) 2600 dump_one_xive_irq(num); 2601 return; 2602 } 2603 2604 termch = c; /* Put c back, it wasn't 'a' */ 2605 2606 if (scanhex(&num)) 2607 dump_one_xive(num); 2608 else 2609 dump_one_xive(xmon_owner); 2610 } 2611 #endif /* CONFIG_PPC_POWERNV */ 2612 2613 static void dump_by_size(unsigned long addr, long count, int size) 2614 { 2615 unsigned char temp[16]; 2616 int i, j; 2617 u64 val; 2618 2619 count = ALIGN(count, 16); 2620 2621 for (i = 0; i < count; i += 16, addr += 16) { 2622 printf(REG, addr); 2623 2624 if (mread(addr, temp, 16) != 16) { 2625 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr); 2626 return; 2627 } 2628 2629 for (j = 0; j < 16; j += size) { 2630 putchar(' '); 2631 switch (size) { 2632 case 1: val = temp[j]; break; 2633 case 2: val = *(u16 *)&temp[j]; break; 2634 case 4: val = *(u32 *)&temp[j]; break; 2635 case 8: val = *(u64 *)&temp[j]; break; 2636 default: val = 0; 2637 } 2638 2639 printf("%0*llx", size * 2, val); 2640 } 2641 printf("\n"); 2642 } 2643 } 2644 2645 static void 2646 dump(void) 2647 { 2648 static char last[] = { "d?\n" }; 2649 int c; 2650 2651 c = inchar(); 2652 2653 #ifdef CONFIG_PPC64 2654 if (c == 'p') { 2655 xmon_start_pagination(); 2656 dump_pacas(); 2657 xmon_end_pagination(); 2658 return; 2659 } 2660 #endif 2661 #ifdef CONFIG_PPC_POWERNV 2662 if (c == 'x') { 2663 xmon_start_pagination(); 2664 dump_xives(); 2665 xmon_end_pagination(); 2666 return; 2667 } 2668 #endif 2669 2670 if (c == 't') { 2671 dump_tracing(); 2672 return; 2673 } 2674 2675 if (c == '\n') 2676 termch = c; 2677 2678 scanhex((void *)&adrs); 2679 if (termch != '\n') 2680 termch = 0; 2681 if (c == 'i') { 2682 scanhex(&nidump); 2683 if (nidump == 0) 2684 nidump = 16; 2685 else if (nidump > MAX_DUMP) 2686 nidump = MAX_DUMP; 2687 adrs += ppc_inst_dump(adrs, nidump, 1); 2688 last_cmd = "di\n"; 2689 } else if (c == 'l') { 2690 dump_log_buf(); 2691 } else if (c == 'o') { 2692 dump_opal_msglog(); 2693 } else if (c == 'v') { 2694 /* dump virtual to physical translation */ 2695 show_pte(adrs); 2696 } else if (c == 'r') { 2697 scanhex(&ndump); 2698 if (ndump == 0) 2699 ndump = 64; 2700 xmon_rawdump(adrs, ndump); 2701 adrs += ndump; 2702 last_cmd = "dr\n"; 2703 } else { 2704 scanhex(&ndump); 2705 if (ndump == 0) 2706 ndump = 64; 2707 else if (ndump > MAX_DUMP) 2708 ndump = MAX_DUMP; 2709 2710 switch (c) { 2711 case '8': 2712 case '4': 2713 case '2': 2714 case '1': 2715 ndump = ALIGN(ndump, 16); 2716 dump_by_size(adrs, ndump, c - '0'); 2717 last[1] = c; 2718 last_cmd = last; 2719 break; 2720 default: 2721 prdump(adrs, ndump); 2722 last_cmd = "d\n"; 2723 } 2724 2725 adrs += ndump; 2726 } 2727 } 2728 2729 static void 2730 prdump(unsigned long adrs, long ndump) 2731 { 2732 long n, m, c, r, nr; 2733 unsigned char temp[16]; 2734 2735 for (n = ndump; n > 0;) { 2736 printf(REG, adrs); 2737 putchar(' '); 2738 r = n < 16? n: 16; 2739 nr = mread(adrs, temp, r); 2740 adrs += nr; 2741 for (m = 0; m < r; ++m) { 2742 if ((m & (sizeof(long) - 1)) == 0 && m > 0) 2743 putchar(' '); 2744 if (m < nr) 2745 printf("%.2x", temp[m]); 2746 else 2747 printf("%s", fault_chars[fault_type]); 2748 } 2749 for (; m < 16; ++m) { 2750 if ((m & (sizeof(long) - 1)) == 0) 2751 putchar(' '); 2752 printf(" "); 2753 } 2754 printf(" |"); 2755 for (m = 0; m < r; ++m) { 2756 if (m < nr) { 2757 c = temp[m]; 2758 putchar(' ' <= c && c <= '~'? c: '.'); 2759 } else 2760 putchar(' '); 2761 } 2762 n -= r; 2763 for (; m < 16; ++m) 2764 putchar(' '); 2765 printf("|\n"); 2766 if (nr < r) 2767 break; 2768 } 2769 } 2770 2771 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); 2772 2773 static int 2774 generic_inst_dump(unsigned long adr, long count, int praddr, 2775 instruction_dump_func dump_func) 2776 { 2777 int nr, dotted; 2778 unsigned long first_adr; 2779 unsigned int inst, last_inst = 0; 2780 unsigned char val[4]; 2781 2782 dotted = 0; 2783 for (first_adr = adr; count > 0; --count, adr += 4) { 2784 nr = mread(adr, val, 4); 2785 if (nr == 0) { 2786 if (praddr) { 2787 const char *x = fault_chars[fault_type]; 2788 printf(REG" %s%s%s%s\n", adr, x, x, x, x); 2789 } 2790 break; 2791 } 2792 inst = GETWORD(val); 2793 if (adr > first_adr && inst == last_inst) { 2794 if (!dotted) { 2795 printf(" ...\n"); 2796 dotted = 1; 2797 } 2798 continue; 2799 } 2800 dotted = 0; 2801 last_inst = inst; 2802 if (praddr) 2803 printf(REG" %.8x", adr, inst); 2804 printf("\t"); 2805 dump_func(inst, adr); 2806 printf("\n"); 2807 } 2808 return adr - first_adr; 2809 } 2810 2811 static int 2812 ppc_inst_dump(unsigned long adr, long count, int praddr) 2813 { 2814 return generic_inst_dump(adr, count, praddr, print_insn_powerpc); 2815 } 2816 2817 void 2818 print_address(unsigned long addr) 2819 { 2820 xmon_print_symbol(addr, "\t# ", ""); 2821 } 2822 2823 static void 2824 dump_log_buf(void) 2825 { 2826 struct kmsg_dumper dumper = { .active = 1 }; 2827 unsigned char buf[128]; 2828 size_t len; 2829 2830 if (setjmp(bus_error_jmp) != 0) { 2831 printf("Error dumping printk buffer!\n"); 2832 return; 2833 } 2834 2835 catch_memory_errors = 1; 2836 sync(); 2837 2838 kmsg_dump_rewind_nolock(&dumper); 2839 xmon_start_pagination(); 2840 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) { 2841 buf[len] = '\0'; 2842 printf("%s", buf); 2843 } 2844 xmon_end_pagination(); 2845 2846 sync(); 2847 /* wait a little while to see if we get a machine check */ 2848 __delay(200); 2849 catch_memory_errors = 0; 2850 } 2851 2852 #ifdef CONFIG_PPC_POWERNV 2853 static void dump_opal_msglog(void) 2854 { 2855 unsigned char buf[128]; 2856 ssize_t res; 2857 loff_t pos = 0; 2858 2859 if (!firmware_has_feature(FW_FEATURE_OPAL)) { 2860 printf("Machine is not running OPAL firmware.\n"); 2861 return; 2862 } 2863 2864 if (setjmp(bus_error_jmp) != 0) { 2865 printf("Error dumping OPAL msglog!\n"); 2866 return; 2867 } 2868 2869 catch_memory_errors = 1; 2870 sync(); 2871 2872 xmon_start_pagination(); 2873 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) { 2874 if (res < 0) { 2875 printf("Error dumping OPAL msglog! Error: %zd\n", res); 2876 break; 2877 } 2878 buf[res] = '\0'; 2879 printf("%s", buf); 2880 pos += res; 2881 } 2882 xmon_end_pagination(); 2883 2884 sync(); 2885 /* wait a little while to see if we get a machine check */ 2886 __delay(200); 2887 catch_memory_errors = 0; 2888 } 2889 #endif 2890 2891 /* 2892 * Memory operations - move, set, print differences 2893 */ 2894 static unsigned long mdest; /* destination address */ 2895 static unsigned long msrc; /* source address */ 2896 static unsigned long mval; /* byte value to set memory to */ 2897 static unsigned long mcount; /* # bytes to affect */ 2898 static unsigned long mdiffs; /* max # differences to print */ 2899 2900 static void 2901 memops(int cmd) 2902 { 2903 scanhex((void *)&mdest); 2904 if( termch != '\n' ) 2905 termch = 0; 2906 scanhex((void *)(cmd == 's'? &mval: &msrc)); 2907 if( termch != '\n' ) 2908 termch = 0; 2909 scanhex((void *)&mcount); 2910 switch( cmd ){ 2911 case 'm': 2912 if (xmon_is_ro) { 2913 printf(xmon_ro_msg); 2914 break; 2915 } 2916 memmove((void *)mdest, (void *)msrc, mcount); 2917 break; 2918 case 's': 2919 if (xmon_is_ro) { 2920 printf(xmon_ro_msg); 2921 break; 2922 } 2923 memset((void *)mdest, mval, mcount); 2924 break; 2925 case 'd': 2926 if( termch != '\n' ) 2927 termch = 0; 2928 scanhex((void *)&mdiffs); 2929 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs); 2930 break; 2931 } 2932 } 2933 2934 static void 2935 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) 2936 { 2937 unsigned n, prt; 2938 2939 prt = 0; 2940 for( n = nb; n > 0; --n ) 2941 if( *p1++ != *p2++ ) 2942 if( ++prt <= maxpr ) 2943 printf("%px %.2x # %px %.2x\n", p1 - 1, 2944 p1[-1], p2 - 1, p2[-1]); 2945 if( prt > maxpr ) 2946 printf("Total of %d differences\n", prt); 2947 } 2948 2949 static unsigned mend; 2950 static unsigned mask; 2951 2952 static void 2953 memlocate(void) 2954 { 2955 unsigned a, n; 2956 unsigned char val[4]; 2957 2958 last_cmd = "ml"; 2959 scanhex((void *)&mdest); 2960 if (termch != '\n') { 2961 termch = 0; 2962 scanhex((void *)&mend); 2963 if (termch != '\n') { 2964 termch = 0; 2965 scanhex((void *)&mval); 2966 mask = ~0; 2967 if (termch != '\n') termch = 0; 2968 scanhex((void *)&mask); 2969 } 2970 } 2971 n = 0; 2972 for (a = mdest; a < mend; a += 4) { 2973 if (mread(a, val, 4) == 4 2974 && ((GETWORD(val) ^ mval) & mask) == 0) { 2975 printf("%.16x: %.16x\n", a, GETWORD(val)); 2976 if (++n >= 10) 2977 break; 2978 } 2979 } 2980 } 2981 2982 static unsigned long mskip = 0x1000; 2983 static unsigned long mlim = 0xffffffff; 2984 2985 static void 2986 memzcan(void) 2987 { 2988 unsigned char v; 2989 unsigned a; 2990 int ok, ook; 2991 2992 scanhex(&mdest); 2993 if (termch != '\n') termch = 0; 2994 scanhex(&mskip); 2995 if (termch != '\n') termch = 0; 2996 scanhex(&mlim); 2997 ook = 0; 2998 for (a = mdest; a < mlim; a += mskip) { 2999 ok = mread(a, &v, 1); 3000 if (ok && !ook) { 3001 printf("%.8x .. ", a); 3002 } else if (!ok && ook) 3003 printf("%.8lx\n", a - mskip); 3004 ook = ok; 3005 if (a + mskip < a) 3006 break; 3007 } 3008 if (ook) 3009 printf("%.8lx\n", a - mskip); 3010 } 3011 3012 static void show_task(struct task_struct *tsk) 3013 { 3014 char state; 3015 3016 /* 3017 * Cloned from kdb_task_state_char(), which is not entirely 3018 * appropriate for calling from xmon. This could be moved 3019 * to a common, generic, routine used by both. 3020 */ 3021 state = (tsk->state == 0) ? 'R' : 3022 (tsk->state < 0) ? 'U' : 3023 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' : 3024 (tsk->state & TASK_STOPPED) ? 'T' : 3025 (tsk->state & TASK_TRACED) ? 'C' : 3026 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' : 3027 (tsk->exit_state & EXIT_DEAD) ? 'E' : 3028 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?'; 3029 3030 printf("%px %016lx %6d %6d %c %2d %s\n", tsk, 3031 tsk->thread.ksp, 3032 tsk->pid, rcu_dereference(tsk->parent)->pid, 3033 state, task_cpu(tsk), 3034 tsk->comm); 3035 } 3036 3037 #ifdef CONFIG_PPC_BOOK3S_64 3038 static void format_pte(void *ptep, unsigned long pte) 3039 { 3040 pte_t entry = __pte(pte); 3041 3042 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte); 3043 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK); 3044 3045 printf("Flags = %s%s%s%s%s\n", 3046 pte_young(entry) ? "Accessed " : "", 3047 pte_dirty(entry) ? "Dirty " : "", 3048 pte_read(entry) ? "Read " : "", 3049 pte_write(entry) ? "Write " : "", 3050 pte_exec(entry) ? "Exec " : ""); 3051 } 3052 3053 static void show_pte(unsigned long addr) 3054 { 3055 unsigned long tskv = 0; 3056 struct task_struct *tsk = NULL; 3057 struct mm_struct *mm; 3058 pgd_t *pgdp, *pgdir; 3059 pud_t *pudp; 3060 pmd_t *pmdp; 3061 pte_t *ptep; 3062 3063 if (!scanhex(&tskv)) 3064 mm = &init_mm; 3065 else 3066 tsk = (struct task_struct *)tskv; 3067 3068 if (tsk == NULL) 3069 mm = &init_mm; 3070 else 3071 mm = tsk->active_mm; 3072 3073 if (setjmp(bus_error_jmp) != 0) { 3074 catch_memory_errors = 0; 3075 printf("*** Error dumping pte for task %px\n", tsk); 3076 return; 3077 } 3078 3079 catch_memory_errors = 1; 3080 sync(); 3081 3082 if (mm == &init_mm) { 3083 pgdp = pgd_offset_k(addr); 3084 pgdir = pgd_offset_k(0); 3085 } else { 3086 pgdp = pgd_offset(mm, addr); 3087 pgdir = pgd_offset(mm, 0); 3088 } 3089 3090 if (pgd_none(*pgdp)) { 3091 printf("no linux page table for address\n"); 3092 return; 3093 } 3094 3095 printf("pgd @ 0x%px\n", pgdir); 3096 3097 if (pgd_huge(*pgdp)) { 3098 format_pte(pgdp, pgd_val(*pgdp)); 3099 return; 3100 } 3101 printf("pgdp @ 0x%px = 0x%016lx\n", pgdp, pgd_val(*pgdp)); 3102 3103 pudp = pud_offset(pgdp, addr); 3104 3105 if (pud_none(*pudp)) { 3106 printf("No valid PUD\n"); 3107 return; 3108 } 3109 3110 if (pud_huge(*pudp)) { 3111 format_pte(pudp, pud_val(*pudp)); 3112 return; 3113 } 3114 3115 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp)); 3116 3117 pmdp = pmd_offset(pudp, addr); 3118 3119 if (pmd_none(*pmdp)) { 3120 printf("No valid PMD\n"); 3121 return; 3122 } 3123 3124 if (pmd_huge(*pmdp)) { 3125 format_pte(pmdp, pmd_val(*pmdp)); 3126 return; 3127 } 3128 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp)); 3129 3130 ptep = pte_offset_map(pmdp, addr); 3131 if (pte_none(*ptep)) { 3132 printf("no valid PTE\n"); 3133 return; 3134 } 3135 3136 format_pte(ptep, pte_val(*ptep)); 3137 3138 sync(); 3139 __delay(200); 3140 catch_memory_errors = 0; 3141 } 3142 #else 3143 static void show_pte(unsigned long addr) 3144 { 3145 printf("show_pte not yet implemented\n"); 3146 } 3147 #endif /* CONFIG_PPC_BOOK3S_64 */ 3148 3149 static void show_tasks(void) 3150 { 3151 unsigned long tskv; 3152 struct task_struct *tsk = NULL; 3153 3154 printf(" task_struct ->thread.ksp PID PPID S P CMD\n"); 3155 3156 if (scanhex(&tskv)) 3157 tsk = (struct task_struct *)tskv; 3158 3159 if (setjmp(bus_error_jmp) != 0) { 3160 catch_memory_errors = 0; 3161 printf("*** Error dumping task %px\n", tsk); 3162 return; 3163 } 3164 3165 catch_memory_errors = 1; 3166 sync(); 3167 3168 if (tsk) 3169 show_task(tsk); 3170 else 3171 for_each_process(tsk) 3172 show_task(tsk); 3173 3174 sync(); 3175 __delay(200); 3176 catch_memory_errors = 0; 3177 } 3178 3179 static void proccall(void) 3180 { 3181 unsigned long args[8]; 3182 unsigned long ret; 3183 int i; 3184 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long, 3185 unsigned long, unsigned long, unsigned long, 3186 unsigned long, unsigned long, unsigned long); 3187 callfunc_t func; 3188 3189 if (!scanhex(&adrs)) 3190 return; 3191 if (termch != '\n') 3192 termch = 0; 3193 for (i = 0; i < 8; ++i) 3194 args[i] = 0; 3195 for (i = 0; i < 8; ++i) { 3196 if (!scanhex(&args[i]) || termch == '\n') 3197 break; 3198 termch = 0; 3199 } 3200 func = (callfunc_t) adrs; 3201 ret = 0; 3202 if (setjmp(bus_error_jmp) == 0) { 3203 catch_memory_errors = 1; 3204 sync(); 3205 ret = func(args[0], args[1], args[2], args[3], 3206 args[4], args[5], args[6], args[7]); 3207 sync(); 3208 printf("return value is 0x%lx\n", ret); 3209 } else { 3210 printf("*** %x exception occurred\n", fault_except); 3211 } 3212 catch_memory_errors = 0; 3213 } 3214 3215 /* Input scanning routines */ 3216 int 3217 skipbl(void) 3218 { 3219 int c; 3220 3221 if( termch != 0 ){ 3222 c = termch; 3223 termch = 0; 3224 } else 3225 c = inchar(); 3226 while( c == ' ' || c == '\t' ) 3227 c = inchar(); 3228 return c; 3229 } 3230 3231 #define N_PTREGS 44 3232 static const char *regnames[N_PTREGS] = { 3233 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3234 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3235 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3236 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3237 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", 3238 #ifdef CONFIG_PPC64 3239 "softe", 3240 #else 3241 "mq", 3242 #endif 3243 "trap", "dar", "dsisr", "res" 3244 }; 3245 3246 int 3247 scanhex(unsigned long *vp) 3248 { 3249 int c, d; 3250 unsigned long v; 3251 3252 c = skipbl(); 3253 if (c == '%') { 3254 /* parse register name */ 3255 char regname[8]; 3256 int i; 3257 3258 for (i = 0; i < sizeof(regname) - 1; ++i) { 3259 c = inchar(); 3260 if (!isalnum(c)) { 3261 termch = c; 3262 break; 3263 } 3264 regname[i] = c; 3265 } 3266 regname[i] = 0; 3267 i = match_string(regnames, N_PTREGS, regname); 3268 if (i < 0) { 3269 printf("invalid register name '%%%s'\n", regname); 3270 return 0; 3271 } 3272 if (xmon_regs == NULL) { 3273 printf("regs not available\n"); 3274 return 0; 3275 } 3276 *vp = ((unsigned long *)xmon_regs)[i]; 3277 return 1; 3278 } 3279 3280 /* skip leading "0x" if any */ 3281 3282 if (c == '0') { 3283 c = inchar(); 3284 if (c == 'x') { 3285 c = inchar(); 3286 } else { 3287 d = hexdigit(c); 3288 if (d == EOF) { 3289 termch = c; 3290 *vp = 0; 3291 return 1; 3292 } 3293 } 3294 } else if (c == '$') { 3295 int i; 3296 for (i=0; i<63; i++) { 3297 c = inchar(); 3298 if (isspace(c) || c == '\0') { 3299 termch = c; 3300 break; 3301 } 3302 tmpstr[i] = c; 3303 } 3304 tmpstr[i++] = 0; 3305 *vp = 0; 3306 if (setjmp(bus_error_jmp) == 0) { 3307 catch_memory_errors = 1; 3308 sync(); 3309 *vp = kallsyms_lookup_name(tmpstr); 3310 sync(); 3311 } 3312 catch_memory_errors = 0; 3313 if (!(*vp)) { 3314 printf("unknown symbol '%s'\n", tmpstr); 3315 return 0; 3316 } 3317 return 1; 3318 } 3319 3320 d = hexdigit(c); 3321 if (d == EOF) { 3322 termch = c; 3323 return 0; 3324 } 3325 v = 0; 3326 do { 3327 v = (v << 4) + d; 3328 c = inchar(); 3329 d = hexdigit(c); 3330 } while (d != EOF); 3331 termch = c; 3332 *vp = v; 3333 return 1; 3334 } 3335 3336 static void 3337 scannl(void) 3338 { 3339 int c; 3340 3341 c = termch; 3342 termch = 0; 3343 while( c != '\n' ) 3344 c = inchar(); 3345 } 3346 3347 static int hexdigit(int c) 3348 { 3349 if( '0' <= c && c <= '9' ) 3350 return c - '0'; 3351 if( 'A' <= c && c <= 'F' ) 3352 return c - ('A' - 10); 3353 if( 'a' <= c && c <= 'f' ) 3354 return c - ('a' - 10); 3355 return EOF; 3356 } 3357 3358 void 3359 getstring(char *s, int size) 3360 { 3361 int c; 3362 3363 c = skipbl(); 3364 do { 3365 if( size > 1 ){ 3366 *s++ = c; 3367 --size; 3368 } 3369 c = inchar(); 3370 } while( c != ' ' && c != '\t' && c != '\n' ); 3371 termch = c; 3372 *s = 0; 3373 } 3374 3375 static char line[256]; 3376 static char *lineptr; 3377 3378 static void 3379 flush_input(void) 3380 { 3381 lineptr = NULL; 3382 } 3383 3384 static int 3385 inchar(void) 3386 { 3387 if (lineptr == NULL || *lineptr == 0) { 3388 if (xmon_gets(line, sizeof(line)) == NULL) { 3389 lineptr = NULL; 3390 return EOF; 3391 } 3392 lineptr = line; 3393 } 3394 return *lineptr++; 3395 } 3396 3397 static void 3398 take_input(char *str) 3399 { 3400 lineptr = str; 3401 } 3402 3403 3404 static void 3405 symbol_lookup(void) 3406 { 3407 int type = inchar(); 3408 unsigned long addr, cpu; 3409 void __percpu *ptr = NULL; 3410 static char tmp[64]; 3411 3412 switch (type) { 3413 case 'a': 3414 if (scanhex(&addr)) 3415 xmon_print_symbol(addr, ": ", "\n"); 3416 termch = 0; 3417 break; 3418 case 's': 3419 getstring(tmp, 64); 3420 if (setjmp(bus_error_jmp) == 0) { 3421 catch_memory_errors = 1; 3422 sync(); 3423 addr = kallsyms_lookup_name(tmp); 3424 if (addr) 3425 printf("%s: %lx\n", tmp, addr); 3426 else 3427 printf("Symbol '%s' not found.\n", tmp); 3428 sync(); 3429 } 3430 catch_memory_errors = 0; 3431 termch = 0; 3432 break; 3433 case 'p': 3434 getstring(tmp, 64); 3435 if (setjmp(bus_error_jmp) == 0) { 3436 catch_memory_errors = 1; 3437 sync(); 3438 ptr = (void __percpu *)kallsyms_lookup_name(tmp); 3439 sync(); 3440 } 3441 3442 if (ptr && 3443 ptr >= (void __percpu *)__per_cpu_start && 3444 ptr < (void __percpu *)__per_cpu_end) 3445 { 3446 if (scanhex(&cpu) && cpu < num_possible_cpus()) { 3447 addr = (unsigned long)per_cpu_ptr(ptr, cpu); 3448 } else { 3449 cpu = raw_smp_processor_id(); 3450 addr = (unsigned long)this_cpu_ptr(ptr); 3451 } 3452 3453 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr); 3454 } else { 3455 printf("Percpu symbol '%s' not found.\n", tmp); 3456 } 3457 3458 catch_memory_errors = 0; 3459 termch = 0; 3460 break; 3461 } 3462 } 3463 3464 3465 /* Print an address in numeric and symbolic form (if possible) */ 3466 static void xmon_print_symbol(unsigned long address, const char *mid, 3467 const char *after) 3468 { 3469 char *modname; 3470 const char *name = NULL; 3471 unsigned long offset, size; 3472 3473 printf(REG, address); 3474 if (setjmp(bus_error_jmp) == 0) { 3475 catch_memory_errors = 1; 3476 sync(); 3477 name = kallsyms_lookup(address, &size, &offset, &modname, 3478 tmpstr); 3479 sync(); 3480 /* wait a little while to see if we get a machine check */ 3481 __delay(200); 3482 } 3483 3484 catch_memory_errors = 0; 3485 3486 if (name) { 3487 printf("%s%s+%#lx/%#lx", mid, name, offset, size); 3488 if (modname) 3489 printf(" [%s]", modname); 3490 } 3491 printf("%s", after); 3492 } 3493 3494 #ifdef CONFIG_PPC_BOOK3S_64 3495 void dump_segments(void) 3496 { 3497 int i; 3498 unsigned long esid,vsid; 3499 unsigned long llp; 3500 3501 printf("SLB contents of cpu 0x%x\n", smp_processor_id()); 3502 3503 for (i = 0; i < mmu_slb_size; i++) { 3504 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i)); 3505 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i)); 3506 3507 if (!esid && !vsid) 3508 continue; 3509 3510 printf("%02d %016lx %016lx", i, esid, vsid); 3511 3512 if (!(esid & SLB_ESID_V)) { 3513 printf("\n"); 3514 continue; 3515 } 3516 3517 llp = vsid & SLB_VSID_LLP; 3518 if (vsid & SLB_VSID_B_1T) { 3519 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n", 3520 GET_ESID_1T(esid), 3521 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T, 3522 llp); 3523 } else { 3524 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n", 3525 GET_ESID(esid), 3526 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT, 3527 llp); 3528 } 3529 } 3530 } 3531 #endif 3532 3533 #ifdef CONFIG_PPC_BOOK3S_32 3534 void dump_segments(void) 3535 { 3536 int i; 3537 3538 printf("sr0-15 ="); 3539 for (i = 0; i < 16; ++i) 3540 printf(" %x", mfsrin(i << 28)); 3541 printf("\n"); 3542 } 3543 #endif 3544 3545 #ifdef CONFIG_44x 3546 static void dump_tlb_44x(void) 3547 { 3548 int i; 3549 3550 for (i = 0; i < PPC44x_TLB_SIZE; i++) { 3551 unsigned long w0,w1,w2; 3552 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i)); 3553 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i)); 3554 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i)); 3555 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2); 3556 if (w0 & PPC44x_TLB_VALID) { 3557 printf("V %08lx -> %01lx%08lx %c%c%c%c%c", 3558 w0 & PPC44x_TLB_EPN_MASK, 3559 w1 & PPC44x_TLB_ERPN_MASK, 3560 w1 & PPC44x_TLB_RPN_MASK, 3561 (w2 & PPC44x_TLB_W) ? 'W' : 'w', 3562 (w2 & PPC44x_TLB_I) ? 'I' : 'i', 3563 (w2 & PPC44x_TLB_M) ? 'M' : 'm', 3564 (w2 & PPC44x_TLB_G) ? 'G' : 'g', 3565 (w2 & PPC44x_TLB_E) ? 'E' : 'e'); 3566 } 3567 printf("\n"); 3568 } 3569 } 3570 #endif /* CONFIG_44x */ 3571 3572 #ifdef CONFIG_PPC_BOOK3E 3573 static void dump_tlb_book3e(void) 3574 { 3575 u32 mmucfg, pidmask, lpidmask; 3576 u64 ramask; 3577 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0; 3578 int mmu_version; 3579 static const char *pgsz_names[] = { 3580 " 1K", 3581 " 2K", 3582 " 4K", 3583 " 8K", 3584 " 16K", 3585 " 32K", 3586 " 64K", 3587 "128K", 3588 "256K", 3589 "512K", 3590 " 1M", 3591 " 2M", 3592 " 4M", 3593 " 8M", 3594 " 16M", 3595 " 32M", 3596 " 64M", 3597 "128M", 3598 "256M", 3599 "512M", 3600 " 1G", 3601 " 2G", 3602 " 4G", 3603 " 8G", 3604 " 16G", 3605 " 32G", 3606 " 64G", 3607 "128G", 3608 "256G", 3609 "512G", 3610 " 1T", 3611 " 2T", 3612 }; 3613 3614 /* Gather some infos about the MMU */ 3615 mmucfg = mfspr(SPRN_MMUCFG); 3616 mmu_version = (mmucfg & 3) + 1; 3617 ntlbs = ((mmucfg >> 2) & 3) + 1; 3618 pidsz = ((mmucfg >> 6) & 0x1f) + 1; 3619 lpidsz = (mmucfg >> 24) & 0xf; 3620 rasz = (mmucfg >> 16) & 0x7f; 3621 if ((mmu_version > 1) && (mmucfg & 0x10000)) 3622 lrat = 1; 3623 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n", 3624 mmu_version, ntlbs, pidsz, lpidsz, rasz); 3625 pidmask = (1ul << pidsz) - 1; 3626 lpidmask = (1ul << lpidsz) - 1; 3627 ramask = (1ull << rasz) - 1; 3628 3629 for (tlb = 0; tlb < ntlbs; tlb++) { 3630 u32 tlbcfg; 3631 int nent, assoc, new_cc = 1; 3632 printf("TLB %d:\n------\n", tlb); 3633 switch(tlb) { 3634 case 0: 3635 tlbcfg = mfspr(SPRN_TLB0CFG); 3636 break; 3637 case 1: 3638 tlbcfg = mfspr(SPRN_TLB1CFG); 3639 break; 3640 case 2: 3641 tlbcfg = mfspr(SPRN_TLB2CFG); 3642 break; 3643 case 3: 3644 tlbcfg = mfspr(SPRN_TLB3CFG); 3645 break; 3646 default: 3647 printf("Unsupported TLB number !\n"); 3648 continue; 3649 } 3650 nent = tlbcfg & 0xfff; 3651 assoc = (tlbcfg >> 24) & 0xff; 3652 for (i = 0; i < nent; i++) { 3653 u32 mas0 = MAS0_TLBSEL(tlb); 3654 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K); 3655 u64 mas2 = 0; 3656 u64 mas7_mas3; 3657 int esel = i, cc = i; 3658 3659 if (assoc != 0) { 3660 cc = i / assoc; 3661 esel = i % assoc; 3662 mas2 = cc * 0x1000; 3663 } 3664 3665 mas0 |= MAS0_ESEL(esel); 3666 mtspr(SPRN_MAS0, mas0); 3667 mtspr(SPRN_MAS1, mas1); 3668 mtspr(SPRN_MAS2, mas2); 3669 asm volatile("tlbre 0,0,0" : : : "memory"); 3670 mas1 = mfspr(SPRN_MAS1); 3671 mas2 = mfspr(SPRN_MAS2); 3672 mas7_mas3 = mfspr(SPRN_MAS7_MAS3); 3673 if (assoc && (i % assoc) == 0) 3674 new_cc = 1; 3675 if (!(mas1 & MAS1_VALID)) 3676 continue; 3677 if (assoc == 0) 3678 printf("%04x- ", i); 3679 else if (new_cc) 3680 printf("%04x-%c", cc, 'A' + esel); 3681 else 3682 printf(" |%c", 'A' + esel); 3683 new_cc = 0; 3684 printf(" %016llx %04x %s %c%c AS%c", 3685 mas2 & ~0x3ffull, 3686 (mas1 >> 16) & 0x3fff, 3687 pgsz_names[(mas1 >> 7) & 0x1f], 3688 mas1 & MAS1_IND ? 'I' : ' ', 3689 mas1 & MAS1_IPROT ? 'P' : ' ', 3690 mas1 & MAS1_TS ? '1' : '0'); 3691 printf(" %c%c%c%c%c%c%c", 3692 mas2 & MAS2_X0 ? 'a' : ' ', 3693 mas2 & MAS2_X1 ? 'v' : ' ', 3694 mas2 & MAS2_W ? 'w' : ' ', 3695 mas2 & MAS2_I ? 'i' : ' ', 3696 mas2 & MAS2_M ? 'm' : ' ', 3697 mas2 & MAS2_G ? 'g' : ' ', 3698 mas2 & MAS2_E ? 'e' : ' '); 3699 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull); 3700 if (mas1 & MAS1_IND) 3701 printf(" %s\n", 3702 pgsz_names[(mas7_mas3 >> 1) & 0x1f]); 3703 else 3704 printf(" U%c%c%c S%c%c%c\n", 3705 mas7_mas3 & MAS3_UX ? 'x' : ' ', 3706 mas7_mas3 & MAS3_UW ? 'w' : ' ', 3707 mas7_mas3 & MAS3_UR ? 'r' : ' ', 3708 mas7_mas3 & MAS3_SX ? 'x' : ' ', 3709 mas7_mas3 & MAS3_SW ? 'w' : ' ', 3710 mas7_mas3 & MAS3_SR ? 'r' : ' '); 3711 } 3712 } 3713 } 3714 #endif /* CONFIG_PPC_BOOK3E */ 3715 3716 static void xmon_init(int enable) 3717 { 3718 if (enable) { 3719 __debugger = xmon; 3720 __debugger_ipi = xmon_ipi; 3721 __debugger_bpt = xmon_bpt; 3722 __debugger_sstep = xmon_sstep; 3723 __debugger_iabr_match = xmon_iabr_match; 3724 __debugger_break_match = xmon_break_match; 3725 __debugger_fault_handler = xmon_fault_handler; 3726 3727 #ifdef CONFIG_PPC_PSERIES 3728 /* 3729 * Get the token here to avoid trying to get a lock 3730 * during the crash, causing a deadlock. 3731 */ 3732 set_indicator_token = rtas_token("set-indicator"); 3733 #endif 3734 } else { 3735 __debugger = NULL; 3736 __debugger_ipi = NULL; 3737 __debugger_bpt = NULL; 3738 __debugger_sstep = NULL; 3739 __debugger_iabr_match = NULL; 3740 __debugger_break_match = NULL; 3741 __debugger_fault_handler = NULL; 3742 } 3743 } 3744 3745 #ifdef CONFIG_MAGIC_SYSRQ 3746 static void sysrq_handle_xmon(int key) 3747 { 3748 /* ensure xmon is enabled */ 3749 xmon_init(1); 3750 debugger(get_irq_regs()); 3751 if (!xmon_on) 3752 xmon_init(0); 3753 } 3754 3755 static struct sysrq_key_op sysrq_xmon_op = { 3756 .handler = sysrq_handle_xmon, 3757 .help_msg = "xmon(x)", 3758 .action_msg = "Entering xmon", 3759 }; 3760 3761 static int __init setup_xmon_sysrq(void) 3762 { 3763 register_sysrq_key('x', &sysrq_xmon_op); 3764 return 0; 3765 } 3766 device_initcall(setup_xmon_sysrq); 3767 #endif /* CONFIG_MAGIC_SYSRQ */ 3768 3769 #ifdef CONFIG_DEBUG_FS 3770 static void clear_all_bpt(void) 3771 { 3772 int i; 3773 3774 /* clear/unpatch all breakpoints */ 3775 remove_bpts(); 3776 remove_cpu_bpts(); 3777 3778 /* Disable all breakpoints */ 3779 for (i = 0; i < NBPTS; ++i) 3780 bpts[i].enabled = 0; 3781 3782 /* Clear any data or iabr breakpoints */ 3783 if (iabr || dabr.enabled) { 3784 iabr = NULL; 3785 dabr.enabled = 0; 3786 } 3787 3788 printf("xmon: All breakpoints cleared\n"); 3789 } 3790 3791 static int xmon_dbgfs_set(void *data, u64 val) 3792 { 3793 xmon_on = !!val; 3794 xmon_init(xmon_on); 3795 3796 /* make sure all breakpoints removed when disabling */ 3797 if (!xmon_on) 3798 clear_all_bpt(); 3799 return 0; 3800 } 3801 3802 static int xmon_dbgfs_get(void *data, u64 *val) 3803 { 3804 *val = xmon_on; 3805 return 0; 3806 } 3807 3808 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get, 3809 xmon_dbgfs_set, "%llu\n"); 3810 3811 static int __init setup_xmon_dbgfs(void) 3812 { 3813 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL, 3814 &xmon_dbgfs_ops); 3815 return 0; 3816 } 3817 device_initcall(setup_xmon_dbgfs); 3818 #endif /* CONFIG_DEBUG_FS */ 3819 3820 static int xmon_early __initdata; 3821 3822 static int __init early_parse_xmon(char *p) 3823 { 3824 if (!p || strncmp(p, "early", 5) == 0) { 3825 /* just "xmon" is equivalent to "xmon=early" */ 3826 xmon_init(1); 3827 xmon_early = 1; 3828 xmon_on = 1; 3829 } else if (strncmp(p, "on", 2) == 0) { 3830 xmon_init(1); 3831 xmon_on = 1; 3832 } else if (strncmp(p, "rw", 2) == 0) { 3833 xmon_init(1); 3834 xmon_on = 1; 3835 xmon_is_ro = false; 3836 } else if (strncmp(p, "ro", 2) == 0) { 3837 xmon_init(1); 3838 xmon_on = 1; 3839 xmon_is_ro = true; 3840 } else if (strncmp(p, "off", 3) == 0) 3841 xmon_on = 0; 3842 else 3843 return 1; 3844 3845 return 0; 3846 } 3847 early_param("xmon", early_parse_xmon); 3848 3849 void __init xmon_setup(void) 3850 { 3851 if (xmon_on) 3852 xmon_init(1); 3853 if (xmon_early) 3854 debugger(NULL); 3855 } 3856 3857 #ifdef CONFIG_SPU_BASE 3858 3859 struct spu_info { 3860 struct spu *spu; 3861 u64 saved_mfc_sr1_RW; 3862 u32 saved_spu_runcntl_RW; 3863 unsigned long dump_addr; 3864 u8 stopped_ok; 3865 }; 3866 3867 #define XMON_NUM_SPUS 16 /* Enough for current hardware */ 3868 3869 static struct spu_info spu_info[XMON_NUM_SPUS]; 3870 3871 void xmon_register_spus(struct list_head *list) 3872 { 3873 struct spu *spu; 3874 3875 list_for_each_entry(spu, list, full_list) { 3876 if (spu->number >= XMON_NUM_SPUS) { 3877 WARN_ON(1); 3878 continue; 3879 } 3880 3881 spu_info[spu->number].spu = spu; 3882 spu_info[spu->number].stopped_ok = 0; 3883 spu_info[spu->number].dump_addr = (unsigned long) 3884 spu_info[spu->number].spu->local_store; 3885 } 3886 } 3887 3888 static void stop_spus(void) 3889 { 3890 struct spu *spu; 3891 int i; 3892 u64 tmp; 3893 3894 for (i = 0; i < XMON_NUM_SPUS; i++) { 3895 if (!spu_info[i].spu) 3896 continue; 3897 3898 if (setjmp(bus_error_jmp) == 0) { 3899 catch_memory_errors = 1; 3900 sync(); 3901 3902 spu = spu_info[i].spu; 3903 3904 spu_info[i].saved_spu_runcntl_RW = 3905 in_be32(&spu->problem->spu_runcntl_RW); 3906 3907 tmp = spu_mfc_sr1_get(spu); 3908 spu_info[i].saved_mfc_sr1_RW = tmp; 3909 3910 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 3911 spu_mfc_sr1_set(spu, tmp); 3912 3913 sync(); 3914 __delay(200); 3915 3916 spu_info[i].stopped_ok = 1; 3917 3918 printf("Stopped spu %.2d (was %s)\n", i, 3919 spu_info[i].saved_spu_runcntl_RW ? 3920 "running" : "stopped"); 3921 } else { 3922 catch_memory_errors = 0; 3923 printf("*** Error stopping spu %.2d\n", i); 3924 } 3925 catch_memory_errors = 0; 3926 } 3927 } 3928 3929 static void restart_spus(void) 3930 { 3931 struct spu *spu; 3932 int i; 3933 3934 for (i = 0; i < XMON_NUM_SPUS; i++) { 3935 if (!spu_info[i].spu) 3936 continue; 3937 3938 if (!spu_info[i].stopped_ok) { 3939 printf("*** Error, spu %d was not successfully stopped" 3940 ", not restarting\n", i); 3941 continue; 3942 } 3943 3944 if (setjmp(bus_error_jmp) == 0) { 3945 catch_memory_errors = 1; 3946 sync(); 3947 3948 spu = spu_info[i].spu; 3949 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW); 3950 out_be32(&spu->problem->spu_runcntl_RW, 3951 spu_info[i].saved_spu_runcntl_RW); 3952 3953 sync(); 3954 __delay(200); 3955 3956 printf("Restarted spu %.2d\n", i); 3957 } else { 3958 catch_memory_errors = 0; 3959 printf("*** Error restarting spu %.2d\n", i); 3960 } 3961 catch_memory_errors = 0; 3962 } 3963 } 3964 3965 #define DUMP_WIDTH 23 3966 #define DUMP_VALUE(format, field, value) \ 3967 do { \ 3968 if (setjmp(bus_error_jmp) == 0) { \ 3969 catch_memory_errors = 1; \ 3970 sync(); \ 3971 printf(" %-*s = "format"\n", DUMP_WIDTH, \ 3972 #field, value); \ 3973 sync(); \ 3974 __delay(200); \ 3975 } else { \ 3976 catch_memory_errors = 0; \ 3977 printf(" %-*s = *** Error reading field.\n", \ 3978 DUMP_WIDTH, #field); \ 3979 } \ 3980 catch_memory_errors = 0; \ 3981 } while (0) 3982 3983 #define DUMP_FIELD(obj, format, field) \ 3984 DUMP_VALUE(format, field, obj->field) 3985 3986 static void dump_spu_fields(struct spu *spu) 3987 { 3988 printf("Dumping spu fields at address %p:\n", spu); 3989 3990 DUMP_FIELD(spu, "0x%x", number); 3991 DUMP_FIELD(spu, "%s", name); 3992 DUMP_FIELD(spu, "0x%lx", local_store_phys); 3993 DUMP_FIELD(spu, "0x%p", local_store); 3994 DUMP_FIELD(spu, "0x%lx", ls_size); 3995 DUMP_FIELD(spu, "0x%x", node); 3996 DUMP_FIELD(spu, "0x%lx", flags); 3997 DUMP_FIELD(spu, "%llu", class_0_pending); 3998 DUMP_FIELD(spu, "0x%llx", class_0_dar); 3999 DUMP_FIELD(spu, "0x%llx", class_1_dar); 4000 DUMP_FIELD(spu, "0x%llx", class_1_dsisr); 4001 DUMP_FIELD(spu, "0x%x", irqs[0]); 4002 DUMP_FIELD(spu, "0x%x", irqs[1]); 4003 DUMP_FIELD(spu, "0x%x", irqs[2]); 4004 DUMP_FIELD(spu, "0x%x", slb_replace); 4005 DUMP_FIELD(spu, "%d", pid); 4006 DUMP_FIELD(spu, "0x%p", mm); 4007 DUMP_FIELD(spu, "0x%p", ctx); 4008 DUMP_FIELD(spu, "0x%p", rq); 4009 DUMP_FIELD(spu, "0x%llx", timestamp); 4010 DUMP_FIELD(spu, "0x%lx", problem_phys); 4011 DUMP_FIELD(spu, "0x%p", problem); 4012 DUMP_VALUE("0x%x", problem->spu_runcntl_RW, 4013 in_be32(&spu->problem->spu_runcntl_RW)); 4014 DUMP_VALUE("0x%x", problem->spu_status_R, 4015 in_be32(&spu->problem->spu_status_R)); 4016 DUMP_VALUE("0x%x", problem->spu_npc_RW, 4017 in_be32(&spu->problem->spu_npc_RW)); 4018 DUMP_FIELD(spu, "0x%p", priv2); 4019 DUMP_FIELD(spu, "0x%p", pdata); 4020 } 4021 4022 int 4023 spu_inst_dump(unsigned long adr, long count, int praddr) 4024 { 4025 return generic_inst_dump(adr, count, praddr, print_insn_spu); 4026 } 4027 4028 static void dump_spu_ls(unsigned long num, int subcmd) 4029 { 4030 unsigned long offset, addr, ls_addr; 4031 4032 if (setjmp(bus_error_jmp) == 0) { 4033 catch_memory_errors = 1; 4034 sync(); 4035 ls_addr = (unsigned long)spu_info[num].spu->local_store; 4036 sync(); 4037 __delay(200); 4038 } else { 4039 catch_memory_errors = 0; 4040 printf("*** Error: accessing spu info for spu %ld\n", num); 4041 return; 4042 } 4043 catch_memory_errors = 0; 4044 4045 if (scanhex(&offset)) 4046 addr = ls_addr + offset; 4047 else 4048 addr = spu_info[num].dump_addr; 4049 4050 if (addr >= ls_addr + LS_SIZE) { 4051 printf("*** Error: address outside of local store\n"); 4052 return; 4053 } 4054 4055 switch (subcmd) { 4056 case 'i': 4057 addr += spu_inst_dump(addr, 16, 1); 4058 last_cmd = "sdi\n"; 4059 break; 4060 default: 4061 prdump(addr, 64); 4062 addr += 64; 4063 last_cmd = "sd\n"; 4064 break; 4065 } 4066 4067 spu_info[num].dump_addr = addr; 4068 } 4069 4070 static int do_spu_cmd(void) 4071 { 4072 static unsigned long num = 0; 4073 int cmd, subcmd = 0; 4074 4075 cmd = inchar(); 4076 switch (cmd) { 4077 case 's': 4078 stop_spus(); 4079 break; 4080 case 'r': 4081 restart_spus(); 4082 break; 4083 case 'd': 4084 subcmd = inchar(); 4085 if (isxdigit(subcmd) || subcmd == '\n') 4086 termch = subcmd; 4087 /* fall through */ 4088 case 'f': 4089 scanhex(&num); 4090 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) { 4091 printf("*** Error: invalid spu number\n"); 4092 return 0; 4093 } 4094 4095 switch (cmd) { 4096 case 'f': 4097 dump_spu_fields(spu_info[num].spu); 4098 break; 4099 default: 4100 dump_spu_ls(num, subcmd); 4101 break; 4102 } 4103 4104 break; 4105 default: 4106 return -1; 4107 } 4108 4109 return 0; 4110 } 4111 #else /* ! CONFIG_SPU_BASE */ 4112 static int do_spu_cmd(void) 4113 { 4114 return -1; 4115 } 4116 #endif 4117