1 /*
2  * Copyright 2016,2017 IBM Corporation.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version
7  * 2 of the License, or (at your option) any later version.
8  */
9 #ifndef __XIVE_INTERNAL_H
10 #define __XIVE_INTERNAL_H
11 
12 /* Each CPU carry one of these with various per-CPU state */
13 struct xive_cpu {
14 #ifdef CONFIG_SMP
15 	/* HW irq number and data of IPI */
16 	u32 hw_ipi;
17 	struct xive_irq_data ipi_data;
18 #endif /* CONFIG_SMP */
19 
20 	int chip_id;
21 
22 	/* Queue datas. Only one is populated */
23 #define XIVE_MAX_QUEUES	8
24 	struct xive_q queue[XIVE_MAX_QUEUES];
25 
26 	/*
27 	 * Pending mask. Each bit corresponds to a priority that
28 	 * potentially has pending interrupts.
29 	 */
30 	u8 pending_prio;
31 
32 	/* Cache of HW CPPR */
33 	u8 cppr;
34 };
35 
36 /* Backend ops */
37 struct xive_ops {
38 	int	(*populate_irq_data)(u32 hw_irq, struct xive_irq_data *data);
39 	int 	(*configure_irq)(u32 hw_irq, u32 target, u8 prio, u32 sw_irq);
40 	int	(*setup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);
41 	void	(*cleanup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);
42 	void	(*setup_cpu)(unsigned int cpu, struct xive_cpu *xc);
43 	void	(*teardown_cpu)(unsigned int cpu, struct xive_cpu *xc);
44 	bool	(*match)(struct device_node *np);
45 	void	(*shutdown)(void);
46 
47 	void	(*update_pending)(struct xive_cpu *xc);
48 	void	(*eoi)(u32 hw_irq);
49 	void	(*sync_source)(u32 hw_irq);
50 #ifdef CONFIG_SMP
51 	int	(*get_ipi)(unsigned int cpu, struct xive_cpu *xc);
52 	void	(*put_ipi)(unsigned int cpu, struct xive_cpu *xc);
53 #endif
54 	const char *name;
55 };
56 
57 bool xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 offset,
58 		    u8 max_prio);
59 
60 extern bool xive_cmdline_disabled;
61 
62 #endif /*  __XIVE_INTERNAL_H */
63