1 /* 2 * Copyright 2011 IBM Corporation. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 */ 10 11 #include <linux/types.h> 12 #include <linux/kernel.h> 13 #include <linux/irq.h> 14 #include <linux/smp.h> 15 #include <linux/interrupt.h> 16 #include <linux/init.h> 17 #include <linux/cpu.h> 18 #include <linux/of.h> 19 #include <linux/spinlock.h> 20 #include <linux/module.h> 21 22 #include <asm/prom.h> 23 #include <asm/io.h> 24 #include <asm/smp.h> 25 #include <asm/irq.h> 26 #include <asm/errno.h> 27 #include <asm/xics.h> 28 #include <asm/kvm_ppc.h> 29 30 struct icp_ipl { 31 union { 32 u32 word; 33 u8 bytes[4]; 34 } xirr_poll; 35 union { 36 u32 word; 37 u8 bytes[4]; 38 } xirr; 39 u32 dummy; 40 union { 41 u32 word; 42 u8 bytes[4]; 43 } qirr; 44 u32 link_a; 45 u32 link_b; 46 u32 link_c; 47 }; 48 49 static struct icp_ipl __iomem *icp_native_regs[NR_CPUS]; 50 51 static inline unsigned int icp_native_get_xirr(void) 52 { 53 int cpu = smp_processor_id(); 54 55 return in_be32(&icp_native_regs[cpu]->xirr.word); 56 } 57 58 static inline void icp_native_set_xirr(unsigned int value) 59 { 60 int cpu = smp_processor_id(); 61 62 out_be32(&icp_native_regs[cpu]->xirr.word, value); 63 } 64 65 static inline void icp_native_set_cppr(u8 value) 66 { 67 int cpu = smp_processor_id(); 68 69 out_8(&icp_native_regs[cpu]->xirr.bytes[0], value); 70 } 71 72 static inline void icp_native_set_qirr(int n_cpu, u8 value) 73 { 74 out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value); 75 } 76 77 static void icp_native_set_cpu_priority(unsigned char cppr) 78 { 79 xics_set_base_cppr(cppr); 80 icp_native_set_cppr(cppr); 81 iosync(); 82 } 83 84 static void icp_native_eoi(struct irq_data *d) 85 { 86 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); 87 88 iosync(); 89 icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq); 90 } 91 92 static void icp_native_teardown_cpu(void) 93 { 94 int cpu = smp_processor_id(); 95 96 /* Clear any pending IPI */ 97 icp_native_set_qirr(cpu, 0xff); 98 } 99 100 static void icp_native_flush_ipi(void) 101 { 102 /* We take the ipi irq but and never return so we 103 * need to EOI the IPI, but want to leave our priority 0 104 * 105 * should we check all the other interrupts too? 106 * should we be flagging idle loop instead? 107 * or creating some task to be scheduled? 108 */ 109 110 icp_native_set_xirr((0x00 << 24) | XICS_IPI); 111 } 112 113 static unsigned int icp_native_get_irq(void) 114 { 115 unsigned int xirr = icp_native_get_xirr(); 116 unsigned int vec = xirr & 0x00ffffff; 117 unsigned int irq; 118 119 if (vec == XICS_IRQ_SPURIOUS) 120 return NO_IRQ; 121 122 irq = irq_radix_revmap_lookup(xics_host, vec); 123 if (likely(irq != NO_IRQ)) { 124 xics_push_cppr(vec); 125 return irq; 126 } 127 128 /* We don't have a linux mapping, so have rtas mask it. */ 129 xics_mask_unknown_vec(vec); 130 131 /* We might learn about it later, so EOI it */ 132 icp_native_set_xirr(xirr); 133 134 return NO_IRQ; 135 } 136 137 #ifdef CONFIG_SMP 138 139 static void icp_native_cause_ipi(int cpu, unsigned long data) 140 { 141 icp_native_set_qirr(cpu, IPI_PRIORITY); 142 } 143 144 void xics_wake_cpu(int cpu) 145 { 146 icp_native_set_qirr(cpu, IPI_PRIORITY); 147 } 148 EXPORT_SYMBOL_GPL(xics_wake_cpu); 149 150 static irqreturn_t icp_native_ipi_action(int irq, void *dev_id) 151 { 152 int cpu = smp_processor_id(); 153 154 icp_native_set_qirr(cpu, 0xff); 155 156 return smp_ipi_demux(); 157 } 158 159 #endif /* CONFIG_SMP */ 160 161 static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr, 162 unsigned long size) 163 { 164 char *rname; 165 int i, cpu = -1; 166 167 /* This may look gross but it's good enough for now, we don't quite 168 * have a hard -> linux processor id matching. 169 */ 170 for_each_possible_cpu(i) { 171 if (!cpu_present(i)) 172 continue; 173 if (hw_id == get_hard_smp_processor_id(i)) { 174 cpu = i; 175 break; 176 } 177 } 178 179 /* Fail, skip that CPU. Don't print, it's normal, some XICS come up 180 * with way more entries in there than you have CPUs 181 */ 182 if (cpu == -1) 183 return 0; 184 185 rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation", 186 cpu, hw_id); 187 188 if (!request_mem_region(addr, size, rname)) { 189 pr_warning("icp_native: Could not reserve ICP MMIO" 190 " for CPU %d, interrupt server #0x%x\n", 191 cpu, hw_id); 192 return -EBUSY; 193 } 194 195 icp_native_regs[cpu] = ioremap(addr, size); 196 kvmppc_set_xics_phys(cpu, addr); 197 if (!icp_native_regs[cpu]) { 198 pr_warning("icp_native: Failed ioremap for CPU %d, " 199 "interrupt server #0x%x, addr %#lx\n", 200 cpu, hw_id, addr); 201 release_mem_region(addr, size); 202 return -ENOMEM; 203 } 204 return 0; 205 } 206 207 static int __init icp_native_init_one_node(struct device_node *np, 208 unsigned int *indx) 209 { 210 unsigned int ilen; 211 const u32 *ireg; 212 int i; 213 int reg_tuple_size; 214 int num_servers = 0; 215 216 /* This code does the theorically broken assumption that the interrupt 217 * server numbers are the same as the hard CPU numbers. 218 * This happens to be the case so far but we are playing with fire... 219 * should be fixed one of these days. -BenH. 220 */ 221 ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen); 222 223 /* Do that ever happen ? we'll know soon enough... but even good'old 224 * f80 does have that property .. 225 */ 226 WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32))); 227 228 if (ireg) { 229 *indx = of_read_number(ireg, 1); 230 if (ilen >= 2*sizeof(u32)) 231 num_servers = of_read_number(ireg + 1, 1); 232 } 233 234 ireg = of_get_property(np, "reg", &ilen); 235 if (!ireg) { 236 pr_err("icp_native: Can't find interrupt reg property"); 237 return -1; 238 } 239 240 reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4; 241 if (((ilen % reg_tuple_size) != 0) 242 || (num_servers && (num_servers != (ilen / reg_tuple_size)))) { 243 pr_err("icp_native: ICP reg len (%d) != num servers (%d)", 244 ilen / reg_tuple_size, num_servers); 245 return -1; 246 } 247 248 for (i = 0; i < (ilen / reg_tuple_size); i++) { 249 struct resource r; 250 int err; 251 252 err = of_address_to_resource(np, i, &r); 253 if (err) { 254 pr_err("icp_native: Could not translate ICP MMIO" 255 " for interrupt server 0x%x (%d)\n", *indx, err); 256 return -1; 257 } 258 259 if (icp_native_map_one_cpu(*indx, r.start, resource_size(&r))) 260 return -1; 261 262 (*indx)++; 263 } 264 return 0; 265 } 266 267 static const struct icp_ops icp_native_ops = { 268 .get_irq = icp_native_get_irq, 269 .eoi = icp_native_eoi, 270 .set_priority = icp_native_set_cpu_priority, 271 .teardown_cpu = icp_native_teardown_cpu, 272 .flush_ipi = icp_native_flush_ipi, 273 #ifdef CONFIG_SMP 274 .ipi_action = icp_native_ipi_action, 275 .cause_ipi = icp_native_cause_ipi, 276 #endif 277 }; 278 279 int __init icp_native_init(void) 280 { 281 struct device_node *np; 282 u32 indx = 0; 283 int found = 0; 284 285 for_each_compatible_node(np, NULL, "ibm,ppc-xicp") 286 if (icp_native_init_one_node(np, &indx) == 0) 287 found = 1; 288 if (!found) { 289 for_each_node_by_type(np, 290 "PowerPC-External-Interrupt-Presentation") { 291 if (icp_native_init_one_node(np, &indx) == 0) 292 found = 1; 293 } 294 } 295 296 if (found == 0) 297 return -ENODEV; 298 299 icp_ops = &icp_native_ops; 300 301 return 0; 302 } 303