1 /* 2 * Copyright 2006, Segher Boessenkool, IBM Corporation. 3 * Copyright 2006-2007, Michael Ellerman, IBM Corporation. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; version 2 of the 8 * License. 9 * 10 */ 11 12 #include <linux/irq.h> 13 #include <linux/bootmem.h> 14 #include <linux/msi.h> 15 #include <asm/mpic.h> 16 #include <asm/prom.h> 17 #include <asm/hw_irq.h> 18 #include <asm/ppc-pci.h> 19 #include <asm/msi_bitmap.h> 20 21 #include "mpic.h" 22 23 /* A bit ugly, can we get this from the pci_dev somehow? */ 24 static struct mpic *msi_mpic; 25 26 static void mpic_u3msi_mask_irq(struct irq_data *data) 27 { 28 mask_msi_irq(data); 29 mpic_mask_irq(data); 30 } 31 32 static void mpic_u3msi_unmask_irq(struct irq_data *data) 33 { 34 mpic_unmask_irq(data); 35 unmask_msi_irq(data); 36 } 37 38 static struct irq_chip mpic_u3msi_chip = { 39 .irq_shutdown = mpic_u3msi_mask_irq, 40 .irq_mask = mpic_u3msi_mask_irq, 41 .irq_unmask = mpic_u3msi_unmask_irq, 42 .irq_eoi = mpic_end_irq, 43 .irq_set_type = mpic_set_irq_type, 44 .irq_set_affinity = mpic_set_affinity, 45 .name = "MPIC-U3MSI", 46 }; 47 48 static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos) 49 { 50 u8 flags; 51 u32 tmp; 52 u64 addr; 53 54 pci_read_config_byte(pdev, pos + HT_MSI_FLAGS, &flags); 55 56 if (flags & HT_MSI_FLAGS_FIXED) 57 return HT_MSI_FIXED_ADDR; 58 59 pci_read_config_dword(pdev, pos + HT_MSI_ADDR_LO, &tmp); 60 addr = tmp & HT_MSI_ADDR_LO_MASK; 61 pci_read_config_dword(pdev, pos + HT_MSI_ADDR_HI, &tmp); 62 addr = addr | ((u64)tmp << 32); 63 64 return addr; 65 } 66 67 static u64 find_ht_magic_addr(struct pci_dev *pdev, unsigned int hwirq) 68 { 69 struct pci_bus *bus; 70 unsigned int pos; 71 72 for (bus = pdev->bus; bus && bus->self; bus = bus->parent) { 73 pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING); 74 if (pos) 75 return read_ht_magic_addr(bus->self, pos); 76 } 77 78 return 0; 79 } 80 81 static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq) 82 { 83 struct pci_controller *hose = pci_bus_to_host(pdev->bus); 84 85 /* U4 PCIe MSIs need to write to the special register in 86 * the bridge that generates interrupts. There should be 87 * theorically a register at 0xf8005000 where you just write 88 * the MSI number and that triggers the right interrupt, but 89 * unfortunately, this is busted in HW, the bridge endian swaps 90 * the value and hits the wrong nibble in the register. 91 * 92 * So instead we use another register set which is used normally 93 * for converting HT interrupts to MPIC interrupts, which decodes 94 * the interrupt number as part of the low address bits 95 * 96 * This will not work if we ever use more than one legacy MSI in 97 * a block but we never do. For one MSI or multiple MSI-X where 98 * each interrupt address can be specified separately, it works 99 * just fine. 100 */ 101 if (of_device_is_compatible(hose->dn, "u4-pcie") || 102 of_device_is_compatible(hose->dn, "U4-pcie")) 103 return 0xf8004000 | (hwirq << 4); 104 105 return 0; 106 } 107 108 static void u3msi_teardown_msi_irqs(struct pci_dev *pdev) 109 { 110 struct msi_desc *entry; 111 112 list_for_each_entry(entry, &pdev->msi_list, list) { 113 if (entry->irq == NO_IRQ) 114 continue; 115 116 irq_set_msi_desc(entry->irq, NULL); 117 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, 118 virq_to_hw(entry->irq), 1); 119 irq_dispose_mapping(entry->irq); 120 } 121 122 return; 123 } 124 125 static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 126 { 127 unsigned int virq; 128 struct msi_desc *entry; 129 struct msi_msg msg; 130 u64 addr; 131 int hwirq; 132 133 if (type == PCI_CAP_ID_MSIX) 134 pr_debug("u3msi: MSI-X untested, trying anyway.\n"); 135 136 /* If we can't find a magic address then MSI ain't gonna work */ 137 if (find_ht_magic_addr(pdev, 0) == 0 && 138 find_u4_magic_addr(pdev, 0) == 0) { 139 pr_debug("u3msi: no magic address found for %s\n", 140 pci_name(pdev)); 141 return -ENXIO; 142 } 143 144 list_for_each_entry(entry, &pdev->msi_list, list) { 145 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); 146 if (hwirq < 0) { 147 pr_debug("u3msi: failed allocating hwirq\n"); 148 return hwirq; 149 } 150 151 addr = find_ht_magic_addr(pdev, hwirq); 152 if (addr == 0) 153 addr = find_u4_magic_addr(pdev, hwirq); 154 msg.address_lo = addr & 0xFFFFFFFF; 155 msg.address_hi = addr >> 32; 156 157 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); 158 if (virq == NO_IRQ) { 159 pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq); 160 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, 1); 161 return -ENOSPC; 162 } 163 164 irq_set_msi_desc(virq, entry); 165 irq_set_chip(virq, &mpic_u3msi_chip); 166 irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING); 167 168 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", 169 virq, hwirq, (unsigned long)addr); 170 171 printk("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", 172 virq, hwirq, (unsigned long)addr); 173 msg.data = hwirq; 174 write_msi_msg(virq, &msg); 175 176 hwirq++; 177 } 178 179 return 0; 180 } 181 182 int mpic_u3msi_init(struct mpic *mpic) 183 { 184 int rc; 185 186 rc = mpic_msi_init_allocator(mpic); 187 if (rc) { 188 pr_debug("u3msi: Error allocating bitmap!\n"); 189 return rc; 190 } 191 192 pr_debug("u3msi: Registering MPIC U3 MSI callbacks.\n"); 193 194 BUG_ON(msi_mpic); 195 msi_mpic = mpic; 196 197 WARN_ON(ppc_md.setup_msi_irqs); 198 ppc_md.setup_msi_irqs = u3msi_setup_msi_irqs; 199 ppc_md.teardown_msi_irqs = u3msi_teardown_msi_irqs; 200 201 return 0; 202 } 203