1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * FSL SoC setup code 4 * 5 * Maintained by Kumar Gala (see MAINTAINERS for contact information) 6 * 7 * 2006 (c) MontaVista Software, Inc. 8 * Vitaly Bordug <vbordug@ru.mvista.com> 9 */ 10 11 #include <linux/stddef.h> 12 #include <linux/kernel.h> 13 #include <linux/init.h> 14 #include <linux/errno.h> 15 #include <linux/major.h> 16 #include <linux/delay.h> 17 #include <linux/irq.h> 18 #include <linux/export.h> 19 #include <linux/device.h> 20 #include <linux/platform_device.h> 21 #include <linux/of.h> 22 #include <linux/of_platform.h> 23 #include <linux/phy.h> 24 #include <linux/spi/spi.h> 25 #include <linux/fsl_devices.h> 26 #include <linux/fs_enet_pd.h> 27 #include <linux/fs_uart_pd.h> 28 #include <linux/reboot.h> 29 30 #include <linux/atomic.h> 31 #include <asm/io.h> 32 #include <asm/irq.h> 33 #include <asm/time.h> 34 #include <asm/machdep.h> 35 #include <sysdev/fsl_soc.h> 36 #include <mm/mmu_decl.h> 37 #include <asm/cpm2.h> 38 #include <asm/fsl_hcalls.h> /* For the Freescale hypervisor */ 39 40 extern void init_fcc_ioports(struct fs_platform_info*); 41 extern void init_fec_ioports(struct fs_platform_info*); 42 extern void init_smc_ioports(struct fs_uart_platform_info*); 43 static phys_addr_t immrbase = -1; 44 45 phys_addr_t get_immrbase(void) 46 { 47 struct device_node *soc; 48 49 if (immrbase != -1) 50 return immrbase; 51 52 soc = of_find_node_by_type(NULL, "soc"); 53 if (soc) { 54 struct resource res; 55 56 if (!of_range_to_resource(soc, 0, &res)) 57 immrbase = res.start; 58 59 of_node_put(soc); 60 } 61 62 return immrbase; 63 } 64 65 EXPORT_SYMBOL(get_immrbase); 66 67 u32 fsl_get_sys_freq(void) 68 { 69 static u32 sysfreq = -1; 70 struct device_node *soc; 71 72 if (sysfreq != -1) 73 return sysfreq; 74 75 soc = of_find_node_by_type(NULL, "soc"); 76 if (!soc) 77 return -1; 78 79 of_property_read_u32(soc, "clock-frequency", &sysfreq); 80 if (sysfreq == -1 || !sysfreq) 81 of_property_read_u32(soc, "bus-frequency", &sysfreq); 82 83 of_node_put(soc); 84 return sysfreq; 85 } 86 EXPORT_SYMBOL(fsl_get_sys_freq); 87 88 #if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) 89 90 u32 get_brgfreq(void) 91 { 92 static u32 brgfreq = -1; 93 struct device_node *node; 94 95 if (brgfreq != -1) 96 return brgfreq; 97 98 node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg"); 99 if (node) { 100 of_property_read_u32(node, "clock-frequency", &brgfreq); 101 of_node_put(node); 102 return brgfreq; 103 } 104 105 /* Legacy device binding -- will go away when no users are left. */ 106 node = of_find_node_by_type(NULL, "cpm"); 107 if (!node) 108 node = of_find_compatible_node(NULL, NULL, "fsl,qe"); 109 if (!node) 110 node = of_find_node_by_type(NULL, "qe"); 111 112 if (node) { 113 of_property_read_u32(node, "brg-frequency", &brgfreq); 114 if (brgfreq == -1 || !brgfreq) 115 if (!of_property_read_u32(node, "bus-frequency", 116 &brgfreq)) 117 brgfreq /= 2; 118 of_node_put(node); 119 } 120 121 return brgfreq; 122 } 123 124 EXPORT_SYMBOL(get_brgfreq); 125 126 u32 get_baudrate(void) 127 { 128 static u32 fs_baudrate = -1; 129 struct device_node *node; 130 131 if (fs_baudrate != -1) 132 return fs_baudrate; 133 134 node = of_find_node_by_type(NULL, "serial"); 135 if (node) { 136 of_property_read_u32(node, "current-speed", &fs_baudrate); 137 of_node_put(node); 138 } 139 140 return fs_baudrate; 141 } 142 143 EXPORT_SYMBOL(get_baudrate); 144 #endif /* CONFIG_CPM2 */ 145 146 #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx) 147 static __be32 __iomem *rstcr; 148 149 static int fsl_rstcr_restart(struct notifier_block *this, 150 unsigned long mode, void *cmd) 151 { 152 local_irq_disable(); 153 /* set reset control register */ 154 out_be32(rstcr, 0x2); /* HRESET_REQ */ 155 156 return NOTIFY_DONE; 157 } 158 159 static int __init setup_rstcr(void) 160 { 161 struct device_node *np; 162 163 static struct notifier_block restart_handler = { 164 .notifier_call = fsl_rstcr_restart, 165 .priority = 128, 166 }; 167 168 for_each_node_by_name(np, "global-utilities") { 169 if (of_property_read_bool(np, "fsl,has-rstcr")) { 170 rstcr = of_iomap(np, 0) + 0xb0; 171 if (!rstcr) { 172 printk (KERN_ERR "Error: reset control " 173 "register not mapped!\n"); 174 } else { 175 register_restart_handler(&restart_handler); 176 } 177 break; 178 } 179 } 180 181 of_node_put(np); 182 183 return 0; 184 } 185 186 arch_initcall(setup_rstcr); 187 188 #endif 189 190 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 191 struct platform_diu_data_ops diu_ops; 192 EXPORT_SYMBOL(diu_ops); 193 #endif 194 195 #ifdef CONFIG_EPAPR_PARAVIRT 196 /* 197 * Restart the current partition 198 * 199 * This function should be assigned to the ppc_md.restart function pointer, 200 * to initiate a partition restart when we're running under the Freescale 201 * hypervisor. 202 */ 203 void __noreturn fsl_hv_restart(char *cmd) 204 { 205 pr_info("hv restart\n"); 206 fh_partition_restart(-1); 207 while (1) ; 208 } 209 210 /* 211 * Halt the current partition 212 * 213 * This function should be assigned to the pm_power_off and ppc_md.halt 214 * function pointers, to shut down the partition when we're running under 215 * the Freescale hypervisor. 216 */ 217 void __noreturn fsl_hv_halt(void) 218 { 219 pr_info("hv exit\n"); 220 fh_partition_stop(-1); 221 while (1) ; 222 } 223 #endif 224