1 /* 2 * FSL SoC setup code 3 * 4 * Maintained by Kumar Gala (see MAINTAINERS for contact information) 5 * 6 * 2006 (c) MontaVista Software, Inc. 7 * Vitaly Bordug <vbordug@ru.mvista.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 15 #include <linux/stddef.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/errno.h> 19 #include <linux/major.h> 20 #include <linux/delay.h> 21 #include <linux/irq.h> 22 #include <linux/module.h> 23 #include <linux/device.h> 24 #include <linux/platform_device.h> 25 #include <linux/of_platform.h> 26 #include <linux/phy.h> 27 #include <linux/phy_fixed.h> 28 #include <linux/spi/spi.h> 29 #include <linux/fsl_devices.h> 30 #include <linux/fs_enet_pd.h> 31 #include <linux/fs_uart_pd.h> 32 33 #include <asm/system.h> 34 #include <asm/atomic.h> 35 #include <asm/io.h> 36 #include <asm/irq.h> 37 #include <asm/time.h> 38 #include <asm/prom.h> 39 #include <sysdev/fsl_soc.h> 40 #include <mm/mmu_decl.h> 41 #include <asm/cpm2.h> 42 43 extern void init_fcc_ioports(struct fs_platform_info*); 44 extern void init_fec_ioports(struct fs_platform_info*); 45 extern void init_smc_ioports(struct fs_uart_platform_info*); 46 static phys_addr_t immrbase = -1; 47 48 phys_addr_t get_immrbase(void) 49 { 50 struct device_node *soc; 51 52 if (immrbase != -1) 53 return immrbase; 54 55 soc = of_find_node_by_type(NULL, "soc"); 56 if (soc) { 57 int size; 58 u32 naddr; 59 const u32 *prop = of_get_property(soc, "#address-cells", &size); 60 61 if (prop && size == 4) 62 naddr = *prop; 63 else 64 naddr = 2; 65 66 prop = of_get_property(soc, "ranges", &size); 67 if (prop) 68 immrbase = of_translate_address(soc, prop + naddr); 69 70 of_node_put(soc); 71 } 72 73 return immrbase; 74 } 75 76 EXPORT_SYMBOL(get_immrbase); 77 78 static u32 sysfreq = -1; 79 80 u32 fsl_get_sys_freq(void) 81 { 82 struct device_node *soc; 83 const u32 *prop; 84 int size; 85 86 if (sysfreq != -1) 87 return sysfreq; 88 89 soc = of_find_node_by_type(NULL, "soc"); 90 if (!soc) 91 return -1; 92 93 prop = of_get_property(soc, "clock-frequency", &size); 94 if (!prop || size != sizeof(*prop) || *prop == 0) 95 prop = of_get_property(soc, "bus-frequency", &size); 96 97 if (prop && size == sizeof(*prop)) 98 sysfreq = *prop; 99 100 of_node_put(soc); 101 return sysfreq; 102 } 103 EXPORT_SYMBOL(fsl_get_sys_freq); 104 105 #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx) 106 107 static u32 brgfreq = -1; 108 109 u32 get_brgfreq(void) 110 { 111 struct device_node *node; 112 const unsigned int *prop; 113 int size; 114 115 if (brgfreq != -1) 116 return brgfreq; 117 118 node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg"); 119 if (node) { 120 prop = of_get_property(node, "clock-frequency", &size); 121 if (prop && size == 4) 122 brgfreq = *prop; 123 124 of_node_put(node); 125 return brgfreq; 126 } 127 128 /* Legacy device binding -- will go away when no users are left. */ 129 node = of_find_node_by_type(NULL, "cpm"); 130 if (!node) 131 node = of_find_compatible_node(NULL, NULL, "fsl,qe"); 132 if (!node) 133 node = of_find_node_by_type(NULL, "qe"); 134 135 if (node) { 136 prop = of_get_property(node, "brg-frequency", &size); 137 if (prop && size == 4) 138 brgfreq = *prop; 139 140 if (brgfreq == -1 || brgfreq == 0) { 141 prop = of_get_property(node, "bus-frequency", &size); 142 if (prop && size == 4) 143 brgfreq = *prop / 2; 144 } 145 of_node_put(node); 146 } 147 148 return brgfreq; 149 } 150 151 EXPORT_SYMBOL(get_brgfreq); 152 153 static u32 fs_baudrate = -1; 154 155 u32 get_baudrate(void) 156 { 157 struct device_node *node; 158 159 if (fs_baudrate != -1) 160 return fs_baudrate; 161 162 node = of_find_node_by_type(NULL, "serial"); 163 if (node) { 164 int size; 165 const unsigned int *prop = of_get_property(node, 166 "current-speed", &size); 167 168 if (prop) 169 fs_baudrate = *prop; 170 of_node_put(node); 171 } 172 173 return fs_baudrate; 174 } 175 176 EXPORT_SYMBOL(get_baudrate); 177 #endif /* CONFIG_CPM2 */ 178 179 #ifdef CONFIG_FIXED_PHY 180 static int __init of_add_fixed_phys(void) 181 { 182 int ret; 183 struct device_node *np; 184 u32 *fixed_link; 185 struct fixed_phy_status status = {}; 186 187 for_each_node_by_name(np, "ethernet") { 188 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL); 189 if (!fixed_link) 190 continue; 191 192 status.link = 1; 193 status.duplex = fixed_link[1]; 194 status.speed = fixed_link[2]; 195 status.pause = fixed_link[3]; 196 status.asym_pause = fixed_link[4]; 197 198 ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status); 199 if (ret) { 200 of_node_put(np); 201 return ret; 202 } 203 } 204 205 return 0; 206 } 207 arch_initcall(of_add_fixed_phys); 208 #endif /* CONFIG_FIXED_PHY */ 209 210 static int __init gfar_mdio_of_init(void) 211 { 212 struct device_node *np = NULL; 213 struct platform_device *mdio_dev; 214 struct resource res; 215 int ret; 216 217 np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio"); 218 219 /* try the deprecated version */ 220 if (!np) 221 np = of_find_compatible_node(np, "mdio", "gianfar"); 222 223 if (np) { 224 int k; 225 struct device_node *child = NULL; 226 struct gianfar_mdio_data mdio_data; 227 228 memset(&res, 0, sizeof(res)); 229 memset(&mdio_data, 0, sizeof(mdio_data)); 230 231 ret = of_address_to_resource(np, 0, &res); 232 if (ret) 233 goto err; 234 235 mdio_dev = 236 platform_device_register_simple("fsl-gianfar_mdio", 237 res.start, &res, 1); 238 if (IS_ERR(mdio_dev)) { 239 ret = PTR_ERR(mdio_dev); 240 goto err; 241 } 242 243 for (k = 0; k < 32; k++) 244 mdio_data.irq[k] = PHY_POLL; 245 246 while ((child = of_get_next_child(np, child)) != NULL) { 247 int irq = irq_of_parse_and_map(child, 0); 248 if (irq != NO_IRQ) { 249 const u32 *id = of_get_property(child, 250 "reg", NULL); 251 mdio_data.irq[*id] = irq; 252 } 253 } 254 255 ret = 256 platform_device_add_data(mdio_dev, &mdio_data, 257 sizeof(struct gianfar_mdio_data)); 258 if (ret) 259 goto unreg; 260 } 261 262 of_node_put(np); 263 return 0; 264 265 unreg: 266 platform_device_unregister(mdio_dev); 267 err: 268 of_node_put(np); 269 return ret; 270 } 271 272 arch_initcall(gfar_mdio_of_init); 273 274 static const char *gfar_tx_intr = "tx"; 275 static const char *gfar_rx_intr = "rx"; 276 static const char *gfar_err_intr = "error"; 277 278 static int __init gfar_of_init(void) 279 { 280 struct device_node *np; 281 unsigned int i; 282 struct platform_device *gfar_dev; 283 struct resource res; 284 int ret; 285 286 for (np = NULL, i = 0; 287 (np = of_find_compatible_node(np, "network", "gianfar")) != NULL; 288 i++) { 289 struct resource r[4]; 290 struct device_node *phy, *mdio; 291 struct gianfar_platform_data gfar_data; 292 const unsigned int *id; 293 const char *model; 294 const char *ctype; 295 const void *mac_addr; 296 const phandle *ph; 297 int n_res = 2; 298 299 memset(r, 0, sizeof(r)); 300 memset(&gfar_data, 0, sizeof(gfar_data)); 301 302 ret = of_address_to_resource(np, 0, &r[0]); 303 if (ret) 304 goto err; 305 306 of_irq_to_resource(np, 0, &r[1]); 307 308 model = of_get_property(np, "model", NULL); 309 310 /* If we aren't the FEC we have multiple interrupts */ 311 if (model && strcasecmp(model, "FEC")) { 312 r[1].name = gfar_tx_intr; 313 314 r[2].name = gfar_rx_intr; 315 of_irq_to_resource(np, 1, &r[2]); 316 317 r[3].name = gfar_err_intr; 318 of_irq_to_resource(np, 2, &r[3]); 319 320 n_res += 2; 321 } 322 323 gfar_dev = 324 platform_device_register_simple("fsl-gianfar", i, &r[0], 325 n_res); 326 327 if (IS_ERR(gfar_dev)) { 328 ret = PTR_ERR(gfar_dev); 329 goto err; 330 } 331 332 mac_addr = of_get_mac_address(np); 333 if (mac_addr) 334 memcpy(gfar_data.mac_addr, mac_addr, 6); 335 336 if (model && !strcasecmp(model, "TSEC")) 337 gfar_data.device_flags = 338 FSL_GIANFAR_DEV_HAS_GIGABIT | 339 FSL_GIANFAR_DEV_HAS_COALESCE | 340 FSL_GIANFAR_DEV_HAS_RMON | 341 FSL_GIANFAR_DEV_HAS_MULTI_INTR; 342 if (model && !strcasecmp(model, "eTSEC")) 343 gfar_data.device_flags = 344 FSL_GIANFAR_DEV_HAS_GIGABIT | 345 FSL_GIANFAR_DEV_HAS_COALESCE | 346 FSL_GIANFAR_DEV_HAS_RMON | 347 FSL_GIANFAR_DEV_HAS_MULTI_INTR | 348 FSL_GIANFAR_DEV_HAS_CSUM | 349 FSL_GIANFAR_DEV_HAS_VLAN | 350 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH; 351 352 ctype = of_get_property(np, "phy-connection-type", NULL); 353 354 /* We only care about rgmii-id. The rest are autodetected */ 355 if (ctype && !strcmp(ctype, "rgmii-id")) 356 gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID; 357 else 358 gfar_data.interface = PHY_INTERFACE_MODE_MII; 359 360 ph = of_get_property(np, "phy-handle", NULL); 361 if (ph == NULL) { 362 u32 *fixed_link; 363 364 fixed_link = (u32 *)of_get_property(np, "fixed-link", 365 NULL); 366 if (!fixed_link) { 367 ret = -ENODEV; 368 goto unreg; 369 } 370 371 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0"); 372 gfar_data.phy_id = fixed_link[0]; 373 } else { 374 phy = of_find_node_by_phandle(*ph); 375 376 if (phy == NULL) { 377 ret = -ENODEV; 378 goto unreg; 379 } 380 381 mdio = of_get_parent(phy); 382 383 id = of_get_property(phy, "reg", NULL); 384 ret = of_address_to_resource(mdio, 0, &res); 385 if (ret) { 386 of_node_put(phy); 387 of_node_put(mdio); 388 goto unreg; 389 } 390 391 gfar_data.phy_id = *id; 392 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx", 393 (unsigned long long)res.start); 394 395 of_node_put(phy); 396 of_node_put(mdio); 397 } 398 399 ret = 400 platform_device_add_data(gfar_dev, &gfar_data, 401 sizeof(struct 402 gianfar_platform_data)); 403 if (ret) 404 goto unreg; 405 } 406 407 return 0; 408 409 unreg: 410 platform_device_unregister(gfar_dev); 411 err: 412 return ret; 413 } 414 415 arch_initcall(gfar_of_init); 416 417 #ifdef CONFIG_I2C_BOARDINFO 418 #include <linux/i2c.h> 419 struct i2c_driver_device { 420 char *of_device; 421 char *i2c_type; 422 }; 423 424 static struct i2c_driver_device i2c_devices[] __initdata = { 425 {"ricoh,rs5c372a", "rs5c372a"}, 426 {"ricoh,rs5c372b", "rs5c372b"}, 427 {"ricoh,rv5c386", "rv5c386"}, 428 {"ricoh,rv5c387a", "rv5c387a"}, 429 {"dallas,ds1307", "ds1307"}, 430 {"dallas,ds1337", "ds1337"}, 431 {"dallas,ds1338", "ds1338"}, 432 {"dallas,ds1339", "ds1339"}, 433 {"dallas,ds1340", "ds1340"}, 434 {"stm,m41t00", "m41t00"}, 435 {"dallas,ds1374", "rtc-ds1374"}, 436 }; 437 438 static int __init of_find_i2c_driver(struct device_node *node, 439 struct i2c_board_info *info) 440 { 441 int i; 442 443 for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) { 444 if (!of_device_is_compatible(node, i2c_devices[i].of_device)) 445 continue; 446 if (strlcpy(info->type, i2c_devices[i].i2c_type, 447 I2C_NAME_SIZE) >= I2C_NAME_SIZE) 448 return -ENOMEM; 449 return 0; 450 } 451 return -ENODEV; 452 } 453 454 static void __init of_register_i2c_devices(struct device_node *adap_node, 455 int bus_num) 456 { 457 struct device_node *node = NULL; 458 459 while ((node = of_get_next_child(adap_node, node))) { 460 struct i2c_board_info info = {}; 461 const u32 *addr; 462 int len; 463 464 addr = of_get_property(node, "reg", &len); 465 if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) { 466 printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n"); 467 continue; 468 } 469 470 info.irq = irq_of_parse_and_map(node, 0); 471 if (info.irq == NO_IRQ) 472 info.irq = -1; 473 474 if (of_find_i2c_driver(node, &info) < 0) 475 continue; 476 477 info.addr = *addr; 478 479 i2c_register_board_info(bus_num, &info, 1); 480 } 481 } 482 483 static int __init fsl_i2c_of_init(void) 484 { 485 struct device_node *np; 486 unsigned int i = 0; 487 struct platform_device *i2c_dev; 488 int ret; 489 490 for_each_compatible_node(np, NULL, "fsl-i2c") { 491 struct resource r[2]; 492 struct fsl_i2c_platform_data i2c_data; 493 const unsigned char *flags = NULL; 494 495 memset(&r, 0, sizeof(r)); 496 memset(&i2c_data, 0, sizeof(i2c_data)); 497 498 ret = of_address_to_resource(np, 0, &r[0]); 499 if (ret) 500 goto err; 501 502 of_irq_to_resource(np, 0, &r[1]); 503 504 i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); 505 if (IS_ERR(i2c_dev)) { 506 ret = PTR_ERR(i2c_dev); 507 goto err; 508 } 509 510 i2c_data.device_flags = 0; 511 flags = of_get_property(np, "dfsrr", NULL); 512 if (flags) 513 i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR; 514 515 flags = of_get_property(np, "fsl5200-clocking", NULL); 516 if (flags) 517 i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200; 518 519 ret = 520 platform_device_add_data(i2c_dev, &i2c_data, 521 sizeof(struct 522 fsl_i2c_platform_data)); 523 if (ret) 524 goto unreg; 525 526 of_register_i2c_devices(np, i++); 527 } 528 529 return 0; 530 531 unreg: 532 platform_device_unregister(i2c_dev); 533 err: 534 return ret; 535 } 536 537 arch_initcall(fsl_i2c_of_init); 538 #endif 539 540 #ifdef CONFIG_PPC_83xx 541 static int __init mpc83xx_wdt_init(void) 542 { 543 struct resource r; 544 struct device_node *np; 545 struct platform_device *dev; 546 u32 freq = fsl_get_sys_freq(); 547 int ret; 548 549 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt"); 550 551 if (!np) { 552 ret = -ENODEV; 553 goto nodev; 554 } 555 556 memset(&r, 0, sizeof(r)); 557 558 ret = of_address_to_resource(np, 0, &r); 559 if (ret) 560 goto err; 561 562 dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1); 563 if (IS_ERR(dev)) { 564 ret = PTR_ERR(dev); 565 goto err; 566 } 567 568 ret = platform_device_add_data(dev, &freq, sizeof(freq)); 569 if (ret) 570 goto unreg; 571 572 of_node_put(np); 573 return 0; 574 575 unreg: 576 platform_device_unregister(dev); 577 err: 578 of_node_put(np); 579 nodev: 580 return ret; 581 } 582 583 arch_initcall(mpc83xx_wdt_init); 584 #endif 585 586 static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type) 587 { 588 if (!phy_type) 589 return FSL_USB2_PHY_NONE; 590 if (!strcasecmp(phy_type, "ulpi")) 591 return FSL_USB2_PHY_ULPI; 592 if (!strcasecmp(phy_type, "utmi")) 593 return FSL_USB2_PHY_UTMI; 594 if (!strcasecmp(phy_type, "utmi_wide")) 595 return FSL_USB2_PHY_UTMI_WIDE; 596 if (!strcasecmp(phy_type, "serial")) 597 return FSL_USB2_PHY_SERIAL; 598 599 return FSL_USB2_PHY_NONE; 600 } 601 602 static int __init fsl_usb_of_init(void) 603 { 604 struct device_node *np; 605 unsigned int i = 0; 606 struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL, 607 *usb_dev_dr_client = NULL; 608 int ret; 609 610 for_each_compatible_node(np, NULL, "fsl-usb2-mph") { 611 struct resource r[2]; 612 struct fsl_usb2_platform_data usb_data; 613 const unsigned char *prop = NULL; 614 615 memset(&r, 0, sizeof(r)); 616 memset(&usb_data, 0, sizeof(usb_data)); 617 618 ret = of_address_to_resource(np, 0, &r[0]); 619 if (ret) 620 goto err; 621 622 of_irq_to_resource(np, 0, &r[1]); 623 624 usb_dev_mph = 625 platform_device_register_simple("fsl-ehci", i, r, 2); 626 if (IS_ERR(usb_dev_mph)) { 627 ret = PTR_ERR(usb_dev_mph); 628 goto err; 629 } 630 631 usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL; 632 usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask; 633 634 usb_data.operating_mode = FSL_USB2_MPH_HOST; 635 636 prop = of_get_property(np, "port0", NULL); 637 if (prop) 638 usb_data.port_enables |= FSL_USB2_PORT0_ENABLED; 639 640 prop = of_get_property(np, "port1", NULL); 641 if (prop) 642 usb_data.port_enables |= FSL_USB2_PORT1_ENABLED; 643 644 prop = of_get_property(np, "phy_type", NULL); 645 usb_data.phy_mode = determine_usb_phy(prop); 646 647 ret = 648 platform_device_add_data(usb_dev_mph, &usb_data, 649 sizeof(struct 650 fsl_usb2_platform_data)); 651 if (ret) 652 goto unreg_mph; 653 i++; 654 } 655 656 for_each_compatible_node(np, NULL, "fsl-usb2-dr") { 657 struct resource r[2]; 658 struct fsl_usb2_platform_data usb_data; 659 const unsigned char *prop = NULL; 660 661 memset(&r, 0, sizeof(r)); 662 memset(&usb_data, 0, sizeof(usb_data)); 663 664 ret = of_address_to_resource(np, 0, &r[0]); 665 if (ret) 666 goto unreg_mph; 667 668 of_irq_to_resource(np, 0, &r[1]); 669 670 prop = of_get_property(np, "dr_mode", NULL); 671 672 if (!prop || !strcmp(prop, "host")) { 673 usb_data.operating_mode = FSL_USB2_DR_HOST; 674 usb_dev_dr_host = platform_device_register_simple( 675 "fsl-ehci", i, r, 2); 676 if (IS_ERR(usb_dev_dr_host)) { 677 ret = PTR_ERR(usb_dev_dr_host); 678 goto err; 679 } 680 } else if (prop && !strcmp(prop, "peripheral")) { 681 usb_data.operating_mode = FSL_USB2_DR_DEVICE; 682 usb_dev_dr_client = platform_device_register_simple( 683 "fsl-usb2-udc", i, r, 2); 684 if (IS_ERR(usb_dev_dr_client)) { 685 ret = PTR_ERR(usb_dev_dr_client); 686 goto err; 687 } 688 } else if (prop && !strcmp(prop, "otg")) { 689 usb_data.operating_mode = FSL_USB2_DR_OTG; 690 usb_dev_dr_host = platform_device_register_simple( 691 "fsl-ehci", i, r, 2); 692 if (IS_ERR(usb_dev_dr_host)) { 693 ret = PTR_ERR(usb_dev_dr_host); 694 goto err; 695 } 696 usb_dev_dr_client = platform_device_register_simple( 697 "fsl-usb2-udc", i, r, 2); 698 if (IS_ERR(usb_dev_dr_client)) { 699 ret = PTR_ERR(usb_dev_dr_client); 700 goto err; 701 } 702 } else { 703 ret = -EINVAL; 704 goto err; 705 } 706 707 prop = of_get_property(np, "phy_type", NULL); 708 usb_data.phy_mode = determine_usb_phy(prop); 709 710 if (usb_dev_dr_host) { 711 usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL; 712 usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host-> 713 dev.coherent_dma_mask; 714 if ((ret = platform_device_add_data(usb_dev_dr_host, 715 &usb_data, sizeof(struct 716 fsl_usb2_platform_data)))) 717 goto unreg_dr; 718 } 719 if (usb_dev_dr_client) { 720 usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL; 721 usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client-> 722 dev.coherent_dma_mask; 723 if ((ret = platform_device_add_data(usb_dev_dr_client, 724 &usb_data, sizeof(struct 725 fsl_usb2_platform_data)))) 726 goto unreg_dr; 727 } 728 i++; 729 } 730 return 0; 731 732 unreg_dr: 733 if (usb_dev_dr_host) 734 platform_device_unregister(usb_dev_dr_host); 735 if (usb_dev_dr_client) 736 platform_device_unregister(usb_dev_dr_client); 737 unreg_mph: 738 if (usb_dev_mph) 739 platform_device_unregister(usb_dev_mph); 740 err: 741 return ret; 742 } 743 744 arch_initcall(fsl_usb_of_init); 745 746 static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, 747 struct spi_board_info *board_infos, 748 unsigned int num_board_infos, 749 void (*activate_cs)(u8 cs, u8 polarity), 750 void (*deactivate_cs)(u8 cs, u8 polarity)) 751 { 752 struct device_node *np; 753 unsigned int i = 0; 754 755 for_each_compatible_node(np, type, compatible) { 756 int ret; 757 unsigned int j; 758 const void *prop; 759 struct resource res[2]; 760 struct platform_device *pdev; 761 struct fsl_spi_platform_data pdata = { 762 .activate_cs = activate_cs, 763 .deactivate_cs = deactivate_cs, 764 }; 765 766 memset(res, 0, sizeof(res)); 767 768 pdata.sysclk = sysclk; 769 770 prop = of_get_property(np, "reg", NULL); 771 if (!prop) 772 goto err; 773 pdata.bus_num = *(u32 *)prop; 774 775 prop = of_get_property(np, "cell-index", NULL); 776 if (prop) 777 i = *(u32 *)prop; 778 779 prop = of_get_property(np, "mode", NULL); 780 if (prop && !strcmp(prop, "cpu-qe")) 781 pdata.qe_mode = 1; 782 783 for (j = 0; j < num_board_infos; j++) { 784 if (board_infos[j].bus_num == pdata.bus_num) 785 pdata.max_chipselect++; 786 } 787 788 if (!pdata.max_chipselect) 789 continue; 790 791 ret = of_address_to_resource(np, 0, &res[0]); 792 if (ret) 793 goto err; 794 795 ret = of_irq_to_resource(np, 0, &res[1]); 796 if (ret == NO_IRQ) 797 goto err; 798 799 pdev = platform_device_alloc("mpc83xx_spi", i); 800 if (!pdev) 801 goto err; 802 803 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata)); 804 if (ret) 805 goto unreg; 806 807 ret = platform_device_add_resources(pdev, res, 808 ARRAY_SIZE(res)); 809 if (ret) 810 goto unreg; 811 812 ret = platform_device_add(pdev); 813 if (ret) 814 goto unreg; 815 816 goto next; 817 unreg: 818 platform_device_del(pdev); 819 err: 820 pr_err("%s: registration failed\n", np->full_name); 821 next: 822 i++; 823 } 824 825 return i; 826 } 827 828 int __init fsl_spi_init(struct spi_board_info *board_infos, 829 unsigned int num_board_infos, 830 void (*activate_cs)(u8 cs, u8 polarity), 831 void (*deactivate_cs)(u8 cs, u8 polarity)) 832 { 833 u32 sysclk = -1; 834 int ret; 835 836 #ifdef CONFIG_QUICC_ENGINE 837 /* SPI controller is either clocked from QE or SoC clock */ 838 sysclk = get_brgfreq(); 839 #endif 840 if (sysclk == -1) { 841 sysclk = fsl_get_sys_freq(); 842 if (sysclk == -1) 843 return -ENODEV; 844 } 845 846 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos, 847 num_board_infos, activate_cs, deactivate_cs); 848 if (!ret) 849 of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos, 850 num_board_infos, activate_cs, deactivate_cs); 851 852 return spi_register_board_info(board_infos, num_board_infos); 853 } 854 855 #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) 856 static __be32 __iomem *rstcr; 857 858 static int __init setup_rstcr(void) 859 { 860 struct device_node *np; 861 np = of_find_node_by_name(NULL, "global-utilities"); 862 if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) { 863 const u32 *prop = of_get_property(np, "reg", NULL); 864 if (prop) { 865 /* map reset control register 866 * 0xE00B0 is offset of reset control register 867 */ 868 rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff); 869 if (!rstcr) 870 printk (KERN_EMERG "Error: reset control " 871 "register not mapped!\n"); 872 } 873 } else 874 printk (KERN_INFO "rstcr compatible register does not exist!\n"); 875 if (np) 876 of_node_put(np); 877 return 0; 878 } 879 880 arch_initcall(setup_rstcr); 881 882 void fsl_rstcr_restart(char *cmd) 883 { 884 local_irq_disable(); 885 if (rstcr) 886 /* set reset control register */ 887 out_be32(rstcr, 0x2); /* HRESET_REQ */ 888 889 while (1) ; 890 } 891 #endif 892 893 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 894 struct platform_diu_data_ops diu_ops = { 895 .diu_size = 1280 * 1024 * 4, /* default one 1280x1024 buffer */ 896 }; 897 EXPORT_SYMBOL(diu_ops); 898 899 int __init preallocate_diu_videomemory(void) 900 { 901 pr_debug("diu_size=%lu\n", diu_ops.diu_size); 902 903 diu_ops.diu_mem = __alloc_bootmem(diu_ops.diu_size, 8, 0); 904 if (!diu_ops.diu_mem) { 905 printk(KERN_ERR "fsl-diu: cannot allocate %lu bytes\n", 906 diu_ops.diu_size); 907 return -ENOMEM; 908 } 909 910 pr_debug("diu_mem=%p\n", diu_ops.diu_mem); 911 912 rh_init(&diu_ops.diu_rh_info, 4096, ARRAY_SIZE(diu_ops.diu_rh_block), 913 diu_ops.diu_rh_block); 914 return rh_attach_region(&diu_ops.diu_rh_info, 915 (unsigned long) diu_ops.diu_mem, 916 diu_ops.diu_size); 917 } 918 919 static int __init early_parse_diufb(char *p) 920 { 921 if (!p) 922 return 1; 923 924 diu_ops.diu_size = _ALIGN_UP(memparse(p, &p), 8); 925 926 pr_debug("diu_size=%lu\n", diu_ops.diu_size); 927 928 return 0; 929 } 930 early_param("diufb", early_parse_diufb); 931 932 #endif 933