xref: /openbmc/linux/arch/powerpc/sysdev/fsl_msi.c (revision 565d76cb) 
1 /*
2  * Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
3  *
4  * Author: Tony Li <tony.li@freescale.com>
5  *	   Jason Jin <Jason.jin@freescale.com>
6  *
7  * The hwirq alloc and free code reuse from sysdev/mpic_msi.c
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License
11  * as published by the Free Software Foundation; version 2 of the
12  * License.
13  *
14  */
15 #include <linux/irq.h>
16 #include <linux/bootmem.h>
17 #include <linux/msi.h>
18 #include <linux/pci.h>
19 #include <linux/slab.h>
20 #include <linux/of_platform.h>
21 #include <sysdev/fsl_soc.h>
22 #include <asm/prom.h>
23 #include <asm/hw_irq.h>
24 #include <asm/ppc-pci.h>
25 #include <asm/mpic.h>
26 #include "fsl_msi.h"
27 #include "fsl_pci.h"
28 
29 LIST_HEAD(msi_head);
30 
31 struct fsl_msi_feature {
32 	u32 fsl_pic_ip;
33 	u32 msiir_offset;
34 };
35 
36 struct fsl_msi_cascade_data {
37 	struct fsl_msi *msi_data;
38 	int index;
39 };
40 
41 static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
42 {
43 	return in_be32(base + (reg >> 2));
44 }
45 
46 /*
47  * We do not need this actually. The MSIR register has been read once
48  * in the cascade interrupt. So, this MSI interrupt has been acked
49 */
50 static void fsl_msi_end_irq(struct irq_data *d)
51 {
52 }
53 
54 static struct irq_chip fsl_msi_chip = {
55 	.irq_mask	= mask_msi_irq,
56 	.irq_unmask	= unmask_msi_irq,
57 	.irq_ack	= fsl_msi_end_irq,
58 	.name		= "FSL-MSI",
59 };
60 
61 static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
62 				irq_hw_number_t hw)
63 {
64 	struct fsl_msi *msi_data = h->host_data;
65 	struct irq_chip *chip = &fsl_msi_chip;
66 
67 	irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
68 
69 	set_irq_chip_data(virq, msi_data);
70 	set_irq_chip_and_handler(virq, chip, handle_edge_irq);
71 
72 	return 0;
73 }
74 
75 static struct irq_host_ops fsl_msi_host_ops = {
76 	.map = fsl_msi_host_map,
77 };
78 
79 static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
80 {
81 	int rc;
82 
83 	rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
84 			      msi_data->irqhost->of_node);
85 	if (rc)
86 		return rc;
87 
88 	rc = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
89 	if (rc < 0) {
90 		msi_bitmap_free(&msi_data->bitmap);
91 		return rc;
92 	}
93 
94 	return 0;
95 }
96 
97 static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
98 {
99 	if (type == PCI_CAP_ID_MSIX)
100 		pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
101 
102 	return 0;
103 }
104 
105 static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
106 {
107 	struct msi_desc *entry;
108 	struct fsl_msi *msi_data;
109 
110 	list_for_each_entry(entry, &pdev->msi_list, list) {
111 		if (entry->irq == NO_IRQ)
112 			continue;
113 		msi_data = get_irq_data(entry->irq);
114 		set_irq_msi(entry->irq, NULL);
115 		msi_bitmap_free_hwirqs(&msi_data->bitmap,
116 				       virq_to_hw(entry->irq), 1);
117 		irq_dispose_mapping(entry->irq);
118 	}
119 
120 	return;
121 }
122 
123 static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
124 				struct msi_msg *msg,
125 				struct fsl_msi *fsl_msi_data)
126 {
127 	struct fsl_msi *msi_data = fsl_msi_data;
128 	struct pci_controller *hose = pci_bus_to_host(pdev->bus);
129 	u64 base = fsl_pci_immrbar_base(hose);
130 
131 	msg->address_lo = msi_data->msi_addr_lo + lower_32_bits(base);
132 	msg->address_hi = msi_data->msi_addr_hi + upper_32_bits(base);
133 
134 	msg->data = hwirq;
135 
136 	pr_debug("%s: allocated srs: %d, ibs: %d\n",
137 		__func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
138 }
139 
140 static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
141 {
142 	int rc, hwirq = -ENOMEM;
143 	unsigned int virq;
144 	struct msi_desc *entry;
145 	struct msi_msg msg;
146 	struct fsl_msi *msi_data;
147 
148 	list_for_each_entry(entry, &pdev->msi_list, list) {
149 		list_for_each_entry(msi_data, &msi_head, list) {
150 			hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
151 			if (hwirq >= 0)
152 				break;
153 		}
154 
155 		if (hwirq < 0) {
156 			rc = hwirq;
157 			pr_debug("%s: fail allocating msi interrupt\n",
158 					__func__);
159 			goto out_free;
160 		}
161 
162 		virq = irq_create_mapping(msi_data->irqhost, hwirq);
163 
164 		if (virq == NO_IRQ) {
165 			pr_debug("%s: fail mapping hwirq 0x%x\n",
166 					__func__, hwirq);
167 			msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
168 			rc = -ENOSPC;
169 			goto out_free;
170 		}
171 		set_irq_data(virq, msi_data);
172 		set_irq_msi(virq, entry);
173 
174 		fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data);
175 		write_msi_msg(virq, &msg);
176 	}
177 	return 0;
178 
179 out_free:
180 	/* free by the caller of this function */
181 	return rc;
182 }
183 
184 static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
185 {
186 	struct irq_chip *chip = get_irq_desc_chip(desc);
187 	unsigned int cascade_irq;
188 	struct fsl_msi *msi_data;
189 	int msir_index = -1;
190 	u32 msir_value = 0;
191 	u32 intr_index;
192 	u32 have_shift = 0;
193 	struct fsl_msi_cascade_data *cascade_data;
194 
195 	cascade_data = (struct fsl_msi_cascade_data *)get_irq_data(irq);
196 	msi_data = cascade_data->msi_data;
197 
198 	raw_spin_lock(&desc->lock);
199 	if ((msi_data->feature &  FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
200 		if (chip->irq_mask_ack)
201 			chip->irq_mask_ack(&desc->irq_data);
202 		else {
203 			chip->irq_mask(&desc->irq_data);
204 			chip->irq_ack(&desc->irq_data);
205 		}
206 	}
207 
208 	if (unlikely(desc->status & IRQ_INPROGRESS))
209 		goto unlock;
210 
211 	msir_index = cascade_data->index;
212 
213 	if (msir_index >= NR_MSI_REG)
214 		cascade_irq = NO_IRQ;
215 
216 	desc->status |= IRQ_INPROGRESS;
217 	switch (msi_data->feature & FSL_PIC_IP_MASK) {
218 	case FSL_PIC_IP_MPIC:
219 		msir_value = fsl_msi_read(msi_data->msi_regs,
220 			msir_index * 0x10);
221 		break;
222 	case FSL_PIC_IP_IPIC:
223 		msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
224 		break;
225 	}
226 
227 	while (msir_value) {
228 		intr_index = ffs(msir_value) - 1;
229 
230 		cascade_irq = irq_linear_revmap(msi_data->irqhost,
231 				msir_index * IRQS_PER_MSI_REG +
232 					intr_index + have_shift);
233 		if (cascade_irq != NO_IRQ)
234 			generic_handle_irq(cascade_irq);
235 		have_shift += intr_index + 1;
236 		msir_value = msir_value >> (intr_index + 1);
237 	}
238 	desc->status &= ~IRQ_INPROGRESS;
239 
240 	switch (msi_data->feature & FSL_PIC_IP_MASK) {
241 	case FSL_PIC_IP_MPIC:
242 		chip->irq_eoi(&desc->irq_data);
243 		break;
244 	case FSL_PIC_IP_IPIC:
245 		if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask)
246 			chip->irq_unmask(&desc->irq_data);
247 		break;
248 	}
249 unlock:
250 	raw_spin_unlock(&desc->lock);
251 }
252 
253 static int fsl_of_msi_remove(struct platform_device *ofdev)
254 {
255 	struct fsl_msi *msi = ofdev->dev.platform_data;
256 	int virq, i;
257 	struct fsl_msi_cascade_data *cascade_data;
258 
259 	if (msi->list.prev != NULL)
260 		list_del(&msi->list);
261 	for (i = 0; i < NR_MSI_REG; i++) {
262 		virq = msi->msi_virqs[i];
263 		if (virq != NO_IRQ) {
264 			cascade_data = get_irq_data(virq);
265 			kfree(cascade_data);
266 			irq_dispose_mapping(virq);
267 		}
268 	}
269 	if (msi->bitmap.bitmap)
270 		msi_bitmap_free(&msi->bitmap);
271 	iounmap(msi->msi_regs);
272 	kfree(msi);
273 
274 	return 0;
275 }
276 
277 static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi,
278 					 struct platform_device *dev,
279 					 int offset, int irq_index)
280 {
281 	struct fsl_msi_cascade_data *cascade_data = NULL;
282 	int virt_msir;
283 
284 	virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
285 	if (virt_msir == NO_IRQ) {
286 		dev_err(&dev->dev, "%s: Cannot translate IRQ index %d\n",
287 			__func__, irq_index);
288 		return 0;
289 	}
290 
291 	cascade_data = kzalloc(sizeof(struct fsl_msi_cascade_data), GFP_KERNEL);
292 	if (!cascade_data) {
293 		dev_err(&dev->dev, "No memory for MSI cascade data\n");
294 		return -ENOMEM;
295 	}
296 
297 	msi->msi_virqs[irq_index] = virt_msir;
298 	cascade_data->index = offset + irq_index;
299 	cascade_data->msi_data = msi;
300 	set_irq_data(virt_msir, cascade_data);
301 	set_irq_chained_handler(virt_msir, fsl_msi_cascade);
302 
303 	return 0;
304 }
305 
306 static int __devinit fsl_of_msi_probe(struct platform_device *dev)
307 {
308 	struct fsl_msi *msi;
309 	struct resource res;
310 	int err, i, j, irq_index, count;
311 	int rc;
312 	const u32 *p;
313 	struct fsl_msi_feature *features;
314 	int len;
315 	u32 offset;
316 	static const u32 all_avail[] = { 0, NR_MSI_IRQS };
317 
318 	if (!dev->dev.of_match)
319 		return -EINVAL;
320 	features = dev->dev.of_match->data;
321 
322 	printk(KERN_DEBUG "Setting up Freescale MSI support\n");
323 
324 	msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL);
325 	if (!msi) {
326 		dev_err(&dev->dev, "No memory for MSI structure\n");
327 		return -ENOMEM;
328 	}
329 	dev->dev.platform_data = msi;
330 
331 	msi->irqhost = irq_alloc_host(dev->dev.of_node, IRQ_HOST_MAP_LINEAR,
332 				      NR_MSI_IRQS, &fsl_msi_host_ops, 0);
333 
334 	if (msi->irqhost == NULL) {
335 		dev_err(&dev->dev, "No memory for MSI irqhost\n");
336 		err = -ENOMEM;
337 		goto error_out;
338 	}
339 
340 	/* Get the MSI reg base */
341 	err = of_address_to_resource(dev->dev.of_node, 0, &res);
342 	if (err) {
343 		dev_err(&dev->dev, "%s resource error!\n",
344 				dev->dev.of_node->full_name);
345 		goto error_out;
346 	}
347 
348 	msi->msi_regs = ioremap(res.start, res.end - res.start + 1);
349 	if (!msi->msi_regs) {
350 		dev_err(&dev->dev, "ioremap problem failed\n");
351 		goto error_out;
352 	}
353 
354 	msi->feature = features->fsl_pic_ip;
355 
356 	msi->irqhost->host_data = msi;
357 
358 	msi->msi_addr_hi = 0x0;
359 	msi->msi_addr_lo = features->msiir_offset + (res.start & 0xfffff);
360 
361 	rc = fsl_msi_init_allocator(msi);
362 	if (rc) {
363 		dev_err(&dev->dev, "Error allocating MSI bitmap\n");
364 		goto error_out;
365 	}
366 
367 	p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
368 	if (p && len % (2 * sizeof(u32)) != 0) {
369 		dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
370 			__func__);
371 		err = -EINVAL;
372 		goto error_out;
373 	}
374 
375 	if (!p)
376 		p = all_avail;
377 
378 	for (irq_index = 0, i = 0; i < len / (2 * sizeof(u32)); i++) {
379 		if (p[i * 2] % IRQS_PER_MSI_REG ||
380 		    p[i * 2 + 1] % IRQS_PER_MSI_REG) {
381 			printk(KERN_WARNING "%s: %s: msi available range of %u at %u is not IRQ-aligned\n",
382 			       __func__, dev->dev.of_node->full_name,
383 			       p[i * 2 + 1], p[i * 2]);
384 			err = -EINVAL;
385 			goto error_out;
386 		}
387 
388 		offset = p[i * 2] / IRQS_PER_MSI_REG;
389 		count = p[i * 2 + 1] / IRQS_PER_MSI_REG;
390 
391 		for (j = 0; j < count; j++, irq_index++) {
392 			err = fsl_msi_setup_hwirq(msi, dev, offset, irq_index);
393 			if (err)
394 				goto error_out;
395 		}
396 	}
397 
398 	list_add_tail(&msi->list, &msi_head);
399 
400 	/* The multiple setting ppc_md.setup_msi_irqs will not harm things */
401 	if (!ppc_md.setup_msi_irqs) {
402 		ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
403 		ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
404 		ppc_md.msi_check_device = fsl_msi_check_device;
405 	} else if (ppc_md.setup_msi_irqs != fsl_setup_msi_irqs) {
406 		dev_err(&dev->dev, "Different MSI driver already installed!\n");
407 		err = -ENODEV;
408 		goto error_out;
409 	}
410 	return 0;
411 error_out:
412 	fsl_of_msi_remove(dev);
413 	return err;
414 }
415 
416 static const struct fsl_msi_feature mpic_msi_feature = {
417 	.fsl_pic_ip = FSL_PIC_IP_MPIC,
418 	.msiir_offset = 0x140,
419 };
420 
421 static const struct fsl_msi_feature ipic_msi_feature = {
422 	.fsl_pic_ip = FSL_PIC_IP_IPIC,
423 	.msiir_offset = 0x38,
424 };
425 
426 static const struct of_device_id fsl_of_msi_ids[] = {
427 	{
428 		.compatible = "fsl,mpic-msi",
429 		.data = (void *)&mpic_msi_feature,
430 	},
431 	{
432 		.compatible = "fsl,ipic-msi",
433 		.data = (void *)&ipic_msi_feature,
434 	},
435 	{}
436 };
437 
438 static struct platform_driver fsl_of_msi_driver = {
439 	.driver = {
440 		.name = "fsl-msi",
441 		.owner = THIS_MODULE,
442 		.of_match_table = fsl_of_msi_ids,
443 	},
444 	.probe = fsl_of_msi_probe,
445 	.remove = fsl_of_msi_remove,
446 };
447 
448 static __init int fsl_of_msi_init(void)
449 {
450 	return platform_driver_register(&fsl_of_msi_driver);
451 }
452 
453 subsys_initcall(fsl_of_msi_init);
454