1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * SMP support for pSeries machines.
4  *
5  * Dave Engebretsen, Peter Bergner, and
6  * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
7  *
8  * Plus various changes from other IBM teams...
9  */
10 
11 
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/smp.h>
15 #include <linux/interrupt.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/spinlock.h>
19 #include <linux/cache.h>
20 #include <linux/err.h>
21 #include <linux/device.h>
22 #include <linux/cpu.h>
23 #include <linux/pgtable.h>
24 
25 #include <asm/ptrace.h>
26 #include <linux/atomic.h>
27 #include <asm/irq.h>
28 #include <asm/page.h>
29 #include <asm/io.h>
30 #include <asm/prom.h>
31 #include <asm/smp.h>
32 #include <asm/paca.h>
33 #include <asm/machdep.h>
34 #include <asm/cputable.h>
35 #include <asm/firmware.h>
36 #include <asm/rtas.h>
37 #include <asm/vdso_datapage.h>
38 #include <asm/cputhreads.h>
39 #include <asm/xics.h>
40 #include <asm/xive.h>
41 #include <asm/dbell.h>
42 #include <asm/plpar_wrappers.h>
43 #include <asm/code-patching.h>
44 #include <asm/svm.h>
45 #include <asm/kvm_guest.h>
46 
47 #include "pseries.h"
48 
49 /*
50  * The Primary thread of each non-boot processor was started from the OF client
51  * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop.
52  */
53 static cpumask_var_t of_spin_mask;
54 
55 /* Query where a cpu is now.  Return codes #defined in plpar_wrappers.h */
56 int smp_query_cpu_stopped(unsigned int pcpu)
57 {
58 	int cpu_status, status;
59 	int qcss_tok = rtas_token("query-cpu-stopped-state");
60 
61 	if (qcss_tok == RTAS_UNKNOWN_SERVICE) {
62 		printk_once(KERN_INFO
63 			"Firmware doesn't support query-cpu-stopped-state\n");
64 		return QCSS_HARDWARE_ERROR;
65 	}
66 
67 	status = rtas_call(qcss_tok, 1, 2, &cpu_status, pcpu);
68 	if (status != 0) {
69 		printk(KERN_ERR
70 		       "RTAS query-cpu-stopped-state failed: %i\n", status);
71 		return status;
72 	}
73 
74 	return cpu_status;
75 }
76 
77 /**
78  * smp_startup_cpu() - start the given cpu
79  *
80  * At boot time, there is nothing to do for primary threads which were
81  * started from Open Firmware.  For anything else, call RTAS with the
82  * appropriate start location.
83  *
84  * Returns:
85  *	0	- failure
86  *	1	- success
87  */
88 static inline int smp_startup_cpu(unsigned int lcpu)
89 {
90 	int status;
91 	unsigned long start_here =
92 			__pa(ppc_function_entry(generic_secondary_smp_init));
93 	unsigned int pcpu;
94 	int start_cpu;
95 
96 	if (cpumask_test_cpu(lcpu, of_spin_mask))
97 		/* Already started by OF and sitting in spin loop */
98 		return 1;
99 
100 	pcpu = get_hard_smp_processor_id(lcpu);
101 
102 	/* Check to see if the CPU out of FW already for kexec */
103 	if (smp_query_cpu_stopped(pcpu) == QCSS_NOT_STOPPED){
104 		cpumask_set_cpu(lcpu, of_spin_mask);
105 		return 1;
106 	}
107 
108 	/* Fixup atomic count: it exited inside IRQ handler. */
109 	task_thread_info(paca_ptrs[lcpu]->__current)->preempt_count	= 0;
110 
111 	/*
112 	 * If the RTAS start-cpu token does not exist then presume the
113 	 * cpu is already spinning.
114 	 */
115 	start_cpu = rtas_token("start-cpu");
116 	if (start_cpu == RTAS_UNKNOWN_SERVICE)
117 		return 1;
118 
119 	status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, pcpu);
120 	if (status != 0) {
121 		printk(KERN_ERR "start-cpu failed: %i\n", status);
122 		return 0;
123 	}
124 
125 	return 1;
126 }
127 
128 static void smp_setup_cpu(int cpu)
129 {
130 	if (xive_enabled())
131 		xive_smp_setup_cpu();
132 	else if (cpu != boot_cpuid)
133 		xics_setup_cpu();
134 
135 	if (firmware_has_feature(FW_FEATURE_SPLPAR))
136 		vpa_init(cpu);
137 
138 	cpumask_clear_cpu(cpu, of_spin_mask);
139 }
140 
141 static int smp_pSeries_kick_cpu(int nr)
142 {
143 	if (nr < 0 || nr >= nr_cpu_ids)
144 		return -EINVAL;
145 
146 	if (!smp_startup_cpu(nr))
147 		return -ENOENT;
148 
149 	/*
150 	 * The processor is currently spinning, waiting for the
151 	 * cpu_start field to become non-zero After we set cpu_start,
152 	 * the processor will continue on to secondary_start
153 	 */
154 	paca_ptrs[nr]->cpu_start = 1;
155 
156 	return 0;
157 }
158 
159 static int pseries_smp_prepare_cpu(int cpu)
160 {
161 	if (xive_enabled())
162 		return xive_smp_prepare_cpu(cpu);
163 	return 0;
164 }
165 
166 /* Cause IPI as setup by the interrupt controller (xics or xive) */
167 static void (*ic_cause_ipi)(int cpu) __ro_after_init;
168 
169 /* Use msgsndp doorbells target is a sibling, else use interrupt controller */
170 static void dbell_or_ic_cause_ipi(int cpu)
171 {
172 	if (doorbell_try_core_ipi(cpu))
173 		return;
174 
175 	ic_cause_ipi(cpu);
176 }
177 
178 static int pseries_cause_nmi_ipi(int cpu)
179 {
180 	int hwcpu;
181 
182 	if (cpu == NMI_IPI_ALL_OTHERS) {
183 		hwcpu = H_SIGNAL_SYS_RESET_ALL_OTHERS;
184 	} else {
185 		if (cpu < 0) {
186 			WARN_ONCE(true, "incorrect cpu parameter %d", cpu);
187 			return 0;
188 		}
189 
190 		hwcpu = get_hard_smp_processor_id(cpu);
191 	}
192 
193 	if (plpar_signal_sys_reset(hwcpu) == H_SUCCESS)
194 		return 1;
195 
196 	return 0;
197 }
198 
199 static __init void pSeries_smp_probe(void)
200 {
201 	if (xive_enabled())
202 		xive_smp_probe();
203 	else
204 		xics_smp_probe();
205 
206 	/* No doorbell facility, must use the interrupt controller for IPIs */
207 	if (!cpu_has_feature(CPU_FTR_DBELL))
208 		return;
209 
210 	/* Doorbells can only be used for IPIs between SMT siblings */
211 	if (!cpu_has_feature(CPU_FTR_SMT))
212 		return;
213 
214 	if (check_kvm_guest()) {
215 		/*
216 		 * KVM emulates doorbells by disabling FSCR[MSGP] so msgsndp
217 		 * faults to the hypervisor which then reads the instruction
218 		 * from guest memory, which tends to be slower than using XIVE.
219 		 */
220 		if (xive_enabled())
221 			return;
222 
223 		/*
224 		 * XICS hcalls aren't as fast, so we can use msgsndp (which
225 		 * also helps exercise KVM emulation), however KVM can't
226 		 * emulate secure guests because it can't read the instruction
227 		 * out of their memory.
228 		 */
229 		if (is_secure_guest())
230 			return;
231 	}
232 
233 	/*
234 	 * Under PowerVM, FSCR[MSGP] is enabled as guest vCPU siblings are
235 	 * gang scheduled on the same physical core, so doorbells are always
236 	 * faster than the interrupt controller, and they can be used by
237 	 * secure guests.
238 	 */
239 
240 	ic_cause_ipi = smp_ops->cause_ipi;
241 	smp_ops->cause_ipi = dbell_or_ic_cause_ipi;
242 }
243 
244 static struct smp_ops_t pseries_smp_ops = {
245 	.message_pass	= NULL,	/* Use smp_muxed_ipi_message_pass */
246 	.cause_ipi	= NULL,	/* Filled at runtime by pSeries_smp_probe() */
247 	.cause_nmi_ipi	= pseries_cause_nmi_ipi,
248 	.probe		= pSeries_smp_probe,
249 	.prepare_cpu	= pseries_smp_prepare_cpu,
250 	.kick_cpu	= smp_pSeries_kick_cpu,
251 	.setup_cpu	= smp_setup_cpu,
252 	.cpu_bootable	= smp_generic_cpu_bootable,
253 };
254 
255 /* This is called very early */
256 void __init smp_init_pseries(void)
257 {
258 	int i;
259 
260 	pr_debug(" -> smp_init_pSeries()\n");
261 	smp_ops = &pseries_smp_ops;
262 
263 	alloc_bootmem_cpumask_var(&of_spin_mask);
264 
265 	/*
266 	 * Mark threads which are still spinning in hold loops
267 	 *
268 	 * We know prom_init will not have started them if RTAS supports
269 	 * query-cpu-stopped-state.
270 	 */
271 	if (rtas_token("query-cpu-stopped-state") == RTAS_UNKNOWN_SERVICE) {
272 		if (cpu_has_feature(CPU_FTR_SMT)) {
273 			for_each_present_cpu(i) {
274 				if (cpu_thread_in_core(i) == 0)
275 					cpumask_set_cpu(i, of_spin_mask);
276 			}
277 		} else
278 			cpumask_copy(of_spin_mask, cpu_present_mask);
279 
280 		cpumask_clear_cpu(boot_cpuid, of_spin_mask);
281 	}
282 
283 	/* Non-lpar has additional take/give timebase */
284 	if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
285 		smp_ops->give_timebase = rtas_give_timebase;
286 		smp_ops->take_timebase = rtas_take_timebase;
287 	}
288 
289 	pr_debug(" <- smp_init_pSeries()\n");
290 }
291