1 /* 2 * 64-bit pSeries and RS/6000 setup code. 3 * 4 * Copyright (C) 1995 Linus Torvalds 5 * Adapted from 'alpha' version by Gary Thomas 6 * Modified by Cort Dougan (cort@cs.nmt.edu) 7 * Modified by PPC64 Team, IBM Corp 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 12 * 2 of the License, or (at your option) any later version. 13 */ 14 15 /* 16 * bootup setup stuff.. 17 */ 18 19 #include <linux/cpu.h> 20 #include <linux/errno.h> 21 #include <linux/sched.h> 22 #include <linux/kernel.h> 23 #include <linux/mm.h> 24 #include <linux/stddef.h> 25 #include <linux/unistd.h> 26 #include <linux/user.h> 27 #include <linux/tty.h> 28 #include <linux/major.h> 29 #include <linux/interrupt.h> 30 #include <linux/reboot.h> 31 #include <linux/init.h> 32 #include <linux/ioport.h> 33 #include <linux/console.h> 34 #include <linux/pci.h> 35 #include <linux/utsname.h> 36 #include <linux/adb.h> 37 #include <linux/export.h> 38 #include <linux/delay.h> 39 #include <linux/irq.h> 40 #include <linux/seq_file.h> 41 #include <linux/root_dev.h> 42 #include <linux/of.h> 43 #include <linux/of_pci.h> 44 #include <linux/memblock.h> 45 46 #include <asm/mmu.h> 47 #include <asm/processor.h> 48 #include <asm/io.h> 49 #include <asm/pgtable.h> 50 #include <asm/prom.h> 51 #include <asm/rtas.h> 52 #include <asm/pci-bridge.h> 53 #include <asm/iommu.h> 54 #include <asm/dma.h> 55 #include <asm/machdep.h> 56 #include <asm/irq.h> 57 #include <asm/time.h> 58 #include <asm/nvram.h> 59 #include <asm/pmc.h> 60 #include <asm/xics.h> 61 #include <asm/xive.h> 62 #include <asm/ppc-pci.h> 63 #include <asm/i8259.h> 64 #include <asm/udbg.h> 65 #include <asm/smp.h> 66 #include <asm/firmware.h> 67 #include <asm/eeh.h> 68 #include <asm/reg.h> 69 #include <asm/plpar_wrappers.h> 70 #include <asm/kexec.h> 71 #include <asm/isa-bridge.h> 72 #include <asm/security_features.h> 73 #include <asm/asm-const.h> 74 75 #include "pseries.h" 76 #include "../../../../drivers/pci/pci.h" 77 78 int CMO_PrPSP = -1; 79 int CMO_SecPSP = -1; 80 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); 81 EXPORT_SYMBOL(CMO_PageSize); 82 83 int fwnmi_active; /* TRUE if an FWNMI handler is present */ 84 85 static void pSeries_show_cpuinfo(struct seq_file *m) 86 { 87 struct device_node *root; 88 const char *model = ""; 89 90 root = of_find_node_by_path("/"); 91 if (root) 92 model = of_get_property(root, "model", NULL); 93 seq_printf(m, "machine\t\t: CHRP %s\n", model); 94 of_node_put(root); 95 if (radix_enabled()) 96 seq_printf(m, "MMU\t\t: Radix\n"); 97 else 98 seq_printf(m, "MMU\t\t: Hash\n"); 99 } 100 101 /* Initialize firmware assisted non-maskable interrupts if 102 * the firmware supports this feature. 103 */ 104 static void __init fwnmi_init(void) 105 { 106 unsigned long system_reset_addr, machine_check_addr; 107 u8 *mce_data_buf; 108 unsigned int i; 109 int nr_cpus = num_possible_cpus(); 110 111 int ibm_nmi_register = rtas_token("ibm,nmi-register"); 112 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) 113 return; 114 115 /* If the kernel's not linked at zero we point the firmware at low 116 * addresses anyway, and use a trampoline to get to the real code. */ 117 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; 118 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; 119 120 if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, 121 machine_check_addr)) 122 fwnmi_active = 1; 123 124 /* 125 * Allocate a chunk for per cpu buffer to hold rtas errorlog. 126 * It will be used in real mode mce handler, hence it needs to be 127 * below RMA. 128 */ 129 mce_data_buf = __va(memblock_alloc_base(RTAS_ERROR_LOG_MAX * nr_cpus, 130 RTAS_ERROR_LOG_MAX, ppc64_rma_size)); 131 for_each_possible_cpu(i) { 132 paca_ptrs[i]->mce_data_buf = mce_data_buf + 133 (RTAS_ERROR_LOG_MAX * i); 134 } 135 } 136 137 static void pseries_8259_cascade(struct irq_desc *desc) 138 { 139 struct irq_chip *chip = irq_desc_get_chip(desc); 140 unsigned int cascade_irq = i8259_irq(); 141 142 if (cascade_irq) 143 generic_handle_irq(cascade_irq); 144 145 chip->irq_eoi(&desc->irq_data); 146 } 147 148 static void __init pseries_setup_i8259_cascade(void) 149 { 150 struct device_node *np, *old, *found = NULL; 151 unsigned int cascade; 152 const u32 *addrp; 153 unsigned long intack = 0; 154 int naddr; 155 156 for_each_node_by_type(np, "interrupt-controller") { 157 if (of_device_is_compatible(np, "chrp,iic")) { 158 found = np; 159 break; 160 } 161 } 162 163 if (found == NULL) { 164 printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); 165 return; 166 } 167 168 cascade = irq_of_parse_and_map(found, 0); 169 if (!cascade) { 170 printk(KERN_ERR "pic: failed to map cascade interrupt"); 171 return; 172 } 173 pr_debug("pic: cascade mapped to irq %d\n", cascade); 174 175 for (old = of_node_get(found); old != NULL ; old = np) { 176 np = of_get_parent(old); 177 of_node_put(old); 178 if (np == NULL) 179 break; 180 if (strcmp(np->name, "pci") != 0) 181 continue; 182 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 183 if (addrp == NULL) 184 continue; 185 naddr = of_n_addr_cells(np); 186 intack = addrp[naddr-1]; 187 if (naddr > 1) 188 intack |= ((unsigned long)addrp[naddr-2]) << 32; 189 } 190 if (intack) 191 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 192 i8259_init(found, intack); 193 of_node_put(found); 194 irq_set_chained_handler(cascade, pseries_8259_cascade); 195 } 196 197 static void __init pseries_init_irq(void) 198 { 199 /* Try using a XIVE if available, otherwise use a XICS */ 200 if (!xive_spapr_init()) { 201 xics_init(); 202 pseries_setup_i8259_cascade(); 203 } 204 } 205 206 static void pseries_lpar_enable_pmcs(void) 207 { 208 unsigned long set, reset; 209 210 set = 1UL << 63; 211 reset = 0; 212 plpar_hcall_norets(H_PERFMON, set, reset); 213 } 214 215 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) 216 { 217 struct of_reconfig_data *rd = data; 218 struct device_node *parent, *np = rd->dn; 219 struct pci_dn *pdn; 220 int err = NOTIFY_OK; 221 222 switch (action) { 223 case OF_RECONFIG_ATTACH_NODE: 224 parent = of_get_parent(np); 225 pdn = parent ? PCI_DN(parent) : NULL; 226 if (pdn) 227 pci_add_device_node_info(pdn->phb, np); 228 229 of_node_put(parent); 230 break; 231 case OF_RECONFIG_DETACH_NODE: 232 pdn = PCI_DN(np); 233 if (pdn) 234 list_del(&pdn->list); 235 break; 236 default: 237 err = NOTIFY_DONE; 238 break; 239 } 240 return err; 241 } 242 243 static struct notifier_block pci_dn_reconfig_nb = { 244 .notifier_call = pci_dn_reconfig_notifier, 245 }; 246 247 struct kmem_cache *dtl_cache; 248 249 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 250 /* 251 * Allocate space for the dispatch trace log for all possible cpus 252 * and register the buffers with the hypervisor. This is used for 253 * computing time stolen by the hypervisor. 254 */ 255 static int alloc_dispatch_logs(void) 256 { 257 int cpu, ret; 258 struct paca_struct *pp; 259 struct dtl_entry *dtl; 260 261 if (!firmware_has_feature(FW_FEATURE_SPLPAR)) 262 return 0; 263 264 if (!dtl_cache) 265 return 0; 266 267 for_each_possible_cpu(cpu) { 268 pp = paca_ptrs[cpu]; 269 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL); 270 if (!dtl) { 271 pr_warn("Failed to allocate dispatch trace log for cpu %d\n", 272 cpu); 273 pr_warn("Stolen time statistics will be unreliable\n"); 274 break; 275 } 276 277 pp->dtl_ridx = 0; 278 pp->dispatch_log = dtl; 279 pp->dispatch_log_end = dtl + N_DISPATCH_LOG; 280 pp->dtl_curr = dtl; 281 } 282 283 /* Register the DTL for the current (boot) cpu */ 284 dtl = get_paca()->dispatch_log; 285 get_paca()->dtl_ridx = 0; 286 get_paca()->dtl_curr = dtl; 287 get_paca()->lppaca_ptr->dtl_idx = 0; 288 289 /* hypervisor reads buffer length from this field */ 290 dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES); 291 ret = register_dtl(hard_smp_processor_id(), __pa(dtl)); 292 if (ret) 293 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed " 294 "with %d\n", smp_processor_id(), 295 hard_smp_processor_id(), ret); 296 get_paca()->lppaca_ptr->dtl_enable_mask = 2; 297 298 return 0; 299 } 300 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 301 static inline int alloc_dispatch_logs(void) 302 { 303 return 0; 304 } 305 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 306 307 static int alloc_dispatch_log_kmem_cache(void) 308 { 309 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, 310 DISPATCH_LOG_BYTES, 0, NULL); 311 if (!dtl_cache) { 312 pr_warn("Failed to create dispatch trace log buffer cache\n"); 313 pr_warn("Stolen time statistics will be unreliable\n"); 314 return 0; 315 } 316 317 return alloc_dispatch_logs(); 318 } 319 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); 320 321 static void pseries_lpar_idle(void) 322 { 323 /* 324 * Default handler to go into low thread priority and possibly 325 * low power mode by ceding processor to hypervisor 326 */ 327 328 /* Indicate to hypervisor that we are idle. */ 329 get_lppaca()->idle = 1; 330 331 /* 332 * Yield the processor to the hypervisor. We return if 333 * an external interrupt occurs (which are driven prior 334 * to returning here) or if a prod occurs from another 335 * processor. When returning here, external interrupts 336 * are enabled. 337 */ 338 cede_processor(); 339 340 get_lppaca()->idle = 0; 341 } 342 343 /* 344 * Enable relocation on during exceptions. This has partition wide scope and 345 * may take a while to complete, if it takes longer than one second we will 346 * just give up rather than wasting any more time on this - if that turns out 347 * to ever be a problem in practice we can move this into a kernel thread to 348 * finish off the process later in boot. 349 */ 350 void pseries_enable_reloc_on_exc(void) 351 { 352 long rc; 353 unsigned int delay, total_delay = 0; 354 355 while (1) { 356 rc = enable_reloc_on_exceptions(); 357 if (!H_IS_LONG_BUSY(rc)) { 358 if (rc == H_P2) { 359 pr_info("Relocation on exceptions not" 360 " supported\n"); 361 } else if (rc != H_SUCCESS) { 362 pr_warn("Unable to enable relocation" 363 " on exceptions: %ld\n", rc); 364 } 365 break; 366 } 367 368 delay = get_longbusy_msecs(rc); 369 total_delay += delay; 370 if (total_delay > 1000) { 371 pr_warn("Warning: Giving up waiting to enable " 372 "relocation on exceptions (%u msec)!\n", 373 total_delay); 374 return; 375 } 376 377 mdelay(delay); 378 } 379 } 380 EXPORT_SYMBOL(pseries_enable_reloc_on_exc); 381 382 void pseries_disable_reloc_on_exc(void) 383 { 384 long rc; 385 386 while (1) { 387 rc = disable_reloc_on_exceptions(); 388 if (!H_IS_LONG_BUSY(rc)) 389 break; 390 mdelay(get_longbusy_msecs(rc)); 391 } 392 if (rc != H_SUCCESS) 393 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", 394 rc); 395 } 396 EXPORT_SYMBOL(pseries_disable_reloc_on_exc); 397 398 #ifdef CONFIG_KEXEC_CORE 399 static void pSeries_machine_kexec(struct kimage *image) 400 { 401 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 402 pseries_disable_reloc_on_exc(); 403 404 default_machine_kexec(image); 405 } 406 #endif 407 408 #ifdef __LITTLE_ENDIAN__ 409 void pseries_big_endian_exceptions(void) 410 { 411 long rc; 412 413 while (1) { 414 rc = enable_big_endian_exceptions(); 415 if (!H_IS_LONG_BUSY(rc)) 416 break; 417 mdelay(get_longbusy_msecs(rc)); 418 } 419 420 /* 421 * At this point it is unlikely panic() will get anything 422 * out to the user, since this is called very late in kexec 423 * but at least this will stop us from continuing on further 424 * and creating an even more difficult to debug situation. 425 * 426 * There is a known problem when kdump'ing, if cpus are offline 427 * the above call will fail. Rather than panicking again, keep 428 * going and hope the kdump kernel is also little endian, which 429 * it usually is. 430 */ 431 if (rc && !kdump_in_progress()) 432 panic("Could not enable big endian exceptions"); 433 } 434 435 void pseries_little_endian_exceptions(void) 436 { 437 long rc; 438 439 while (1) { 440 rc = enable_little_endian_exceptions(); 441 if (!H_IS_LONG_BUSY(rc)) 442 break; 443 mdelay(get_longbusy_msecs(rc)); 444 } 445 if (rc) { 446 ppc_md.progress("H_SET_MODE LE exception fail", 0); 447 panic("Could not enable little endian exceptions"); 448 } 449 } 450 #endif 451 452 static void __init find_and_init_phbs(void) 453 { 454 struct device_node *node; 455 struct pci_controller *phb; 456 struct device_node *root = of_find_node_by_path("/"); 457 458 for_each_child_of_node(root, node) { 459 if (node->type == NULL || (strcmp(node->type, "pci") != 0 && 460 strcmp(node->type, "pciex") != 0)) 461 continue; 462 463 phb = pcibios_alloc_controller(node); 464 if (!phb) 465 continue; 466 rtas_setup_phb(phb); 467 pci_process_bridge_OF_ranges(phb, node, 0); 468 isa_bridge_find_early(phb); 469 phb->controller_ops = pseries_pci_controller_ops; 470 } 471 472 of_node_put(root); 473 474 /* 475 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties 476 * in chosen. 477 */ 478 of_pci_check_probe_only(); 479 } 480 481 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) 482 { 483 /* 484 * The features below are disabled by default, so we instead look to see 485 * if firmware has *enabled* them, and set them if so. 486 */ 487 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) 488 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 489 490 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) 491 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 492 493 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) 494 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 495 496 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) 497 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 498 499 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) 500 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 501 502 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) 503 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 504 505 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) 506 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 507 508 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) 509 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 510 511 /* 512 * The features below are enabled by default, so we instead look to see 513 * if firmware has *disabled* them, and clear them if so. 514 */ 515 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) 516 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 517 518 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) 519 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 520 521 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) 522 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 523 } 524 525 void pseries_setup_rfi_flush(void) 526 { 527 struct h_cpu_char_result result; 528 enum l1d_flush_type types; 529 bool enable; 530 long rc; 531 532 /* 533 * Set features to the defaults assumed by init_cpu_char_feature_flags() 534 * so it can set/clear again any features that might have changed after 535 * migration, and in case the hypercall fails and it is not even called. 536 */ 537 powerpc_security_features = SEC_FTR_DEFAULT; 538 539 rc = plpar_get_cpu_characteristics(&result); 540 if (rc == H_SUCCESS) 541 init_cpu_char_feature_flags(&result); 542 543 /* 544 * We're the guest so this doesn't apply to us, clear it to simplify 545 * handling of it elsewhere. 546 */ 547 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 548 549 types = L1D_FLUSH_FALLBACK; 550 551 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 552 types |= L1D_FLUSH_MTTRIG; 553 554 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 555 types |= L1D_FLUSH_ORI; 556 557 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 558 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); 559 560 setup_rfi_flush(types, enable); 561 setup_count_cache_flush(); 562 } 563 564 #ifdef CONFIG_PCI_IOV 565 enum rtas_iov_fw_value_map { 566 NUM_RES_PROPERTY = 0, /* Number of Resources */ 567 LOW_INT = 1, /* Lowest 32 bits of Address */ 568 START_OF_ENTRIES = 2, /* Always start of entry */ 569 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ 570 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ 571 NEXT_ENTRY = 7 /* Go to next entry on array */ 572 }; 573 574 enum get_iov_fw_value_index { 575 BAR_ADDRS = 1, /* Get Bar Address */ 576 APERTURE_SIZE = 2, /* Get Aperture Size */ 577 WDW_SIZE = 3 /* Get Window Size */ 578 }; 579 580 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, 581 enum get_iov_fw_value_index value) 582 { 583 const int *indexes; 584 struct device_node *dn = pci_device_to_OF_node(dev); 585 int i, num_res, ret = 0; 586 587 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 588 if (!indexes) 589 return 0; 590 591 /* 592 * First element in the array is the number of Bars 593 * returned. Search through the list to find the matching 594 * bar 595 */ 596 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 597 if (resno >= num_res) 598 return 0; /* or an errror */ 599 600 i = START_OF_ENTRIES + NEXT_ENTRY * resno; 601 switch (value) { 602 case BAR_ADDRS: 603 ret = of_read_number(&indexes[i], 2); 604 break; 605 case APERTURE_SIZE: 606 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 607 break; 608 case WDW_SIZE: 609 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 610 break; 611 } 612 613 return ret; 614 } 615 616 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) 617 { 618 struct resource *res; 619 resource_size_t base, size; 620 int i, r, num_res; 621 622 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 623 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); 624 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 625 i += NEXT_ENTRY, r++) { 626 res = &dev->resource[r + PCI_IOV_RESOURCES]; 627 base = of_read_number(&indexes[i], 2); 628 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 629 res->flags = pci_parse_of_flags(of_read_number 630 (&indexes[i + LOW_INT], 1), 0); 631 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); 632 res->name = pci_name(dev); 633 res->start = base; 634 res->end = base + size - 1; 635 } 636 } 637 638 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) 639 { 640 struct resource *res, *root, *conflict; 641 resource_size_t base, size; 642 int i, r, num_res; 643 644 /* 645 * First element in the array is the number of Bars 646 * returned. Search through the list to find the matching 647 * bars assign them from firmware into resources structure. 648 */ 649 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 650 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 651 i += NEXT_ENTRY, r++) { 652 res = &dev->resource[r + PCI_IOV_RESOURCES]; 653 base = of_read_number(&indexes[i], 2); 654 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 655 res->name = pci_name(dev); 656 res->start = base; 657 res->end = base + size - 1; 658 root = &iomem_resource; 659 dev_dbg(&dev->dev, 660 "pSeries IOV BAR %d: trying firmware assignment %pR\n", 661 r + PCI_IOV_RESOURCES, res); 662 conflict = request_resource_conflict(root, res); 663 if (conflict) { 664 dev_info(&dev->dev, 665 "BAR %d: %pR conflicts with %s %pR\n", 666 r + PCI_IOV_RESOURCES, res, 667 conflict->name, conflict); 668 res->flags |= IORESOURCE_UNSET; 669 } 670 } 671 } 672 673 static void pseries_disable_sriov_resources(struct pci_dev *pdev) 674 { 675 int i; 676 677 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); 678 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) 679 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; 680 } 681 682 static void pseries_pci_fixup_resources(struct pci_dev *pdev) 683 { 684 const int *indexes; 685 struct device_node *dn = pci_device_to_OF_node(pdev); 686 687 /*Firmware must support open sriov otherwise dont configure*/ 688 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 689 if (indexes) 690 of_pci_set_vf_bar_size(pdev, indexes); 691 else 692 pseries_disable_sriov_resources(pdev); 693 } 694 695 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) 696 { 697 const int *indexes; 698 struct device_node *dn = pci_device_to_OF_node(pdev); 699 700 if (!pdev->is_physfn || pci_dev_is_added(pdev)) 701 return; 702 /*Firmware must support open sriov otherwise dont configure*/ 703 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 704 if (indexes) 705 of_pci_parse_iov_addrs(pdev, indexes); 706 else 707 pseries_disable_sriov_resources(pdev); 708 } 709 710 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, 711 int resno) 712 { 713 const __be32 *reg; 714 struct device_node *dn = pci_device_to_OF_node(pdev); 715 716 /*Firmware must support open sriov otherwise report regular alignment*/ 717 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); 718 if (!reg) 719 return pci_iov_resource_size(pdev, resno); 720 721 if (!pdev->is_physfn) 722 return 0; 723 return pseries_get_iov_fw_value(pdev, 724 resno - PCI_IOV_RESOURCES, 725 APERTURE_SIZE); 726 } 727 #endif 728 729 static void __init pSeries_setup_arch(void) 730 { 731 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 732 733 /* Discover PIC type and setup ppc_md accordingly */ 734 smp_init_pseries(); 735 736 737 /* openpic global configuration register (64-bit format). */ 738 /* openpic Interrupt Source Unit pointer (64-bit format). */ 739 /* python0 facility area (mmio) (64-bit format) REAL address. */ 740 741 /* init to some ~sane value until calibrate_delay() runs */ 742 loops_per_jiffy = 50000000; 743 744 fwnmi_init(); 745 746 pseries_setup_rfi_flush(); 747 setup_stf_barrier(); 748 749 /* By default, only probe PCI (can be overridden by rtas_pci) */ 750 pci_add_flags(PCI_PROBE_ONLY); 751 752 /* Find and initialize PCI host bridges */ 753 init_pci_config_tokens(); 754 find_and_init_phbs(); 755 of_reconfig_notifier_register(&pci_dn_reconfig_nb); 756 757 pSeries_nvram_init(); 758 759 if (firmware_has_feature(FW_FEATURE_LPAR)) { 760 vpa_init(boot_cpuid); 761 ppc_md.power_save = pseries_lpar_idle; 762 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; 763 #ifdef CONFIG_PCI_IOV 764 ppc_md.pcibios_fixup_resources = 765 pseries_pci_fixup_resources; 766 ppc_md.pcibios_fixup_sriov = 767 pseries_pci_fixup_iov_resources; 768 ppc_md.pcibios_iov_resource_alignment = 769 pseries_pci_iov_resource_alignment; 770 #endif 771 } else { 772 /* No special idle routine */ 773 ppc_md.enable_pmcs = power4_enable_pmcs; 774 } 775 776 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; 777 } 778 779 static void pseries_panic(char *str) 780 { 781 panic_flush_kmsg_end(); 782 rtas_os_term(str); 783 } 784 785 static int __init pSeries_init_panel(void) 786 { 787 /* Manually leave the kernel version on the panel. */ 788 #ifdef __BIG_ENDIAN__ 789 ppc_md.progress("Linux ppc64\n", 0); 790 #else 791 ppc_md.progress("Linux ppc64le\n", 0); 792 #endif 793 ppc_md.progress(init_utsname()->version, 0); 794 795 return 0; 796 } 797 machine_arch_initcall(pseries, pSeries_init_panel); 798 799 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) 800 { 801 return plpar_hcall_norets(H_SET_DABR, dabr); 802 } 803 804 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) 805 { 806 /* Have to set at least one bit in the DABRX according to PAPR */ 807 if (dabrx == 0 && dabr == 0) 808 dabrx = DABRX_USER; 809 /* PAPR says we can only set kernel and user bits */ 810 dabrx &= DABRX_KERNEL | DABRX_USER; 811 812 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 813 } 814 815 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx) 816 { 817 /* PAPR says we can't set HYP */ 818 dawrx &= ~DAWRX_HYP; 819 820 return plpar_set_watchpoint0(dawr, dawrx); 821 } 822 823 #define CMO_CHARACTERISTICS_TOKEN 44 824 #define CMO_MAXLENGTH 1026 825 826 void pSeries_coalesce_init(void) 827 { 828 struct hvcall_mpp_x_data mpp_x_data; 829 830 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) 831 powerpc_firmware_features |= FW_FEATURE_XCMO; 832 else 833 powerpc_firmware_features &= ~FW_FEATURE_XCMO; 834 } 835 836 /** 837 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, 838 * handle that here. (Stolen from parse_system_parameter_string) 839 */ 840 static void pSeries_cmo_feature_init(void) 841 { 842 char *ptr, *key, *value, *end; 843 int call_status; 844 int page_order = IOMMU_PAGE_SHIFT_4K; 845 846 pr_debug(" -> fw_cmo_feature_init()\n"); 847 spin_lock(&rtas_data_buf_lock); 848 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); 849 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, 850 NULL, 851 CMO_CHARACTERISTICS_TOKEN, 852 __pa(rtas_data_buf), 853 RTAS_DATA_BUF_SIZE); 854 855 if (call_status != 0) { 856 spin_unlock(&rtas_data_buf_lock); 857 pr_debug("CMO not available\n"); 858 pr_debug(" <- fw_cmo_feature_init()\n"); 859 return; 860 } 861 862 end = rtas_data_buf + CMO_MAXLENGTH - 2; 863 ptr = rtas_data_buf + 2; /* step over strlen value */ 864 key = value = ptr; 865 866 while (*ptr && (ptr <= end)) { 867 /* Separate the key and value by replacing '=' with '\0' and 868 * point the value at the string after the '=' 869 */ 870 if (ptr[0] == '=') { 871 ptr[0] = '\0'; 872 value = ptr + 1; 873 } else if (ptr[0] == '\0' || ptr[0] == ',') { 874 /* Terminate the string containing the key/value pair */ 875 ptr[0] = '\0'; 876 877 if (key == value) { 878 pr_debug("Malformed key/value pair\n"); 879 /* Never found a '=', end processing */ 880 break; 881 } 882 883 if (0 == strcmp(key, "CMOPageSize")) 884 page_order = simple_strtol(value, NULL, 10); 885 else if (0 == strcmp(key, "PrPSP")) 886 CMO_PrPSP = simple_strtol(value, NULL, 10); 887 else if (0 == strcmp(key, "SecPSP")) 888 CMO_SecPSP = simple_strtol(value, NULL, 10); 889 value = key = ptr + 1; 890 } 891 ptr++; 892 } 893 894 /* Page size is returned as the power of 2 of the page size, 895 * convert to the page size in bytes before returning 896 */ 897 CMO_PageSize = 1 << page_order; 898 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); 899 900 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { 901 pr_info("CMO enabled\n"); 902 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 903 CMO_SecPSP); 904 powerpc_firmware_features |= FW_FEATURE_CMO; 905 pSeries_coalesce_init(); 906 } else 907 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 908 CMO_SecPSP); 909 spin_unlock(&rtas_data_buf_lock); 910 pr_debug(" <- fw_cmo_feature_init()\n"); 911 } 912 913 /* 914 * Early initialization. Relocation is on but do not reference unbolted pages 915 */ 916 static void __init pseries_init(void) 917 { 918 pr_debug(" -> pseries_init()\n"); 919 920 #ifdef CONFIG_HVC_CONSOLE 921 if (firmware_has_feature(FW_FEATURE_LPAR)) 922 hvc_vio_init_early(); 923 #endif 924 if (firmware_has_feature(FW_FEATURE_XDABR)) 925 ppc_md.set_dabr = pseries_set_xdabr; 926 else if (firmware_has_feature(FW_FEATURE_DABR)) 927 ppc_md.set_dabr = pseries_set_dabr; 928 929 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 930 ppc_md.set_dawr = pseries_set_dawr; 931 932 pSeries_cmo_feature_init(); 933 iommu_init_early_pSeries(); 934 935 pr_debug(" <- pseries_init()\n"); 936 } 937 938 /** 939 * pseries_power_off - tell firmware about how to power off the system. 940 * 941 * This function calls either the power-off rtas token in normal cases 942 * or the ibm,power-off-ups token (if present & requested) in case of 943 * a power failure. If power-off token is used, power on will only be 944 * possible with power button press. If ibm,power-off-ups token is used 945 * it will allow auto poweron after power is restored. 946 */ 947 static void pseries_power_off(void) 948 { 949 int rc; 950 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); 951 952 if (rtas_flash_term_hook) 953 rtas_flash_term_hook(SYS_POWER_OFF); 954 955 if (rtas_poweron_auto == 0 || 956 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { 957 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); 958 printk(KERN_INFO "RTAS power-off returned %d\n", rc); 959 } else { 960 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); 961 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); 962 } 963 for (;;); 964 } 965 966 static int __init pSeries_probe(void) 967 { 968 const char *dtype = of_get_property(of_root, "device_type", NULL); 969 970 if (dtype == NULL) 971 return 0; 972 if (strcmp(dtype, "chrp")) 973 return 0; 974 975 /* Cell blades firmware claims to be chrp while it's not. Until this 976 * is fixed, we need to avoid those here. 977 */ 978 if (of_machine_is_compatible("IBM,CPBW-1.0") || 979 of_machine_is_compatible("IBM,CBEA")) 980 return 0; 981 982 pm_power_off = pseries_power_off; 983 984 pr_debug("Machine is%s LPAR !\n", 985 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 986 987 pseries_init(); 988 989 return 1; 990 } 991 992 static int pSeries_pci_probe_mode(struct pci_bus *bus) 993 { 994 if (firmware_has_feature(FW_FEATURE_LPAR)) 995 return PCI_PROBE_DEVTREE; 996 return PCI_PROBE_NORMAL; 997 } 998 999 struct pci_controller_ops pseries_pci_controller_ops = { 1000 .probe_mode = pSeries_pci_probe_mode, 1001 }; 1002 1003 define_machine(pseries) { 1004 .name = "pSeries", 1005 .probe = pSeries_probe, 1006 .setup_arch = pSeries_setup_arch, 1007 .init_IRQ = pseries_init_irq, 1008 .show_cpuinfo = pSeries_show_cpuinfo, 1009 .log_error = pSeries_log_error, 1010 .pcibios_fixup = pSeries_final_fixup, 1011 .restart = rtas_restart, 1012 .halt = rtas_halt, 1013 .panic = pseries_panic, 1014 .get_boot_time = rtas_get_boot_time, 1015 .get_rtc_time = rtas_get_rtc_time, 1016 .set_rtc_time = rtas_set_rtc_time, 1017 .calibrate_decr = generic_calibrate_decr, 1018 .progress = rtas_progress, 1019 .system_reset_exception = pSeries_system_reset_exception, 1020 .machine_check_exception = pSeries_machine_check_exception, 1021 #ifdef CONFIG_KEXEC_CORE 1022 .machine_kexec = pSeries_machine_kexec, 1023 .kexec_cpu_down = pseries_kexec_cpu_down, 1024 #endif 1025 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 1026 .memory_block_size = pseries_memory_block_size, 1027 #endif 1028 }; 1029