1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * 64-bit pSeries and RS/6000 setup code. 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Adapted from 'alpha' version by Gary Thomas 7 * Modified by Cort Dougan (cort@cs.nmt.edu) 8 * Modified by PPC64 Team, IBM Corp 9 */ 10 11 /* 12 * bootup setup stuff.. 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/errno.h> 17 #include <linux/sched.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/stddef.h> 21 #include <linux/unistd.h> 22 #include <linux/user.h> 23 #include <linux/tty.h> 24 #include <linux/major.h> 25 #include <linux/interrupt.h> 26 #include <linux/reboot.h> 27 #include <linux/init.h> 28 #include <linux/ioport.h> 29 #include <linux/console.h> 30 #include <linux/pci.h> 31 #include <linux/utsname.h> 32 #include <linux/adb.h> 33 #include <linux/export.h> 34 #include <linux/delay.h> 35 #include <linux/irq.h> 36 #include <linux/seq_file.h> 37 #include <linux/root_dev.h> 38 #include <linux/of.h> 39 #include <linux/of_pci.h> 40 #include <linux/memblock.h> 41 #include <linux/swiotlb.h> 42 43 #include <asm/mmu.h> 44 #include <asm/processor.h> 45 #include <asm/io.h> 46 #include <asm/prom.h> 47 #include <asm/rtas.h> 48 #include <asm/pci-bridge.h> 49 #include <asm/iommu.h> 50 #include <asm/dma.h> 51 #include <asm/machdep.h> 52 #include <asm/irq.h> 53 #include <asm/time.h> 54 #include <asm/nvram.h> 55 #include <asm/pmc.h> 56 #include <asm/xics.h> 57 #include <asm/xive.h> 58 #include <asm/ppc-pci.h> 59 #include <asm/i8259.h> 60 #include <asm/udbg.h> 61 #include <asm/smp.h> 62 #include <asm/firmware.h> 63 #include <asm/eeh.h> 64 #include <asm/reg.h> 65 #include <asm/plpar_wrappers.h> 66 #include <asm/kexec.h> 67 #include <asm/isa-bridge.h> 68 #include <asm/security_features.h> 69 #include <asm/asm-const.h> 70 #include <asm/idle.h> 71 #include <asm/swiotlb.h> 72 #include <asm/svm.h> 73 #include <asm/dtl.h> 74 #include <asm/hvconsole.h> 75 76 #include "pseries.h" 77 78 DEFINE_STATIC_KEY_FALSE(shared_processor); 79 EXPORT_SYMBOL(shared_processor); 80 81 int CMO_PrPSP = -1; 82 int CMO_SecPSP = -1; 83 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); 84 EXPORT_SYMBOL(CMO_PageSize); 85 86 int fwnmi_active; /* TRUE if an FWNMI handler is present */ 87 int ibm_nmi_interlock_token; 88 u32 pseries_security_flavor; 89 90 static void pSeries_show_cpuinfo(struct seq_file *m) 91 { 92 struct device_node *root; 93 const char *model = ""; 94 95 root = of_find_node_by_path("/"); 96 if (root) 97 model = of_get_property(root, "model", NULL); 98 seq_printf(m, "machine\t\t: CHRP %s\n", model); 99 of_node_put(root); 100 if (radix_enabled()) 101 seq_printf(m, "MMU\t\t: Radix\n"); 102 else 103 seq_printf(m, "MMU\t\t: Hash\n"); 104 } 105 106 /* Initialize firmware assisted non-maskable interrupts if 107 * the firmware supports this feature. 108 */ 109 static void __init fwnmi_init(void) 110 { 111 unsigned long system_reset_addr, machine_check_addr; 112 u8 *mce_data_buf; 113 unsigned int i; 114 int nr_cpus = num_possible_cpus(); 115 #ifdef CONFIG_PPC_BOOK3S_64 116 struct slb_entry *slb_ptr; 117 size_t size; 118 #endif 119 int ibm_nmi_register_token; 120 121 ibm_nmi_register_token = rtas_token("ibm,nmi-register"); 122 if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE) 123 return; 124 125 ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock"); 126 if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE)) 127 return; 128 129 /* If the kernel's not linked at zero we point the firmware at low 130 * addresses anyway, and use a trampoline to get to the real code. */ 131 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; 132 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; 133 134 if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL, 135 system_reset_addr, machine_check_addr)) 136 fwnmi_active = 1; 137 138 /* 139 * Allocate a chunk for per cpu buffer to hold rtas errorlog. 140 * It will be used in real mode mce handler, hence it needs to be 141 * below RMA. 142 */ 143 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus, 144 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT, 145 ppc64_rma_size, NUMA_NO_NODE); 146 if (!mce_data_buf) 147 panic("Failed to allocate %d bytes below %pa for MCE buffer\n", 148 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size); 149 150 for_each_possible_cpu(i) { 151 paca_ptrs[i]->mce_data_buf = mce_data_buf + 152 (RTAS_ERROR_LOG_MAX * i); 153 } 154 155 #ifdef CONFIG_PPC_BOOK3S_64 156 if (!radix_enabled()) { 157 /* Allocate per cpu area to save old slb contents during MCE */ 158 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; 159 slb_ptr = memblock_alloc_try_nid_raw(size, 160 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, 161 ppc64_rma_size, NUMA_NO_NODE); 162 if (!slb_ptr) 163 panic("Failed to allocate %zu bytes below %pa for slb area\n", 164 size, &ppc64_rma_size); 165 166 for_each_possible_cpu(i) 167 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); 168 } 169 #endif 170 } 171 172 static void pseries_8259_cascade(struct irq_desc *desc) 173 { 174 struct irq_chip *chip = irq_desc_get_chip(desc); 175 unsigned int cascade_irq = i8259_irq(); 176 177 if (cascade_irq) 178 generic_handle_irq(cascade_irq); 179 180 chip->irq_eoi(&desc->irq_data); 181 } 182 183 static void __init pseries_setup_i8259_cascade(void) 184 { 185 struct device_node *np, *old, *found = NULL; 186 unsigned int cascade; 187 const u32 *addrp; 188 unsigned long intack = 0; 189 int naddr; 190 191 for_each_node_by_type(np, "interrupt-controller") { 192 if (of_device_is_compatible(np, "chrp,iic")) { 193 found = np; 194 break; 195 } 196 } 197 198 if (found == NULL) { 199 printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); 200 return; 201 } 202 203 cascade = irq_of_parse_and_map(found, 0); 204 if (!cascade) { 205 printk(KERN_ERR "pic: failed to map cascade interrupt"); 206 return; 207 } 208 pr_debug("pic: cascade mapped to irq %d\n", cascade); 209 210 for (old = of_node_get(found); old != NULL ; old = np) { 211 np = of_get_parent(old); 212 of_node_put(old); 213 if (np == NULL) 214 break; 215 if (!of_node_name_eq(np, "pci")) 216 continue; 217 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 218 if (addrp == NULL) 219 continue; 220 naddr = of_n_addr_cells(np); 221 intack = addrp[naddr-1]; 222 if (naddr > 1) 223 intack |= ((unsigned long)addrp[naddr-2]) << 32; 224 } 225 if (intack) 226 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 227 i8259_init(found, intack); 228 of_node_put(found); 229 irq_set_chained_handler(cascade, pseries_8259_cascade); 230 } 231 232 static void __init pseries_init_irq(void) 233 { 234 /* Try using a XIVE if available, otherwise use a XICS */ 235 if (!xive_spapr_init()) { 236 xics_init(); 237 pseries_setup_i8259_cascade(); 238 } 239 } 240 241 static void pseries_lpar_enable_pmcs(void) 242 { 243 unsigned long set, reset; 244 245 set = 1UL << 63; 246 reset = 0; 247 plpar_hcall_norets(H_PERFMON, set, reset); 248 } 249 250 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) 251 { 252 struct of_reconfig_data *rd = data; 253 struct device_node *parent, *np = rd->dn; 254 struct pci_dn *pdn; 255 int err = NOTIFY_OK; 256 257 switch (action) { 258 case OF_RECONFIG_ATTACH_NODE: 259 parent = of_get_parent(np); 260 pdn = parent ? PCI_DN(parent) : NULL; 261 if (pdn) 262 pci_add_device_node_info(pdn->phb, np); 263 264 of_node_put(parent); 265 break; 266 case OF_RECONFIG_DETACH_NODE: 267 pdn = PCI_DN(np); 268 if (pdn) 269 list_del(&pdn->list); 270 break; 271 default: 272 err = NOTIFY_DONE; 273 break; 274 } 275 return err; 276 } 277 278 static struct notifier_block pci_dn_reconfig_nb = { 279 .notifier_call = pci_dn_reconfig_notifier, 280 }; 281 282 struct kmem_cache *dtl_cache; 283 284 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 285 /* 286 * Allocate space for the dispatch trace log for all possible cpus 287 * and register the buffers with the hypervisor. This is used for 288 * computing time stolen by the hypervisor. 289 */ 290 static int alloc_dispatch_logs(void) 291 { 292 if (!firmware_has_feature(FW_FEATURE_SPLPAR)) 293 return 0; 294 295 if (!dtl_cache) 296 return 0; 297 298 alloc_dtl_buffers(0); 299 300 /* Register the DTL for the current (boot) cpu */ 301 register_dtl_buffer(smp_processor_id()); 302 303 return 0; 304 } 305 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 306 static inline int alloc_dispatch_logs(void) 307 { 308 return 0; 309 } 310 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 311 312 static int alloc_dispatch_log_kmem_cache(void) 313 { 314 void (*ctor)(void *) = get_dtl_cache_ctor(); 315 316 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, 317 DISPATCH_LOG_BYTES, 0, ctor); 318 if (!dtl_cache) { 319 pr_warn("Failed to create dispatch trace log buffer cache\n"); 320 pr_warn("Stolen time statistics will be unreliable\n"); 321 return 0; 322 } 323 324 return alloc_dispatch_logs(); 325 } 326 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); 327 328 DEFINE_PER_CPU(u64, idle_spurr_cycles); 329 DEFINE_PER_CPU(u64, idle_entry_purr_snap); 330 DEFINE_PER_CPU(u64, idle_entry_spurr_snap); 331 static void pseries_lpar_idle(void) 332 { 333 /* 334 * Default handler to go into low thread priority and possibly 335 * low power mode by ceding processor to hypervisor 336 */ 337 338 if (!prep_irq_for_idle()) 339 return; 340 341 /* Indicate to hypervisor that we are idle. */ 342 pseries_idle_prolog(); 343 344 /* 345 * Yield the processor to the hypervisor. We return if 346 * an external interrupt occurs (which are driven prior 347 * to returning here) or if a prod occurs from another 348 * processor. When returning here, external interrupts 349 * are enabled. 350 */ 351 cede_processor(); 352 353 pseries_idle_epilog(); 354 } 355 356 /* 357 * Enable relocation on during exceptions. This has partition wide scope and 358 * may take a while to complete, if it takes longer than one second we will 359 * just give up rather than wasting any more time on this - if that turns out 360 * to ever be a problem in practice we can move this into a kernel thread to 361 * finish off the process later in boot. 362 */ 363 bool pseries_enable_reloc_on_exc(void) 364 { 365 long rc; 366 unsigned int delay, total_delay = 0; 367 368 while (1) { 369 rc = enable_reloc_on_exceptions(); 370 if (!H_IS_LONG_BUSY(rc)) { 371 if (rc == H_P2) { 372 pr_info("Relocation on exceptions not" 373 " supported\n"); 374 return false; 375 } else if (rc != H_SUCCESS) { 376 pr_warn("Unable to enable relocation" 377 " on exceptions: %ld\n", rc); 378 return false; 379 } 380 return true; 381 } 382 383 delay = get_longbusy_msecs(rc); 384 total_delay += delay; 385 if (total_delay > 1000) { 386 pr_warn("Warning: Giving up waiting to enable " 387 "relocation on exceptions (%u msec)!\n", 388 total_delay); 389 return false; 390 } 391 392 mdelay(delay); 393 } 394 } 395 EXPORT_SYMBOL(pseries_enable_reloc_on_exc); 396 397 void pseries_disable_reloc_on_exc(void) 398 { 399 long rc; 400 401 while (1) { 402 rc = disable_reloc_on_exceptions(); 403 if (!H_IS_LONG_BUSY(rc)) 404 break; 405 mdelay(get_longbusy_msecs(rc)); 406 } 407 if (rc != H_SUCCESS) 408 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", 409 rc); 410 } 411 EXPORT_SYMBOL(pseries_disable_reloc_on_exc); 412 413 #ifdef CONFIG_KEXEC_CORE 414 static void pSeries_machine_kexec(struct kimage *image) 415 { 416 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 417 pseries_disable_reloc_on_exc(); 418 419 default_machine_kexec(image); 420 } 421 #endif 422 423 #ifdef __LITTLE_ENDIAN__ 424 void pseries_big_endian_exceptions(void) 425 { 426 long rc; 427 428 while (1) { 429 rc = enable_big_endian_exceptions(); 430 if (!H_IS_LONG_BUSY(rc)) 431 break; 432 mdelay(get_longbusy_msecs(rc)); 433 } 434 435 /* 436 * At this point it is unlikely panic() will get anything 437 * out to the user, since this is called very late in kexec 438 * but at least this will stop us from continuing on further 439 * and creating an even more difficult to debug situation. 440 * 441 * There is a known problem when kdump'ing, if cpus are offline 442 * the above call will fail. Rather than panicking again, keep 443 * going and hope the kdump kernel is also little endian, which 444 * it usually is. 445 */ 446 if (rc && !kdump_in_progress()) 447 panic("Could not enable big endian exceptions"); 448 } 449 450 void pseries_little_endian_exceptions(void) 451 { 452 long rc; 453 454 while (1) { 455 rc = enable_little_endian_exceptions(); 456 if (!H_IS_LONG_BUSY(rc)) 457 break; 458 mdelay(get_longbusy_msecs(rc)); 459 } 460 if (rc) { 461 ppc_md.progress("H_SET_MODE LE exception fail", 0); 462 panic("Could not enable little endian exceptions"); 463 } 464 } 465 #endif 466 467 static void __init pSeries_discover_phbs(void) 468 { 469 struct device_node *node; 470 struct pci_controller *phb; 471 struct device_node *root = of_find_node_by_path("/"); 472 473 for_each_child_of_node(root, node) { 474 if (!of_node_is_type(node, "pci") && 475 !of_node_is_type(node, "pciex")) 476 continue; 477 478 phb = pcibios_alloc_controller(node); 479 if (!phb) 480 continue; 481 rtas_setup_phb(phb); 482 pci_process_bridge_OF_ranges(phb, node, 0); 483 isa_bridge_find_early(phb); 484 phb->controller_ops = pseries_pci_controller_ops; 485 486 /* create pci_dn's for DT nodes under this PHB */ 487 pci_devs_phb_init_dynamic(phb); 488 489 pseries_msi_allocate_domains(phb); 490 } 491 492 of_node_put(root); 493 494 /* 495 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties 496 * in chosen. 497 */ 498 of_pci_check_probe_only(); 499 } 500 501 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) 502 { 503 /* 504 * The features below are disabled by default, so we instead look to see 505 * if firmware has *enabled* them, and set them if so. 506 */ 507 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) 508 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 509 510 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) 511 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 512 513 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) 514 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 515 516 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) 517 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 518 519 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) 520 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 521 522 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) 523 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 524 525 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) 526 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 527 528 if (result->character & H_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST) 529 security_ftr_set(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST); 530 531 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) 532 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 533 534 if (result->behaviour & H_CPU_BEHAV_FLUSH_LINK_STACK) 535 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK); 536 537 /* 538 * The features below are enabled by default, so we instead look to see 539 * if firmware has *disabled* them, and clear them if so. 540 * H_CPU_BEHAV_FAVOUR_SECURITY_H could be set only if 541 * H_CPU_BEHAV_FAVOUR_SECURITY is. 542 */ 543 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) { 544 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 545 pseries_security_flavor = 0; 546 } else if (result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY_H) 547 pseries_security_flavor = 1; 548 else 549 pseries_security_flavor = 2; 550 551 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) 552 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 553 554 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY) 555 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY); 556 557 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS) 558 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS); 559 560 if (result->behaviour & H_CPU_BEHAV_NO_STF_BARRIER) 561 security_ftr_clear(SEC_FTR_STF_BARRIER); 562 563 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) 564 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 565 } 566 567 void pseries_setup_security_mitigations(void) 568 { 569 struct h_cpu_char_result result; 570 enum l1d_flush_type types; 571 bool enable; 572 long rc; 573 574 /* 575 * Set features to the defaults assumed by init_cpu_char_feature_flags() 576 * so it can set/clear again any features that might have changed after 577 * migration, and in case the hypercall fails and it is not even called. 578 */ 579 powerpc_security_features = SEC_FTR_DEFAULT; 580 581 rc = plpar_get_cpu_characteristics(&result); 582 if (rc == H_SUCCESS) 583 init_cpu_char_feature_flags(&result); 584 585 /* 586 * We're the guest so this doesn't apply to us, clear it to simplify 587 * handling of it elsewhere. 588 */ 589 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 590 591 types = L1D_FLUSH_FALLBACK; 592 593 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 594 types |= L1D_FLUSH_MTTRIG; 595 596 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 597 types |= L1D_FLUSH_ORI; 598 599 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 600 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); 601 602 setup_rfi_flush(types, enable); 603 setup_count_cache_flush(); 604 605 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 606 security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY); 607 setup_entry_flush(enable); 608 609 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 610 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS); 611 setup_uaccess_flush(enable); 612 613 setup_stf_barrier(); 614 } 615 616 #ifdef CONFIG_PCI_IOV 617 enum rtas_iov_fw_value_map { 618 NUM_RES_PROPERTY = 0, /* Number of Resources */ 619 LOW_INT = 1, /* Lowest 32 bits of Address */ 620 START_OF_ENTRIES = 2, /* Always start of entry */ 621 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ 622 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ 623 NEXT_ENTRY = 7 /* Go to next entry on array */ 624 }; 625 626 enum get_iov_fw_value_index { 627 BAR_ADDRS = 1, /* Get Bar Address */ 628 APERTURE_SIZE = 2, /* Get Aperture Size */ 629 WDW_SIZE = 3 /* Get Window Size */ 630 }; 631 632 static resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, 633 enum get_iov_fw_value_index value) 634 { 635 const int *indexes; 636 struct device_node *dn = pci_device_to_OF_node(dev); 637 int i, num_res, ret = 0; 638 639 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 640 if (!indexes) 641 return 0; 642 643 /* 644 * First element in the array is the number of Bars 645 * returned. Search through the list to find the matching 646 * bar 647 */ 648 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 649 if (resno >= num_res) 650 return 0; /* or an errror */ 651 652 i = START_OF_ENTRIES + NEXT_ENTRY * resno; 653 switch (value) { 654 case BAR_ADDRS: 655 ret = of_read_number(&indexes[i], 2); 656 break; 657 case APERTURE_SIZE: 658 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 659 break; 660 case WDW_SIZE: 661 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 662 break; 663 } 664 665 return ret; 666 } 667 668 static void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) 669 { 670 struct resource *res; 671 resource_size_t base, size; 672 int i, r, num_res; 673 674 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 675 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); 676 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 677 i += NEXT_ENTRY, r++) { 678 res = &dev->resource[r + PCI_IOV_RESOURCES]; 679 base = of_read_number(&indexes[i], 2); 680 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 681 res->flags = pci_parse_of_flags(of_read_number 682 (&indexes[i + LOW_INT], 1), 0); 683 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); 684 res->name = pci_name(dev); 685 res->start = base; 686 res->end = base + size - 1; 687 } 688 } 689 690 static void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) 691 { 692 struct resource *res, *root, *conflict; 693 resource_size_t base, size; 694 int i, r, num_res; 695 696 /* 697 * First element in the array is the number of Bars 698 * returned. Search through the list to find the matching 699 * bars assign them from firmware into resources structure. 700 */ 701 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 702 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 703 i += NEXT_ENTRY, r++) { 704 res = &dev->resource[r + PCI_IOV_RESOURCES]; 705 base = of_read_number(&indexes[i], 2); 706 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 707 res->name = pci_name(dev); 708 res->start = base; 709 res->end = base + size - 1; 710 root = &iomem_resource; 711 dev_dbg(&dev->dev, 712 "pSeries IOV BAR %d: trying firmware assignment %pR\n", 713 r + PCI_IOV_RESOURCES, res); 714 conflict = request_resource_conflict(root, res); 715 if (conflict) { 716 dev_info(&dev->dev, 717 "BAR %d: %pR conflicts with %s %pR\n", 718 r + PCI_IOV_RESOURCES, res, 719 conflict->name, conflict); 720 res->flags |= IORESOURCE_UNSET; 721 } 722 } 723 } 724 725 static void pseries_disable_sriov_resources(struct pci_dev *pdev) 726 { 727 int i; 728 729 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); 730 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) 731 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; 732 } 733 734 static void pseries_pci_fixup_resources(struct pci_dev *pdev) 735 { 736 const int *indexes; 737 struct device_node *dn = pci_device_to_OF_node(pdev); 738 739 /*Firmware must support open sriov otherwise dont configure*/ 740 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 741 if (indexes) 742 of_pci_set_vf_bar_size(pdev, indexes); 743 else 744 pseries_disable_sriov_resources(pdev); 745 } 746 747 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) 748 { 749 const int *indexes; 750 struct device_node *dn = pci_device_to_OF_node(pdev); 751 752 if (!pdev->is_physfn) 753 return; 754 /*Firmware must support open sriov otherwise dont configure*/ 755 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 756 if (indexes) 757 of_pci_parse_iov_addrs(pdev, indexes); 758 else 759 pseries_disable_sriov_resources(pdev); 760 } 761 762 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, 763 int resno) 764 { 765 const __be32 *reg; 766 struct device_node *dn = pci_device_to_OF_node(pdev); 767 768 /*Firmware must support open sriov otherwise report regular alignment*/ 769 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); 770 if (!reg) 771 return pci_iov_resource_size(pdev, resno); 772 773 if (!pdev->is_physfn) 774 return 0; 775 return pseries_get_iov_fw_value(pdev, 776 resno - PCI_IOV_RESOURCES, 777 APERTURE_SIZE); 778 } 779 #endif 780 781 static void __init pSeries_setup_arch(void) 782 { 783 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 784 785 /* Discover PIC type and setup ppc_md accordingly */ 786 smp_init_pseries(); 787 788 789 if (radix_enabled() && !mmu_has_feature(MMU_FTR_GTSE)) 790 if (!firmware_has_feature(FW_FEATURE_RPT_INVALIDATE)) 791 panic("BUG: Radix support requires either GTSE or RPT_INVALIDATE\n"); 792 793 794 /* openpic global configuration register (64-bit format). */ 795 /* openpic Interrupt Source Unit pointer (64-bit format). */ 796 /* python0 facility area (mmio) (64-bit format) REAL address. */ 797 798 /* init to some ~sane value until calibrate_delay() runs */ 799 loops_per_jiffy = 50000000; 800 801 fwnmi_init(); 802 803 pseries_setup_security_mitigations(); 804 pseries_lpar_read_hblkrm_characteristics(); 805 806 /* By default, only probe PCI (can be overridden by rtas_pci) */ 807 pci_add_flags(PCI_PROBE_ONLY); 808 809 /* Find and initialize PCI host bridges */ 810 init_pci_config_tokens(); 811 of_reconfig_notifier_register(&pci_dn_reconfig_nb); 812 813 pSeries_nvram_init(); 814 815 if (firmware_has_feature(FW_FEATURE_LPAR)) { 816 vpa_init(boot_cpuid); 817 818 if (lppaca_shared_proc(get_lppaca())) { 819 static_branch_enable(&shared_processor); 820 pv_spinlocks_init(); 821 } 822 823 ppc_md.power_save = pseries_lpar_idle; 824 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; 825 #ifdef CONFIG_PCI_IOV 826 ppc_md.pcibios_fixup_resources = 827 pseries_pci_fixup_resources; 828 ppc_md.pcibios_fixup_sriov = 829 pseries_pci_fixup_iov_resources; 830 ppc_md.pcibios_iov_resource_alignment = 831 pseries_pci_iov_resource_alignment; 832 #endif 833 } else { 834 /* No special idle routine */ 835 ppc_md.enable_pmcs = power4_enable_pmcs; 836 } 837 838 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; 839 840 if (swiotlb_force == SWIOTLB_FORCE) 841 ppc_swiotlb_enable = 1; 842 } 843 844 static void pseries_panic(char *str) 845 { 846 panic_flush_kmsg_end(); 847 rtas_os_term(str); 848 } 849 850 static int __init pSeries_init_panel(void) 851 { 852 /* Manually leave the kernel version on the panel. */ 853 #ifdef __BIG_ENDIAN__ 854 ppc_md.progress("Linux ppc64\n", 0); 855 #else 856 ppc_md.progress("Linux ppc64le\n", 0); 857 #endif 858 ppc_md.progress(init_utsname()->version, 0); 859 860 return 0; 861 } 862 machine_arch_initcall(pseries, pSeries_init_panel); 863 864 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) 865 { 866 return plpar_hcall_norets(H_SET_DABR, dabr); 867 } 868 869 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) 870 { 871 /* Have to set at least one bit in the DABRX according to PAPR */ 872 if (dabrx == 0 && dabr == 0) 873 dabrx = DABRX_USER; 874 /* PAPR says we can only set kernel and user bits */ 875 dabrx &= DABRX_KERNEL | DABRX_USER; 876 877 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 878 } 879 880 static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx) 881 { 882 /* PAPR says we can't set HYP */ 883 dawrx &= ~DAWRX_HYP; 884 885 if (nr == 0) 886 return plpar_set_watchpoint0(dawr, dawrx); 887 else 888 return plpar_set_watchpoint1(dawr, dawrx); 889 } 890 891 #define CMO_CHARACTERISTICS_TOKEN 44 892 #define CMO_MAXLENGTH 1026 893 894 void pSeries_coalesce_init(void) 895 { 896 struct hvcall_mpp_x_data mpp_x_data; 897 898 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) 899 powerpc_firmware_features |= FW_FEATURE_XCMO; 900 else 901 powerpc_firmware_features &= ~FW_FEATURE_XCMO; 902 } 903 904 /** 905 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, 906 * handle that here. (Stolen from parse_system_parameter_string) 907 */ 908 static void pSeries_cmo_feature_init(void) 909 { 910 char *ptr, *key, *value, *end; 911 int call_status; 912 int page_order = IOMMU_PAGE_SHIFT_4K; 913 914 pr_debug(" -> fw_cmo_feature_init()\n"); 915 spin_lock(&rtas_data_buf_lock); 916 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); 917 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, 918 NULL, 919 CMO_CHARACTERISTICS_TOKEN, 920 __pa(rtas_data_buf), 921 RTAS_DATA_BUF_SIZE); 922 923 if (call_status != 0) { 924 spin_unlock(&rtas_data_buf_lock); 925 pr_debug("CMO not available\n"); 926 pr_debug(" <- fw_cmo_feature_init()\n"); 927 return; 928 } 929 930 end = rtas_data_buf + CMO_MAXLENGTH - 2; 931 ptr = rtas_data_buf + 2; /* step over strlen value */ 932 key = value = ptr; 933 934 while (*ptr && (ptr <= end)) { 935 /* Separate the key and value by replacing '=' with '\0' and 936 * point the value at the string after the '=' 937 */ 938 if (ptr[0] == '=') { 939 ptr[0] = '\0'; 940 value = ptr + 1; 941 } else if (ptr[0] == '\0' || ptr[0] == ',') { 942 /* Terminate the string containing the key/value pair */ 943 ptr[0] = '\0'; 944 945 if (key == value) { 946 pr_debug("Malformed key/value pair\n"); 947 /* Never found a '=', end processing */ 948 break; 949 } 950 951 if (0 == strcmp(key, "CMOPageSize")) 952 page_order = simple_strtol(value, NULL, 10); 953 else if (0 == strcmp(key, "PrPSP")) 954 CMO_PrPSP = simple_strtol(value, NULL, 10); 955 else if (0 == strcmp(key, "SecPSP")) 956 CMO_SecPSP = simple_strtol(value, NULL, 10); 957 value = key = ptr + 1; 958 } 959 ptr++; 960 } 961 962 /* Page size is returned as the power of 2 of the page size, 963 * convert to the page size in bytes before returning 964 */ 965 CMO_PageSize = 1 << page_order; 966 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); 967 968 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { 969 pr_info("CMO enabled\n"); 970 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 971 CMO_SecPSP); 972 powerpc_firmware_features |= FW_FEATURE_CMO; 973 pSeries_coalesce_init(); 974 } else 975 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 976 CMO_SecPSP); 977 spin_unlock(&rtas_data_buf_lock); 978 pr_debug(" <- fw_cmo_feature_init()\n"); 979 } 980 981 /* 982 * Early initialization. Relocation is on but do not reference unbolted pages 983 */ 984 static void __init pseries_init(void) 985 { 986 pr_debug(" -> pseries_init()\n"); 987 988 #ifdef CONFIG_HVC_CONSOLE 989 if (firmware_has_feature(FW_FEATURE_LPAR)) 990 hvc_vio_init_early(); 991 #endif 992 if (firmware_has_feature(FW_FEATURE_XDABR)) 993 ppc_md.set_dabr = pseries_set_xdabr; 994 else if (firmware_has_feature(FW_FEATURE_DABR)) 995 ppc_md.set_dabr = pseries_set_dabr; 996 997 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 998 ppc_md.set_dawr = pseries_set_dawr; 999 1000 pSeries_cmo_feature_init(); 1001 iommu_init_early_pSeries(); 1002 1003 pr_debug(" <- pseries_init()\n"); 1004 } 1005 1006 /** 1007 * pseries_power_off - tell firmware about how to power off the system. 1008 * 1009 * This function calls either the power-off rtas token in normal cases 1010 * or the ibm,power-off-ups token (if present & requested) in case of 1011 * a power failure. If power-off token is used, power on will only be 1012 * possible with power button press. If ibm,power-off-ups token is used 1013 * it will allow auto poweron after power is restored. 1014 */ 1015 static void pseries_power_off(void) 1016 { 1017 int rc; 1018 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); 1019 1020 if (rtas_flash_term_hook) 1021 rtas_flash_term_hook(SYS_POWER_OFF); 1022 1023 if (rtas_poweron_auto == 0 || 1024 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { 1025 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); 1026 printk(KERN_INFO "RTAS power-off returned %d\n", rc); 1027 } else { 1028 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); 1029 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); 1030 } 1031 for (;;); 1032 } 1033 1034 static int __init pSeries_probe(void) 1035 { 1036 if (!of_node_is_type(of_root, "chrp")) 1037 return 0; 1038 1039 /* Cell blades firmware claims to be chrp while it's not. Until this 1040 * is fixed, we need to avoid those here. 1041 */ 1042 if (of_machine_is_compatible("IBM,CPBW-1.0") || 1043 of_machine_is_compatible("IBM,CBEA")) 1044 return 0; 1045 1046 pm_power_off = pseries_power_off; 1047 1048 pr_debug("Machine is%s LPAR !\n", 1049 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 1050 1051 pseries_init(); 1052 1053 return 1; 1054 } 1055 1056 static int pSeries_pci_probe_mode(struct pci_bus *bus) 1057 { 1058 if (firmware_has_feature(FW_FEATURE_LPAR)) 1059 return PCI_PROBE_DEVTREE; 1060 return PCI_PROBE_NORMAL; 1061 } 1062 1063 struct pci_controller_ops pseries_pci_controller_ops = { 1064 .probe_mode = pSeries_pci_probe_mode, 1065 }; 1066 1067 define_machine(pseries) { 1068 .name = "pSeries", 1069 .probe = pSeries_probe, 1070 .setup_arch = pSeries_setup_arch, 1071 .init_IRQ = pseries_init_irq, 1072 .show_cpuinfo = pSeries_show_cpuinfo, 1073 .log_error = pSeries_log_error, 1074 .discover_phbs = pSeries_discover_phbs, 1075 .pcibios_fixup = pSeries_final_fixup, 1076 .restart = rtas_restart, 1077 .halt = rtas_halt, 1078 .panic = pseries_panic, 1079 .get_boot_time = rtas_get_boot_time, 1080 .get_rtc_time = rtas_get_rtc_time, 1081 .set_rtc_time = rtas_set_rtc_time, 1082 .calibrate_decr = generic_calibrate_decr, 1083 .progress = rtas_progress, 1084 .system_reset_exception = pSeries_system_reset_exception, 1085 .machine_check_early = pseries_machine_check_realmode, 1086 .machine_check_exception = pSeries_machine_check_exception, 1087 #ifdef CONFIG_KEXEC_CORE 1088 .machine_kexec = pSeries_machine_kexec, 1089 .kexec_cpu_down = pseries_kexec_cpu_down, 1090 #endif 1091 #ifdef CONFIG_MEMORY_HOTPLUG 1092 .memory_block_size = pseries_memory_block_size, 1093 #endif 1094 }; 1095