1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * 64-bit pSeries and RS/6000 setup code. 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Adapted from 'alpha' version by Gary Thomas 7 * Modified by Cort Dougan (cort@cs.nmt.edu) 8 * Modified by PPC64 Team, IBM Corp 9 */ 10 11 /* 12 * bootup setup stuff.. 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/errno.h> 17 #include <linux/sched.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/stddef.h> 21 #include <linux/unistd.h> 22 #include <linux/user.h> 23 #include <linux/tty.h> 24 #include <linux/major.h> 25 #include <linux/interrupt.h> 26 #include <linux/reboot.h> 27 #include <linux/init.h> 28 #include <linux/ioport.h> 29 #include <linux/console.h> 30 #include <linux/pci.h> 31 #include <linux/utsname.h> 32 #include <linux/adb.h> 33 #include <linux/export.h> 34 #include <linux/delay.h> 35 #include <linux/irq.h> 36 #include <linux/seq_file.h> 37 #include <linux/root_dev.h> 38 #include <linux/of.h> 39 #include <linux/of_pci.h> 40 #include <linux/memblock.h> 41 #include <linux/swiotlb.h> 42 43 #include <asm/mmu.h> 44 #include <asm/processor.h> 45 #include <asm/io.h> 46 #include <asm/pgtable.h> 47 #include <asm/prom.h> 48 #include <asm/rtas.h> 49 #include <asm/pci-bridge.h> 50 #include <asm/iommu.h> 51 #include <asm/dma.h> 52 #include <asm/machdep.h> 53 #include <asm/irq.h> 54 #include <asm/time.h> 55 #include <asm/nvram.h> 56 #include <asm/pmc.h> 57 #include <asm/xics.h> 58 #include <asm/xive.h> 59 #include <asm/ppc-pci.h> 60 #include <asm/i8259.h> 61 #include <asm/udbg.h> 62 #include <asm/smp.h> 63 #include <asm/firmware.h> 64 #include <asm/eeh.h> 65 #include <asm/reg.h> 66 #include <asm/plpar_wrappers.h> 67 #include <asm/kexec.h> 68 #include <asm/isa-bridge.h> 69 #include <asm/security_features.h> 70 #include <asm/asm-const.h> 71 #include <asm/swiotlb.h> 72 #include <asm/svm.h> 73 74 #include "pseries.h" 75 #include "../../../../drivers/pci/pci.h" 76 77 DEFINE_STATIC_KEY_FALSE(shared_processor); 78 EXPORT_SYMBOL_GPL(shared_processor); 79 80 int CMO_PrPSP = -1; 81 int CMO_SecPSP = -1; 82 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); 83 EXPORT_SYMBOL(CMO_PageSize); 84 85 int fwnmi_active; /* TRUE if an FWNMI handler is present */ 86 87 static void pSeries_show_cpuinfo(struct seq_file *m) 88 { 89 struct device_node *root; 90 const char *model = ""; 91 92 root = of_find_node_by_path("/"); 93 if (root) 94 model = of_get_property(root, "model", NULL); 95 seq_printf(m, "machine\t\t: CHRP %s\n", model); 96 of_node_put(root); 97 if (radix_enabled()) 98 seq_printf(m, "MMU\t\t: Radix\n"); 99 else 100 seq_printf(m, "MMU\t\t: Hash\n"); 101 } 102 103 /* Initialize firmware assisted non-maskable interrupts if 104 * the firmware supports this feature. 105 */ 106 static void __init fwnmi_init(void) 107 { 108 unsigned long system_reset_addr, machine_check_addr; 109 u8 *mce_data_buf; 110 unsigned int i; 111 int nr_cpus = num_possible_cpus(); 112 #ifdef CONFIG_PPC_BOOK3S_64 113 struct slb_entry *slb_ptr; 114 size_t size; 115 #endif 116 117 int ibm_nmi_register = rtas_token("ibm,nmi-register"); 118 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) 119 return; 120 121 /* If the kernel's not linked at zero we point the firmware at low 122 * addresses anyway, and use a trampoline to get to the real code. */ 123 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; 124 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; 125 126 if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, 127 machine_check_addr)) 128 fwnmi_active = 1; 129 130 /* 131 * Allocate a chunk for per cpu buffer to hold rtas errorlog. 132 * It will be used in real mode mce handler, hence it needs to be 133 * below RMA. 134 */ 135 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus, 136 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT, 137 ppc64_rma_size, NUMA_NO_NODE); 138 if (!mce_data_buf) 139 panic("Failed to allocate %d bytes below %pa for MCE buffer\n", 140 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size); 141 142 for_each_possible_cpu(i) { 143 paca_ptrs[i]->mce_data_buf = mce_data_buf + 144 (RTAS_ERROR_LOG_MAX * i); 145 } 146 147 #ifdef CONFIG_PPC_BOOK3S_64 148 if (!radix_enabled()) { 149 /* Allocate per cpu area to save old slb contents during MCE */ 150 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; 151 slb_ptr = memblock_alloc_try_nid_raw(size, 152 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, 153 ppc64_rma_size, NUMA_NO_NODE); 154 if (!slb_ptr) 155 panic("Failed to allocate %zu bytes below %pa for slb area\n", 156 size, &ppc64_rma_size); 157 158 for_each_possible_cpu(i) 159 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); 160 } 161 #endif 162 } 163 164 static void pseries_8259_cascade(struct irq_desc *desc) 165 { 166 struct irq_chip *chip = irq_desc_get_chip(desc); 167 unsigned int cascade_irq = i8259_irq(); 168 169 if (cascade_irq) 170 generic_handle_irq(cascade_irq); 171 172 chip->irq_eoi(&desc->irq_data); 173 } 174 175 static void __init pseries_setup_i8259_cascade(void) 176 { 177 struct device_node *np, *old, *found = NULL; 178 unsigned int cascade; 179 const u32 *addrp; 180 unsigned long intack = 0; 181 int naddr; 182 183 for_each_node_by_type(np, "interrupt-controller") { 184 if (of_device_is_compatible(np, "chrp,iic")) { 185 found = np; 186 break; 187 } 188 } 189 190 if (found == NULL) { 191 printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); 192 return; 193 } 194 195 cascade = irq_of_parse_and_map(found, 0); 196 if (!cascade) { 197 printk(KERN_ERR "pic: failed to map cascade interrupt"); 198 return; 199 } 200 pr_debug("pic: cascade mapped to irq %d\n", cascade); 201 202 for (old = of_node_get(found); old != NULL ; old = np) { 203 np = of_get_parent(old); 204 of_node_put(old); 205 if (np == NULL) 206 break; 207 if (!of_node_name_eq(np, "pci")) 208 continue; 209 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 210 if (addrp == NULL) 211 continue; 212 naddr = of_n_addr_cells(np); 213 intack = addrp[naddr-1]; 214 if (naddr > 1) 215 intack |= ((unsigned long)addrp[naddr-2]) << 32; 216 } 217 if (intack) 218 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 219 i8259_init(found, intack); 220 of_node_put(found); 221 irq_set_chained_handler(cascade, pseries_8259_cascade); 222 } 223 224 static void __init pseries_init_irq(void) 225 { 226 /* Try using a XIVE if available, otherwise use a XICS */ 227 if (!xive_spapr_init()) { 228 xics_init(); 229 pseries_setup_i8259_cascade(); 230 } 231 } 232 233 static void pseries_lpar_enable_pmcs(void) 234 { 235 unsigned long set, reset; 236 237 set = 1UL << 63; 238 reset = 0; 239 plpar_hcall_norets(H_PERFMON, set, reset); 240 } 241 242 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) 243 { 244 struct of_reconfig_data *rd = data; 245 struct device_node *parent, *np = rd->dn; 246 struct pci_dn *pdn; 247 int err = NOTIFY_OK; 248 249 switch (action) { 250 case OF_RECONFIG_ATTACH_NODE: 251 parent = of_get_parent(np); 252 pdn = parent ? PCI_DN(parent) : NULL; 253 if (pdn) 254 pci_add_device_node_info(pdn->phb, np); 255 256 of_node_put(parent); 257 break; 258 case OF_RECONFIG_DETACH_NODE: 259 pdn = PCI_DN(np); 260 if (pdn) 261 list_del(&pdn->list); 262 break; 263 default: 264 err = NOTIFY_DONE; 265 break; 266 } 267 return err; 268 } 269 270 static struct notifier_block pci_dn_reconfig_nb = { 271 .notifier_call = pci_dn_reconfig_notifier, 272 }; 273 274 struct kmem_cache *dtl_cache; 275 276 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 277 /* 278 * Allocate space for the dispatch trace log for all possible cpus 279 * and register the buffers with the hypervisor. This is used for 280 * computing time stolen by the hypervisor. 281 */ 282 static int alloc_dispatch_logs(void) 283 { 284 if (!firmware_has_feature(FW_FEATURE_SPLPAR)) 285 return 0; 286 287 if (!dtl_cache) 288 return 0; 289 290 alloc_dtl_buffers(0); 291 292 /* Register the DTL for the current (boot) cpu */ 293 register_dtl_buffer(smp_processor_id()); 294 295 return 0; 296 } 297 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 298 static inline int alloc_dispatch_logs(void) 299 { 300 return 0; 301 } 302 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 303 304 static int alloc_dispatch_log_kmem_cache(void) 305 { 306 void (*ctor)(void *) = get_dtl_cache_ctor(); 307 308 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, 309 DISPATCH_LOG_BYTES, 0, ctor); 310 if (!dtl_cache) { 311 pr_warn("Failed to create dispatch trace log buffer cache\n"); 312 pr_warn("Stolen time statistics will be unreliable\n"); 313 return 0; 314 } 315 316 return alloc_dispatch_logs(); 317 } 318 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); 319 320 static void pseries_lpar_idle(void) 321 { 322 /* 323 * Default handler to go into low thread priority and possibly 324 * low power mode by ceding processor to hypervisor 325 */ 326 327 if (!prep_irq_for_idle()) 328 return; 329 330 /* Indicate to hypervisor that we are idle. */ 331 get_lppaca()->idle = 1; 332 333 /* 334 * Yield the processor to the hypervisor. We return if 335 * an external interrupt occurs (which are driven prior 336 * to returning here) or if a prod occurs from another 337 * processor. When returning here, external interrupts 338 * are enabled. 339 */ 340 cede_processor(); 341 342 get_lppaca()->idle = 0; 343 } 344 345 /* 346 * Enable relocation on during exceptions. This has partition wide scope and 347 * may take a while to complete, if it takes longer than one second we will 348 * just give up rather than wasting any more time on this - if that turns out 349 * to ever be a problem in practice we can move this into a kernel thread to 350 * finish off the process later in boot. 351 */ 352 void pseries_enable_reloc_on_exc(void) 353 { 354 long rc; 355 unsigned int delay, total_delay = 0; 356 357 while (1) { 358 rc = enable_reloc_on_exceptions(); 359 if (!H_IS_LONG_BUSY(rc)) { 360 if (rc == H_P2) { 361 pr_info("Relocation on exceptions not" 362 " supported\n"); 363 } else if (rc != H_SUCCESS) { 364 pr_warn("Unable to enable relocation" 365 " on exceptions: %ld\n", rc); 366 } 367 break; 368 } 369 370 delay = get_longbusy_msecs(rc); 371 total_delay += delay; 372 if (total_delay > 1000) { 373 pr_warn("Warning: Giving up waiting to enable " 374 "relocation on exceptions (%u msec)!\n", 375 total_delay); 376 return; 377 } 378 379 mdelay(delay); 380 } 381 } 382 EXPORT_SYMBOL(pseries_enable_reloc_on_exc); 383 384 void pseries_disable_reloc_on_exc(void) 385 { 386 long rc; 387 388 while (1) { 389 rc = disable_reloc_on_exceptions(); 390 if (!H_IS_LONG_BUSY(rc)) 391 break; 392 mdelay(get_longbusy_msecs(rc)); 393 } 394 if (rc != H_SUCCESS) 395 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", 396 rc); 397 } 398 EXPORT_SYMBOL(pseries_disable_reloc_on_exc); 399 400 #ifdef CONFIG_KEXEC_CORE 401 static void pSeries_machine_kexec(struct kimage *image) 402 { 403 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 404 pseries_disable_reloc_on_exc(); 405 406 default_machine_kexec(image); 407 } 408 #endif 409 410 #ifdef __LITTLE_ENDIAN__ 411 void pseries_big_endian_exceptions(void) 412 { 413 long rc; 414 415 while (1) { 416 rc = enable_big_endian_exceptions(); 417 if (!H_IS_LONG_BUSY(rc)) 418 break; 419 mdelay(get_longbusy_msecs(rc)); 420 } 421 422 /* 423 * At this point it is unlikely panic() will get anything 424 * out to the user, since this is called very late in kexec 425 * but at least this will stop us from continuing on further 426 * and creating an even more difficult to debug situation. 427 * 428 * There is a known problem when kdump'ing, if cpus are offline 429 * the above call will fail. Rather than panicking again, keep 430 * going and hope the kdump kernel is also little endian, which 431 * it usually is. 432 */ 433 if (rc && !kdump_in_progress()) 434 panic("Could not enable big endian exceptions"); 435 } 436 437 void pseries_little_endian_exceptions(void) 438 { 439 long rc; 440 441 while (1) { 442 rc = enable_little_endian_exceptions(); 443 if (!H_IS_LONG_BUSY(rc)) 444 break; 445 mdelay(get_longbusy_msecs(rc)); 446 } 447 if (rc) { 448 ppc_md.progress("H_SET_MODE LE exception fail", 0); 449 panic("Could not enable little endian exceptions"); 450 } 451 } 452 #endif 453 454 static void __init find_and_init_phbs(void) 455 { 456 struct device_node *node; 457 struct pci_controller *phb; 458 struct device_node *root = of_find_node_by_path("/"); 459 460 for_each_child_of_node(root, node) { 461 if (!of_node_is_type(node, "pci") && 462 !of_node_is_type(node, "pciex")) 463 continue; 464 465 phb = pcibios_alloc_controller(node); 466 if (!phb) 467 continue; 468 rtas_setup_phb(phb); 469 pci_process_bridge_OF_ranges(phb, node, 0); 470 isa_bridge_find_early(phb); 471 phb->controller_ops = pseries_pci_controller_ops; 472 } 473 474 of_node_put(root); 475 476 /* 477 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties 478 * in chosen. 479 */ 480 of_pci_check_probe_only(); 481 } 482 483 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) 484 { 485 /* 486 * The features below are disabled by default, so we instead look to see 487 * if firmware has *enabled* them, and set them if so. 488 */ 489 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) 490 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 491 492 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) 493 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 494 495 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) 496 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 497 498 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) 499 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 500 501 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) 502 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 503 504 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) 505 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 506 507 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) 508 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 509 510 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) 511 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 512 513 /* 514 * The features below are enabled by default, so we instead look to see 515 * if firmware has *disabled* them, and clear them if so. 516 */ 517 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) 518 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 519 520 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) 521 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 522 523 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) 524 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 525 } 526 527 void pseries_setup_rfi_flush(void) 528 { 529 struct h_cpu_char_result result; 530 enum l1d_flush_type types; 531 bool enable; 532 long rc; 533 534 /* 535 * Set features to the defaults assumed by init_cpu_char_feature_flags() 536 * so it can set/clear again any features that might have changed after 537 * migration, and in case the hypercall fails and it is not even called. 538 */ 539 powerpc_security_features = SEC_FTR_DEFAULT; 540 541 rc = plpar_get_cpu_characteristics(&result); 542 if (rc == H_SUCCESS) 543 init_cpu_char_feature_flags(&result); 544 545 /* 546 * We're the guest so this doesn't apply to us, clear it to simplify 547 * handling of it elsewhere. 548 */ 549 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 550 551 types = L1D_FLUSH_FALLBACK; 552 553 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 554 types |= L1D_FLUSH_MTTRIG; 555 556 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 557 types |= L1D_FLUSH_ORI; 558 559 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 560 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); 561 562 setup_rfi_flush(types, enable); 563 setup_count_cache_flush(); 564 } 565 566 #ifdef CONFIG_PCI_IOV 567 enum rtas_iov_fw_value_map { 568 NUM_RES_PROPERTY = 0, /* Number of Resources */ 569 LOW_INT = 1, /* Lowest 32 bits of Address */ 570 START_OF_ENTRIES = 2, /* Always start of entry */ 571 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ 572 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ 573 NEXT_ENTRY = 7 /* Go to next entry on array */ 574 }; 575 576 enum get_iov_fw_value_index { 577 BAR_ADDRS = 1, /* Get Bar Address */ 578 APERTURE_SIZE = 2, /* Get Aperture Size */ 579 WDW_SIZE = 3 /* Get Window Size */ 580 }; 581 582 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, 583 enum get_iov_fw_value_index value) 584 { 585 const int *indexes; 586 struct device_node *dn = pci_device_to_OF_node(dev); 587 int i, num_res, ret = 0; 588 589 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 590 if (!indexes) 591 return 0; 592 593 /* 594 * First element in the array is the number of Bars 595 * returned. Search through the list to find the matching 596 * bar 597 */ 598 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 599 if (resno >= num_res) 600 return 0; /* or an errror */ 601 602 i = START_OF_ENTRIES + NEXT_ENTRY * resno; 603 switch (value) { 604 case BAR_ADDRS: 605 ret = of_read_number(&indexes[i], 2); 606 break; 607 case APERTURE_SIZE: 608 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 609 break; 610 case WDW_SIZE: 611 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 612 break; 613 } 614 615 return ret; 616 } 617 618 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) 619 { 620 struct resource *res; 621 resource_size_t base, size; 622 int i, r, num_res; 623 624 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 625 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); 626 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 627 i += NEXT_ENTRY, r++) { 628 res = &dev->resource[r + PCI_IOV_RESOURCES]; 629 base = of_read_number(&indexes[i], 2); 630 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 631 res->flags = pci_parse_of_flags(of_read_number 632 (&indexes[i + LOW_INT], 1), 0); 633 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); 634 res->name = pci_name(dev); 635 res->start = base; 636 res->end = base + size - 1; 637 } 638 } 639 640 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) 641 { 642 struct resource *res, *root, *conflict; 643 resource_size_t base, size; 644 int i, r, num_res; 645 646 /* 647 * First element in the array is the number of Bars 648 * returned. Search through the list to find the matching 649 * bars assign them from firmware into resources structure. 650 */ 651 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 652 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 653 i += NEXT_ENTRY, r++) { 654 res = &dev->resource[r + PCI_IOV_RESOURCES]; 655 base = of_read_number(&indexes[i], 2); 656 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 657 res->name = pci_name(dev); 658 res->start = base; 659 res->end = base + size - 1; 660 root = &iomem_resource; 661 dev_dbg(&dev->dev, 662 "pSeries IOV BAR %d: trying firmware assignment %pR\n", 663 r + PCI_IOV_RESOURCES, res); 664 conflict = request_resource_conflict(root, res); 665 if (conflict) { 666 dev_info(&dev->dev, 667 "BAR %d: %pR conflicts with %s %pR\n", 668 r + PCI_IOV_RESOURCES, res, 669 conflict->name, conflict); 670 res->flags |= IORESOURCE_UNSET; 671 } 672 } 673 } 674 675 static void pseries_disable_sriov_resources(struct pci_dev *pdev) 676 { 677 int i; 678 679 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); 680 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) 681 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; 682 } 683 684 static void pseries_pci_fixup_resources(struct pci_dev *pdev) 685 { 686 const int *indexes; 687 struct device_node *dn = pci_device_to_OF_node(pdev); 688 689 /*Firmware must support open sriov otherwise dont configure*/ 690 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 691 if (indexes) 692 of_pci_set_vf_bar_size(pdev, indexes); 693 else 694 pseries_disable_sriov_resources(pdev); 695 } 696 697 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) 698 { 699 const int *indexes; 700 struct device_node *dn = pci_device_to_OF_node(pdev); 701 702 if (!pdev->is_physfn || pci_dev_is_added(pdev)) 703 return; 704 /*Firmware must support open sriov otherwise dont configure*/ 705 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 706 if (indexes) 707 of_pci_parse_iov_addrs(pdev, indexes); 708 else 709 pseries_disable_sriov_resources(pdev); 710 } 711 712 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, 713 int resno) 714 { 715 const __be32 *reg; 716 struct device_node *dn = pci_device_to_OF_node(pdev); 717 718 /*Firmware must support open sriov otherwise report regular alignment*/ 719 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); 720 if (!reg) 721 return pci_iov_resource_size(pdev, resno); 722 723 if (!pdev->is_physfn) 724 return 0; 725 return pseries_get_iov_fw_value(pdev, 726 resno - PCI_IOV_RESOURCES, 727 APERTURE_SIZE); 728 } 729 #endif 730 731 static void __init pSeries_setup_arch(void) 732 { 733 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 734 735 /* Discover PIC type and setup ppc_md accordingly */ 736 smp_init_pseries(); 737 738 739 /* openpic global configuration register (64-bit format). */ 740 /* openpic Interrupt Source Unit pointer (64-bit format). */ 741 /* python0 facility area (mmio) (64-bit format) REAL address. */ 742 743 /* init to some ~sane value until calibrate_delay() runs */ 744 loops_per_jiffy = 50000000; 745 746 fwnmi_init(); 747 748 pseries_setup_rfi_flush(); 749 setup_stf_barrier(); 750 pseries_lpar_read_hblkrm_characteristics(); 751 752 /* By default, only probe PCI (can be overridden by rtas_pci) */ 753 pci_add_flags(PCI_PROBE_ONLY); 754 755 /* Find and initialize PCI host bridges */ 756 init_pci_config_tokens(); 757 find_and_init_phbs(); 758 of_reconfig_notifier_register(&pci_dn_reconfig_nb); 759 760 pSeries_nvram_init(); 761 762 if (firmware_has_feature(FW_FEATURE_LPAR)) { 763 vpa_init(boot_cpuid); 764 765 if (lppaca_shared_proc(get_lppaca())) 766 static_branch_enable(&shared_processor); 767 768 ppc_md.power_save = pseries_lpar_idle; 769 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; 770 #ifdef CONFIG_PCI_IOV 771 ppc_md.pcibios_fixup_resources = 772 pseries_pci_fixup_resources; 773 ppc_md.pcibios_fixup_sriov = 774 pseries_pci_fixup_iov_resources; 775 ppc_md.pcibios_iov_resource_alignment = 776 pseries_pci_iov_resource_alignment; 777 #endif 778 } else { 779 /* No special idle routine */ 780 ppc_md.enable_pmcs = power4_enable_pmcs; 781 } 782 783 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; 784 785 if (swiotlb_force == SWIOTLB_FORCE) 786 ppc_swiotlb_enable = 1; 787 } 788 789 static void pseries_panic(char *str) 790 { 791 panic_flush_kmsg_end(); 792 rtas_os_term(str); 793 } 794 795 static int __init pSeries_init_panel(void) 796 { 797 /* Manually leave the kernel version on the panel. */ 798 #ifdef __BIG_ENDIAN__ 799 ppc_md.progress("Linux ppc64\n", 0); 800 #else 801 ppc_md.progress("Linux ppc64le\n", 0); 802 #endif 803 ppc_md.progress(init_utsname()->version, 0); 804 805 return 0; 806 } 807 machine_arch_initcall(pseries, pSeries_init_panel); 808 809 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) 810 { 811 return plpar_hcall_norets(H_SET_DABR, dabr); 812 } 813 814 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) 815 { 816 /* Have to set at least one bit in the DABRX according to PAPR */ 817 if (dabrx == 0 && dabr == 0) 818 dabrx = DABRX_USER; 819 /* PAPR says we can only set kernel and user bits */ 820 dabrx &= DABRX_KERNEL | DABRX_USER; 821 822 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 823 } 824 825 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx) 826 { 827 /* PAPR says we can't set HYP */ 828 dawrx &= ~DAWRX_HYP; 829 830 return plpar_set_watchpoint0(dawr, dawrx); 831 } 832 833 #define CMO_CHARACTERISTICS_TOKEN 44 834 #define CMO_MAXLENGTH 1026 835 836 void pSeries_coalesce_init(void) 837 { 838 struct hvcall_mpp_x_data mpp_x_data; 839 840 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) 841 powerpc_firmware_features |= FW_FEATURE_XCMO; 842 else 843 powerpc_firmware_features &= ~FW_FEATURE_XCMO; 844 } 845 846 /** 847 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, 848 * handle that here. (Stolen from parse_system_parameter_string) 849 */ 850 static void pSeries_cmo_feature_init(void) 851 { 852 char *ptr, *key, *value, *end; 853 int call_status; 854 int page_order = IOMMU_PAGE_SHIFT_4K; 855 856 pr_debug(" -> fw_cmo_feature_init()\n"); 857 spin_lock(&rtas_data_buf_lock); 858 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); 859 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, 860 NULL, 861 CMO_CHARACTERISTICS_TOKEN, 862 __pa(rtas_data_buf), 863 RTAS_DATA_BUF_SIZE); 864 865 if (call_status != 0) { 866 spin_unlock(&rtas_data_buf_lock); 867 pr_debug("CMO not available\n"); 868 pr_debug(" <- fw_cmo_feature_init()\n"); 869 return; 870 } 871 872 end = rtas_data_buf + CMO_MAXLENGTH - 2; 873 ptr = rtas_data_buf + 2; /* step over strlen value */ 874 key = value = ptr; 875 876 while (*ptr && (ptr <= end)) { 877 /* Separate the key and value by replacing '=' with '\0' and 878 * point the value at the string after the '=' 879 */ 880 if (ptr[0] == '=') { 881 ptr[0] = '\0'; 882 value = ptr + 1; 883 } else if (ptr[0] == '\0' || ptr[0] == ',') { 884 /* Terminate the string containing the key/value pair */ 885 ptr[0] = '\0'; 886 887 if (key == value) { 888 pr_debug("Malformed key/value pair\n"); 889 /* Never found a '=', end processing */ 890 break; 891 } 892 893 if (0 == strcmp(key, "CMOPageSize")) 894 page_order = simple_strtol(value, NULL, 10); 895 else if (0 == strcmp(key, "PrPSP")) 896 CMO_PrPSP = simple_strtol(value, NULL, 10); 897 else if (0 == strcmp(key, "SecPSP")) 898 CMO_SecPSP = simple_strtol(value, NULL, 10); 899 value = key = ptr + 1; 900 } 901 ptr++; 902 } 903 904 /* Page size is returned as the power of 2 of the page size, 905 * convert to the page size in bytes before returning 906 */ 907 CMO_PageSize = 1 << page_order; 908 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); 909 910 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { 911 pr_info("CMO enabled\n"); 912 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 913 CMO_SecPSP); 914 powerpc_firmware_features |= FW_FEATURE_CMO; 915 pSeries_coalesce_init(); 916 } else 917 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 918 CMO_SecPSP); 919 spin_unlock(&rtas_data_buf_lock); 920 pr_debug(" <- fw_cmo_feature_init()\n"); 921 } 922 923 /* 924 * Early initialization. Relocation is on but do not reference unbolted pages 925 */ 926 static void __init pseries_init(void) 927 { 928 pr_debug(" -> pseries_init()\n"); 929 930 #ifdef CONFIG_HVC_CONSOLE 931 if (firmware_has_feature(FW_FEATURE_LPAR)) 932 hvc_vio_init_early(); 933 #endif 934 if (firmware_has_feature(FW_FEATURE_XDABR)) 935 ppc_md.set_dabr = pseries_set_xdabr; 936 else if (firmware_has_feature(FW_FEATURE_DABR)) 937 ppc_md.set_dabr = pseries_set_dabr; 938 939 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 940 ppc_md.set_dawr = pseries_set_dawr; 941 942 pSeries_cmo_feature_init(); 943 iommu_init_early_pSeries(); 944 945 pr_debug(" <- pseries_init()\n"); 946 } 947 948 /** 949 * pseries_power_off - tell firmware about how to power off the system. 950 * 951 * This function calls either the power-off rtas token in normal cases 952 * or the ibm,power-off-ups token (if present & requested) in case of 953 * a power failure. If power-off token is used, power on will only be 954 * possible with power button press. If ibm,power-off-ups token is used 955 * it will allow auto poweron after power is restored. 956 */ 957 static void pseries_power_off(void) 958 { 959 int rc; 960 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); 961 962 if (rtas_flash_term_hook) 963 rtas_flash_term_hook(SYS_POWER_OFF); 964 965 if (rtas_poweron_auto == 0 || 966 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { 967 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); 968 printk(KERN_INFO "RTAS power-off returned %d\n", rc); 969 } else { 970 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); 971 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); 972 } 973 for (;;); 974 } 975 976 static int __init pSeries_probe(void) 977 { 978 if (!of_node_is_type(of_root, "chrp")) 979 return 0; 980 981 /* Cell blades firmware claims to be chrp while it's not. Until this 982 * is fixed, we need to avoid those here. 983 */ 984 if (of_machine_is_compatible("IBM,CPBW-1.0") || 985 of_machine_is_compatible("IBM,CBEA")) 986 return 0; 987 988 pm_power_off = pseries_power_off; 989 990 pr_debug("Machine is%s LPAR !\n", 991 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 992 993 pseries_init(); 994 995 return 1; 996 } 997 998 static int pSeries_pci_probe_mode(struct pci_bus *bus) 999 { 1000 if (firmware_has_feature(FW_FEATURE_LPAR)) 1001 return PCI_PROBE_DEVTREE; 1002 return PCI_PROBE_NORMAL; 1003 } 1004 1005 struct pci_controller_ops pseries_pci_controller_ops = { 1006 .probe_mode = pSeries_pci_probe_mode, 1007 }; 1008 1009 define_machine(pseries) { 1010 .name = "pSeries", 1011 .probe = pSeries_probe, 1012 .setup_arch = pSeries_setup_arch, 1013 .init_IRQ = pseries_init_irq, 1014 .show_cpuinfo = pSeries_show_cpuinfo, 1015 .log_error = pSeries_log_error, 1016 .pcibios_fixup = pSeries_final_fixup, 1017 .restart = rtas_restart, 1018 .halt = rtas_halt, 1019 .panic = pseries_panic, 1020 .get_boot_time = rtas_get_boot_time, 1021 .get_rtc_time = rtas_get_rtc_time, 1022 .set_rtc_time = rtas_set_rtc_time, 1023 .calibrate_decr = generic_calibrate_decr, 1024 .progress = rtas_progress, 1025 .system_reset_exception = pSeries_system_reset_exception, 1026 .machine_check_early = pseries_machine_check_realmode, 1027 .machine_check_exception = pSeries_machine_check_exception, 1028 #ifdef CONFIG_KEXEC_CORE 1029 .machine_kexec = pSeries_machine_kexec, 1030 .kexec_cpu_down = pseries_kexec_cpu_down, 1031 #endif 1032 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 1033 .memory_block_size = pseries_memory_block_size, 1034 #endif 1035 }; 1036