1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * 64-bit pSeries and RS/6000 setup code. 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Adapted from 'alpha' version by Gary Thomas 7 * Modified by Cort Dougan (cort@cs.nmt.edu) 8 * Modified by PPC64 Team, IBM Corp 9 */ 10 11 /* 12 * bootup setup stuff.. 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/errno.h> 17 #include <linux/platform_device.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/stddef.h> 22 #include <linux/unistd.h> 23 #include <linux/user.h> 24 #include <linux/tty.h> 25 #include <linux/major.h> 26 #include <linux/interrupt.h> 27 #include <linux/reboot.h> 28 #include <linux/init.h> 29 #include <linux/ioport.h> 30 #include <linux/console.h> 31 #include <linux/pci.h> 32 #include <linux/utsname.h> 33 #include <linux/adb.h> 34 #include <linux/export.h> 35 #include <linux/delay.h> 36 #include <linux/irq.h> 37 #include <linux/seq_file.h> 38 #include <linux/root_dev.h> 39 #include <linux/of.h> 40 #include <linux/of_irq.h> 41 #include <linux/of_pci.h> 42 #include <linux/memblock.h> 43 #include <linux/swiotlb.h> 44 45 #include <asm/mmu.h> 46 #include <asm/processor.h> 47 #include <asm/io.h> 48 #include <asm/rtas.h> 49 #include <asm/pci-bridge.h> 50 #include <asm/iommu.h> 51 #include <asm/dma.h> 52 #include <asm/machdep.h> 53 #include <asm/irq.h> 54 #include <asm/time.h> 55 #include <asm/nvram.h> 56 #include <asm/pmc.h> 57 #include <asm/xics.h> 58 #include <asm/xive.h> 59 #include <asm/ppc-pci.h> 60 #include <asm/i8259.h> 61 #include <asm/udbg.h> 62 #include <asm/smp.h> 63 #include <asm/firmware.h> 64 #include <asm/eeh.h> 65 #include <asm/reg.h> 66 #include <asm/plpar_wrappers.h> 67 #include <asm/kexec.h> 68 #include <asm/isa-bridge.h> 69 #include <asm/security_features.h> 70 #include <asm/asm-const.h> 71 #include <asm/idle.h> 72 #include <asm/swiotlb.h> 73 #include <asm/svm.h> 74 #include <asm/dtl.h> 75 #include <asm/hvconsole.h> 76 #include <asm/setup.h> 77 78 #include "pseries.h" 79 80 DEFINE_STATIC_KEY_FALSE(shared_processor); 81 EXPORT_SYMBOL(shared_processor); 82 83 int CMO_PrPSP = -1; 84 int CMO_SecPSP = -1; 85 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); 86 EXPORT_SYMBOL(CMO_PageSize); 87 88 int fwnmi_active; /* TRUE if an FWNMI handler is present */ 89 int ibm_nmi_interlock_token; 90 u32 pseries_security_flavor; 91 92 static void pSeries_show_cpuinfo(struct seq_file *m) 93 { 94 struct device_node *root; 95 const char *model = ""; 96 97 root = of_find_node_by_path("/"); 98 if (root) 99 model = of_get_property(root, "model", NULL); 100 seq_printf(m, "machine\t\t: CHRP %s\n", model); 101 of_node_put(root); 102 if (radix_enabled()) 103 seq_printf(m, "MMU\t\t: Radix\n"); 104 else 105 seq_printf(m, "MMU\t\t: Hash\n"); 106 } 107 108 /* Initialize firmware assisted non-maskable interrupts if 109 * the firmware supports this feature. 110 */ 111 static void __init fwnmi_init(void) 112 { 113 unsigned long system_reset_addr, machine_check_addr; 114 u8 *mce_data_buf; 115 unsigned int i; 116 int nr_cpus = num_possible_cpus(); 117 #ifdef CONFIG_PPC_64S_HASH_MMU 118 struct slb_entry *slb_ptr; 119 size_t size; 120 #endif 121 int ibm_nmi_register_token; 122 123 ibm_nmi_register_token = rtas_token("ibm,nmi-register"); 124 if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE) 125 return; 126 127 ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock"); 128 if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE)) 129 return; 130 131 /* If the kernel's not linked at zero we point the firmware at low 132 * addresses anyway, and use a trampoline to get to the real code. */ 133 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; 134 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; 135 136 if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL, 137 system_reset_addr, machine_check_addr)) 138 fwnmi_active = 1; 139 140 /* 141 * Allocate a chunk for per cpu buffer to hold rtas errorlog. 142 * It will be used in real mode mce handler, hence it needs to be 143 * below RMA. 144 */ 145 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus, 146 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT, 147 ppc64_rma_size, NUMA_NO_NODE); 148 if (!mce_data_buf) 149 panic("Failed to allocate %d bytes below %pa for MCE buffer\n", 150 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size); 151 152 for_each_possible_cpu(i) { 153 paca_ptrs[i]->mce_data_buf = mce_data_buf + 154 (RTAS_ERROR_LOG_MAX * i); 155 } 156 157 #ifdef CONFIG_PPC_64S_HASH_MMU 158 if (!radix_enabled()) { 159 /* Allocate per cpu area to save old slb contents during MCE */ 160 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; 161 slb_ptr = memblock_alloc_try_nid_raw(size, 162 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, 163 ppc64_rma_size, NUMA_NO_NODE); 164 if (!slb_ptr) 165 panic("Failed to allocate %zu bytes below %pa for slb area\n", 166 size, &ppc64_rma_size); 167 168 for_each_possible_cpu(i) 169 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); 170 } 171 #endif 172 } 173 174 /* 175 * Affix a device for the first timer to the platform bus if 176 * we have firmware support for the H_WATCHDOG hypercall. 177 */ 178 static __init int pseries_wdt_init(void) 179 { 180 if (firmware_has_feature(FW_FEATURE_WATCHDOG)) 181 platform_device_register_simple("pseries-wdt", 0, NULL, 0); 182 return 0; 183 } 184 machine_subsys_initcall(pseries, pseries_wdt_init); 185 186 static void pseries_8259_cascade(struct irq_desc *desc) 187 { 188 struct irq_chip *chip = irq_desc_get_chip(desc); 189 unsigned int cascade_irq = i8259_irq(); 190 191 if (cascade_irq) 192 generic_handle_irq(cascade_irq); 193 194 chip->irq_eoi(&desc->irq_data); 195 } 196 197 static void __init pseries_setup_i8259_cascade(void) 198 { 199 struct device_node *np, *old, *found = NULL; 200 unsigned int cascade; 201 const u32 *addrp; 202 unsigned long intack = 0; 203 int naddr; 204 205 for_each_node_by_type(np, "interrupt-controller") { 206 if (of_device_is_compatible(np, "chrp,iic")) { 207 found = np; 208 break; 209 } 210 } 211 212 if (found == NULL) { 213 printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); 214 return; 215 } 216 217 cascade = irq_of_parse_and_map(found, 0); 218 if (!cascade) { 219 printk(KERN_ERR "pic: failed to map cascade interrupt"); 220 return; 221 } 222 pr_debug("pic: cascade mapped to irq %d\n", cascade); 223 224 for (old = of_node_get(found); old != NULL ; old = np) { 225 np = of_get_parent(old); 226 of_node_put(old); 227 if (np == NULL) 228 break; 229 if (!of_node_name_eq(np, "pci")) 230 continue; 231 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 232 if (addrp == NULL) 233 continue; 234 naddr = of_n_addr_cells(np); 235 intack = addrp[naddr-1]; 236 if (naddr > 1) 237 intack |= ((unsigned long)addrp[naddr-2]) << 32; 238 } 239 if (intack) 240 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 241 i8259_init(found, intack); 242 of_node_put(found); 243 irq_set_chained_handler(cascade, pseries_8259_cascade); 244 } 245 246 static void __init pseries_init_irq(void) 247 { 248 /* Try using a XIVE if available, otherwise use a XICS */ 249 if (!xive_spapr_init()) { 250 xics_init(); 251 pseries_setup_i8259_cascade(); 252 } 253 } 254 255 static void pseries_lpar_enable_pmcs(void) 256 { 257 unsigned long set, reset; 258 259 set = 1UL << 63; 260 reset = 0; 261 plpar_hcall_norets(H_PERFMON, set, reset); 262 } 263 264 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) 265 { 266 struct of_reconfig_data *rd = data; 267 struct device_node *parent, *np = rd->dn; 268 struct pci_dn *pdn; 269 int err = NOTIFY_OK; 270 271 switch (action) { 272 case OF_RECONFIG_ATTACH_NODE: 273 parent = of_get_parent(np); 274 pdn = parent ? PCI_DN(parent) : NULL; 275 if (pdn) 276 pci_add_device_node_info(pdn->phb, np); 277 278 of_node_put(parent); 279 break; 280 case OF_RECONFIG_DETACH_NODE: 281 pdn = PCI_DN(np); 282 if (pdn) 283 list_del(&pdn->list); 284 break; 285 default: 286 err = NOTIFY_DONE; 287 break; 288 } 289 return err; 290 } 291 292 static struct notifier_block pci_dn_reconfig_nb = { 293 .notifier_call = pci_dn_reconfig_notifier, 294 }; 295 296 struct kmem_cache *dtl_cache; 297 298 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 299 /* 300 * Allocate space for the dispatch trace log for all possible cpus 301 * and register the buffers with the hypervisor. This is used for 302 * computing time stolen by the hypervisor. 303 */ 304 static int alloc_dispatch_logs(void) 305 { 306 if (!firmware_has_feature(FW_FEATURE_SPLPAR)) 307 return 0; 308 309 if (!dtl_cache) 310 return 0; 311 312 alloc_dtl_buffers(0); 313 314 /* Register the DTL for the current (boot) cpu */ 315 register_dtl_buffer(smp_processor_id()); 316 317 return 0; 318 } 319 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 320 static inline int alloc_dispatch_logs(void) 321 { 322 return 0; 323 } 324 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 325 326 static int alloc_dispatch_log_kmem_cache(void) 327 { 328 void (*ctor)(void *) = get_dtl_cache_ctor(); 329 330 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, 331 DISPATCH_LOG_BYTES, 0, ctor); 332 if (!dtl_cache) { 333 pr_warn("Failed to create dispatch trace log buffer cache\n"); 334 pr_warn("Stolen time statistics will be unreliable\n"); 335 return 0; 336 } 337 338 return alloc_dispatch_logs(); 339 } 340 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); 341 342 DEFINE_PER_CPU(u64, idle_spurr_cycles); 343 DEFINE_PER_CPU(u64, idle_entry_purr_snap); 344 DEFINE_PER_CPU(u64, idle_entry_spurr_snap); 345 static void pseries_lpar_idle(void) 346 { 347 /* 348 * Default handler to go into low thread priority and possibly 349 * low power mode by ceding processor to hypervisor 350 */ 351 352 if (!prep_irq_for_idle()) 353 return; 354 355 /* Indicate to hypervisor that we are idle. */ 356 pseries_idle_prolog(); 357 358 /* 359 * Yield the processor to the hypervisor. We return if 360 * an external interrupt occurs (which are driven prior 361 * to returning here) or if a prod occurs from another 362 * processor. When returning here, external interrupts 363 * are enabled. 364 */ 365 cede_processor(); 366 367 pseries_idle_epilog(); 368 } 369 370 static bool pseries_reloc_on_exception_enabled; 371 372 bool pseries_reloc_on_exception(void) 373 { 374 return pseries_reloc_on_exception_enabled; 375 } 376 EXPORT_SYMBOL_GPL(pseries_reloc_on_exception); 377 378 /* 379 * Enable relocation on during exceptions. This has partition wide scope and 380 * may take a while to complete, if it takes longer than one second we will 381 * just give up rather than wasting any more time on this - if that turns out 382 * to ever be a problem in practice we can move this into a kernel thread to 383 * finish off the process later in boot. 384 */ 385 bool pseries_enable_reloc_on_exc(void) 386 { 387 long rc; 388 unsigned int delay, total_delay = 0; 389 390 while (1) { 391 rc = enable_reloc_on_exceptions(); 392 if (!H_IS_LONG_BUSY(rc)) { 393 if (rc == H_P2) { 394 pr_info("Relocation on exceptions not" 395 " supported\n"); 396 return false; 397 } else if (rc != H_SUCCESS) { 398 pr_warn("Unable to enable relocation" 399 " on exceptions: %ld\n", rc); 400 return false; 401 } 402 pseries_reloc_on_exception_enabled = true; 403 return true; 404 } 405 406 delay = get_longbusy_msecs(rc); 407 total_delay += delay; 408 if (total_delay > 1000) { 409 pr_warn("Warning: Giving up waiting to enable " 410 "relocation on exceptions (%u msec)!\n", 411 total_delay); 412 return false; 413 } 414 415 mdelay(delay); 416 } 417 } 418 EXPORT_SYMBOL(pseries_enable_reloc_on_exc); 419 420 void pseries_disable_reloc_on_exc(void) 421 { 422 long rc; 423 424 while (1) { 425 rc = disable_reloc_on_exceptions(); 426 if (!H_IS_LONG_BUSY(rc)) 427 break; 428 mdelay(get_longbusy_msecs(rc)); 429 } 430 if (rc == H_SUCCESS) 431 pseries_reloc_on_exception_enabled = false; 432 else 433 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", 434 rc); 435 } 436 EXPORT_SYMBOL(pseries_disable_reloc_on_exc); 437 438 #ifdef __LITTLE_ENDIAN__ 439 void pseries_big_endian_exceptions(void) 440 { 441 long rc; 442 443 while (1) { 444 rc = enable_big_endian_exceptions(); 445 if (!H_IS_LONG_BUSY(rc)) 446 break; 447 mdelay(get_longbusy_msecs(rc)); 448 } 449 450 /* 451 * At this point it is unlikely panic() will get anything 452 * out to the user, since this is called very late in kexec 453 * but at least this will stop us from continuing on further 454 * and creating an even more difficult to debug situation. 455 * 456 * There is a known problem when kdump'ing, if cpus are offline 457 * the above call will fail. Rather than panicking again, keep 458 * going and hope the kdump kernel is also little endian, which 459 * it usually is. 460 */ 461 if (rc && !kdump_in_progress()) 462 panic("Could not enable big endian exceptions"); 463 } 464 465 void __init pseries_little_endian_exceptions(void) 466 { 467 long rc; 468 469 while (1) { 470 rc = enable_little_endian_exceptions(); 471 if (!H_IS_LONG_BUSY(rc)) 472 break; 473 mdelay(get_longbusy_msecs(rc)); 474 } 475 if (rc) { 476 ppc_md.progress("H_SET_MODE LE exception fail", 0); 477 panic("Could not enable little endian exceptions"); 478 } 479 } 480 #endif 481 482 static void __init pSeries_discover_phbs(void) 483 { 484 struct device_node *node; 485 struct pci_controller *phb; 486 struct device_node *root = of_find_node_by_path("/"); 487 488 for_each_child_of_node(root, node) { 489 if (!of_node_is_type(node, "pci") && 490 !of_node_is_type(node, "pciex")) 491 continue; 492 493 phb = pcibios_alloc_controller(node); 494 if (!phb) 495 continue; 496 rtas_setup_phb(phb); 497 pci_process_bridge_OF_ranges(phb, node, 0); 498 isa_bridge_find_early(phb); 499 phb->controller_ops = pseries_pci_controller_ops; 500 501 /* create pci_dn's for DT nodes under this PHB */ 502 pci_devs_phb_init_dynamic(phb); 503 504 pseries_msi_allocate_domains(phb); 505 } 506 507 of_node_put(root); 508 509 /* 510 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties 511 * in chosen. 512 */ 513 of_pci_check_probe_only(); 514 } 515 516 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) 517 { 518 /* 519 * The features below are disabled by default, so we instead look to see 520 * if firmware has *enabled* them, and set them if so. 521 */ 522 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) 523 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 524 525 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) 526 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 527 528 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) 529 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 530 531 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) 532 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 533 534 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) 535 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 536 537 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) 538 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 539 540 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) 541 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 542 543 if (result->character & H_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST) 544 security_ftr_set(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST); 545 546 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) 547 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 548 549 if (result->behaviour & H_CPU_BEHAV_FLUSH_LINK_STACK) 550 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK); 551 552 /* 553 * The features below are enabled by default, so we instead look to see 554 * if firmware has *disabled* them, and clear them if so. 555 * H_CPU_BEHAV_FAVOUR_SECURITY_H could be set only if 556 * H_CPU_BEHAV_FAVOUR_SECURITY is. 557 */ 558 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) { 559 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 560 pseries_security_flavor = 0; 561 } else if (result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY_H) 562 pseries_security_flavor = 1; 563 else 564 pseries_security_flavor = 2; 565 566 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) 567 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 568 569 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY) 570 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY); 571 572 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS) 573 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS); 574 575 if (result->behaviour & H_CPU_BEHAV_NO_STF_BARRIER) 576 security_ftr_clear(SEC_FTR_STF_BARRIER); 577 578 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) 579 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 580 } 581 582 void pseries_setup_security_mitigations(void) 583 { 584 struct h_cpu_char_result result; 585 enum l1d_flush_type types; 586 bool enable; 587 long rc; 588 589 /* 590 * Set features to the defaults assumed by init_cpu_char_feature_flags() 591 * so it can set/clear again any features that might have changed after 592 * migration, and in case the hypercall fails and it is not even called. 593 */ 594 powerpc_security_features = SEC_FTR_DEFAULT; 595 596 rc = plpar_get_cpu_characteristics(&result); 597 if (rc == H_SUCCESS) 598 init_cpu_char_feature_flags(&result); 599 600 /* 601 * We're the guest so this doesn't apply to us, clear it to simplify 602 * handling of it elsewhere. 603 */ 604 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 605 606 types = L1D_FLUSH_FALLBACK; 607 608 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 609 types |= L1D_FLUSH_MTTRIG; 610 611 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 612 types |= L1D_FLUSH_ORI; 613 614 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 615 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); 616 617 setup_rfi_flush(types, enable); 618 setup_count_cache_flush(); 619 620 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 621 security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY); 622 setup_entry_flush(enable); 623 624 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 625 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS); 626 setup_uaccess_flush(enable); 627 628 setup_stf_barrier(); 629 } 630 631 #ifdef CONFIG_PCI_IOV 632 enum rtas_iov_fw_value_map { 633 NUM_RES_PROPERTY = 0, /* Number of Resources */ 634 LOW_INT = 1, /* Lowest 32 bits of Address */ 635 START_OF_ENTRIES = 2, /* Always start of entry */ 636 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ 637 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ 638 NEXT_ENTRY = 7 /* Go to next entry on array */ 639 }; 640 641 enum get_iov_fw_value_index { 642 BAR_ADDRS = 1, /* Get Bar Address */ 643 APERTURE_SIZE = 2, /* Get Aperture Size */ 644 WDW_SIZE = 3 /* Get Window Size */ 645 }; 646 647 static resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, 648 enum get_iov_fw_value_index value) 649 { 650 const int *indexes; 651 struct device_node *dn = pci_device_to_OF_node(dev); 652 int i, num_res, ret = 0; 653 654 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 655 if (!indexes) 656 return 0; 657 658 /* 659 * First element in the array is the number of Bars 660 * returned. Search through the list to find the matching 661 * bar 662 */ 663 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 664 if (resno >= num_res) 665 return 0; /* or an error */ 666 667 i = START_OF_ENTRIES + NEXT_ENTRY * resno; 668 switch (value) { 669 case BAR_ADDRS: 670 ret = of_read_number(&indexes[i], 2); 671 break; 672 case APERTURE_SIZE: 673 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 674 break; 675 case WDW_SIZE: 676 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 677 break; 678 } 679 680 return ret; 681 } 682 683 static void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) 684 { 685 struct resource *res; 686 resource_size_t base, size; 687 int i, r, num_res; 688 689 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 690 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); 691 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 692 i += NEXT_ENTRY, r++) { 693 res = &dev->resource[r + PCI_IOV_RESOURCES]; 694 base = of_read_number(&indexes[i], 2); 695 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 696 res->flags = pci_parse_of_flags(of_read_number 697 (&indexes[i + LOW_INT], 1), 0); 698 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); 699 res->name = pci_name(dev); 700 res->start = base; 701 res->end = base + size - 1; 702 } 703 } 704 705 static void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) 706 { 707 struct resource *res, *root, *conflict; 708 resource_size_t base, size; 709 int i, r, num_res; 710 711 /* 712 * First element in the array is the number of Bars 713 * returned. Search through the list to find the matching 714 * bars assign them from firmware into resources structure. 715 */ 716 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 717 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 718 i += NEXT_ENTRY, r++) { 719 res = &dev->resource[r + PCI_IOV_RESOURCES]; 720 base = of_read_number(&indexes[i], 2); 721 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 722 res->name = pci_name(dev); 723 res->start = base; 724 res->end = base + size - 1; 725 root = &iomem_resource; 726 dev_dbg(&dev->dev, 727 "pSeries IOV BAR %d: trying firmware assignment %pR\n", 728 r + PCI_IOV_RESOURCES, res); 729 conflict = request_resource_conflict(root, res); 730 if (conflict) { 731 dev_info(&dev->dev, 732 "BAR %d: %pR conflicts with %s %pR\n", 733 r + PCI_IOV_RESOURCES, res, 734 conflict->name, conflict); 735 res->flags |= IORESOURCE_UNSET; 736 } 737 } 738 } 739 740 static void pseries_disable_sriov_resources(struct pci_dev *pdev) 741 { 742 int i; 743 744 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); 745 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) 746 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; 747 } 748 749 static void pseries_pci_fixup_resources(struct pci_dev *pdev) 750 { 751 const int *indexes; 752 struct device_node *dn = pci_device_to_OF_node(pdev); 753 754 /*Firmware must support open sriov otherwise dont configure*/ 755 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 756 if (indexes) 757 of_pci_set_vf_bar_size(pdev, indexes); 758 else 759 pseries_disable_sriov_resources(pdev); 760 } 761 762 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) 763 { 764 const int *indexes; 765 struct device_node *dn = pci_device_to_OF_node(pdev); 766 767 if (!pdev->is_physfn) 768 return; 769 /*Firmware must support open sriov otherwise don't configure*/ 770 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 771 if (indexes) 772 of_pci_parse_iov_addrs(pdev, indexes); 773 else 774 pseries_disable_sriov_resources(pdev); 775 } 776 777 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, 778 int resno) 779 { 780 const __be32 *reg; 781 struct device_node *dn = pci_device_to_OF_node(pdev); 782 783 /*Firmware must support open sriov otherwise report regular alignment*/ 784 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); 785 if (!reg) 786 return pci_iov_resource_size(pdev, resno); 787 788 if (!pdev->is_physfn) 789 return 0; 790 return pseries_get_iov_fw_value(pdev, 791 resno - PCI_IOV_RESOURCES, 792 APERTURE_SIZE); 793 } 794 #endif 795 796 static void __init pSeries_setup_arch(void) 797 { 798 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 799 800 /* Discover PIC type and setup ppc_md accordingly */ 801 smp_init_pseries(); 802 803 804 if (radix_enabled() && !mmu_has_feature(MMU_FTR_GTSE)) 805 if (!firmware_has_feature(FW_FEATURE_RPT_INVALIDATE)) 806 panic("BUG: Radix support requires either GTSE or RPT_INVALIDATE\n"); 807 808 809 /* openpic global configuration register (64-bit format). */ 810 /* openpic Interrupt Source Unit pointer (64-bit format). */ 811 /* python0 facility area (mmio) (64-bit format) REAL address. */ 812 813 /* init to some ~sane value until calibrate_delay() runs */ 814 loops_per_jiffy = 50000000; 815 816 fwnmi_init(); 817 818 pseries_setup_security_mitigations(); 819 if (!radix_enabled()) 820 pseries_lpar_read_hblkrm_characteristics(); 821 822 /* By default, only probe PCI (can be overridden by rtas_pci) */ 823 pci_add_flags(PCI_PROBE_ONLY); 824 825 /* Find and initialize PCI host bridges */ 826 init_pci_config_tokens(); 827 of_reconfig_notifier_register(&pci_dn_reconfig_nb); 828 829 pSeries_nvram_init(); 830 831 if (firmware_has_feature(FW_FEATURE_LPAR)) { 832 vpa_init(boot_cpuid); 833 834 if (lppaca_shared_proc(get_lppaca())) { 835 static_branch_enable(&shared_processor); 836 pv_spinlocks_init(); 837 } 838 839 ppc_md.power_save = pseries_lpar_idle; 840 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; 841 #ifdef CONFIG_PCI_IOV 842 ppc_md.pcibios_fixup_resources = 843 pseries_pci_fixup_resources; 844 ppc_md.pcibios_fixup_sriov = 845 pseries_pci_fixup_iov_resources; 846 ppc_md.pcibios_iov_resource_alignment = 847 pseries_pci_iov_resource_alignment; 848 #endif 849 } else { 850 /* No special idle routine */ 851 ppc_md.enable_pmcs = power4_enable_pmcs; 852 } 853 854 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; 855 pseries_rng_init(); 856 } 857 858 static void pseries_panic(char *str) 859 { 860 panic_flush_kmsg_end(); 861 rtas_os_term(str); 862 } 863 864 static int __init pSeries_init_panel(void) 865 { 866 /* Manually leave the kernel version on the panel. */ 867 #ifdef __BIG_ENDIAN__ 868 ppc_md.progress("Linux ppc64\n", 0); 869 #else 870 ppc_md.progress("Linux ppc64le\n", 0); 871 #endif 872 ppc_md.progress(init_utsname()->version, 0); 873 874 return 0; 875 } 876 machine_arch_initcall(pseries, pSeries_init_panel); 877 878 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) 879 { 880 return plpar_hcall_norets(H_SET_DABR, dabr); 881 } 882 883 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) 884 { 885 /* Have to set at least one bit in the DABRX according to PAPR */ 886 if (dabrx == 0 && dabr == 0) 887 dabrx = DABRX_USER; 888 /* PAPR says we can only set kernel and user bits */ 889 dabrx &= DABRX_KERNEL | DABRX_USER; 890 891 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 892 } 893 894 static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx) 895 { 896 /* PAPR says we can't set HYP */ 897 dawrx &= ~DAWRX_HYP; 898 899 if (nr == 0) 900 return plpar_set_watchpoint0(dawr, dawrx); 901 else 902 return plpar_set_watchpoint1(dawr, dawrx); 903 } 904 905 #define CMO_CHARACTERISTICS_TOKEN 44 906 #define CMO_MAXLENGTH 1026 907 908 void pSeries_coalesce_init(void) 909 { 910 struct hvcall_mpp_x_data mpp_x_data; 911 912 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) 913 powerpc_firmware_features |= FW_FEATURE_XCMO; 914 else 915 powerpc_firmware_features &= ~FW_FEATURE_XCMO; 916 } 917 918 /** 919 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, 920 * handle that here. (Stolen from parse_system_parameter_string) 921 */ 922 static void __init pSeries_cmo_feature_init(void) 923 { 924 char *ptr, *key, *value, *end; 925 int call_status; 926 int page_order = IOMMU_PAGE_SHIFT_4K; 927 928 pr_debug(" -> fw_cmo_feature_init()\n"); 929 spin_lock(&rtas_data_buf_lock); 930 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); 931 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, 932 NULL, 933 CMO_CHARACTERISTICS_TOKEN, 934 __pa(rtas_data_buf), 935 RTAS_DATA_BUF_SIZE); 936 937 if (call_status != 0) { 938 spin_unlock(&rtas_data_buf_lock); 939 pr_debug("CMO not available\n"); 940 pr_debug(" <- fw_cmo_feature_init()\n"); 941 return; 942 } 943 944 end = rtas_data_buf + CMO_MAXLENGTH - 2; 945 ptr = rtas_data_buf + 2; /* step over strlen value */ 946 key = value = ptr; 947 948 while (*ptr && (ptr <= end)) { 949 /* Separate the key and value by replacing '=' with '\0' and 950 * point the value at the string after the '=' 951 */ 952 if (ptr[0] == '=') { 953 ptr[0] = '\0'; 954 value = ptr + 1; 955 } else if (ptr[0] == '\0' || ptr[0] == ',') { 956 /* Terminate the string containing the key/value pair */ 957 ptr[0] = '\0'; 958 959 if (key == value) { 960 pr_debug("Malformed key/value pair\n"); 961 /* Never found a '=', end processing */ 962 break; 963 } 964 965 if (0 == strcmp(key, "CMOPageSize")) 966 page_order = simple_strtol(value, NULL, 10); 967 else if (0 == strcmp(key, "PrPSP")) 968 CMO_PrPSP = simple_strtol(value, NULL, 10); 969 else if (0 == strcmp(key, "SecPSP")) 970 CMO_SecPSP = simple_strtol(value, NULL, 10); 971 value = key = ptr + 1; 972 } 973 ptr++; 974 } 975 976 /* Page size is returned as the power of 2 of the page size, 977 * convert to the page size in bytes before returning 978 */ 979 CMO_PageSize = 1 << page_order; 980 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); 981 982 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { 983 pr_info("CMO enabled\n"); 984 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 985 CMO_SecPSP); 986 powerpc_firmware_features |= FW_FEATURE_CMO; 987 pSeries_coalesce_init(); 988 } else 989 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 990 CMO_SecPSP); 991 spin_unlock(&rtas_data_buf_lock); 992 pr_debug(" <- fw_cmo_feature_init()\n"); 993 } 994 995 /* 996 * Early initialization. Relocation is on but do not reference unbolted pages 997 */ 998 static void __init pseries_init(void) 999 { 1000 pr_debug(" -> pseries_init()\n"); 1001 1002 #ifdef CONFIG_HVC_CONSOLE 1003 if (firmware_has_feature(FW_FEATURE_LPAR)) 1004 hvc_vio_init_early(); 1005 #endif 1006 if (firmware_has_feature(FW_FEATURE_XDABR)) 1007 ppc_md.set_dabr = pseries_set_xdabr; 1008 else if (firmware_has_feature(FW_FEATURE_DABR)) 1009 ppc_md.set_dabr = pseries_set_dabr; 1010 1011 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 1012 ppc_md.set_dawr = pseries_set_dawr; 1013 1014 pSeries_cmo_feature_init(); 1015 iommu_init_early_pSeries(); 1016 1017 pr_debug(" <- pseries_init()\n"); 1018 } 1019 1020 /** 1021 * pseries_power_off - tell firmware about how to power off the system. 1022 * 1023 * This function calls either the power-off rtas token in normal cases 1024 * or the ibm,power-off-ups token (if present & requested) in case of 1025 * a power failure. If power-off token is used, power on will only be 1026 * possible with power button press. If ibm,power-off-ups token is used 1027 * it will allow auto poweron after power is restored. 1028 */ 1029 static void pseries_power_off(void) 1030 { 1031 int rc; 1032 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); 1033 1034 if (rtas_flash_term_hook) 1035 rtas_flash_term_hook(SYS_POWER_OFF); 1036 1037 if (rtas_poweron_auto == 0 || 1038 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { 1039 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); 1040 printk(KERN_INFO "RTAS power-off returned %d\n", rc); 1041 } else { 1042 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); 1043 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); 1044 } 1045 for (;;); 1046 } 1047 1048 static int __init pSeries_probe(void) 1049 { 1050 if (!of_node_is_type(of_root, "chrp")) 1051 return 0; 1052 1053 /* Cell blades firmware claims to be chrp while it's not. Until this 1054 * is fixed, we need to avoid those here. 1055 */ 1056 if (of_machine_is_compatible("IBM,CPBW-1.0") || 1057 of_machine_is_compatible("IBM,CBEA")) 1058 return 0; 1059 1060 pm_power_off = pseries_power_off; 1061 1062 pr_debug("Machine is%s LPAR !\n", 1063 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 1064 1065 pseries_init(); 1066 1067 return 1; 1068 } 1069 1070 static int pSeries_pci_probe_mode(struct pci_bus *bus) 1071 { 1072 if (firmware_has_feature(FW_FEATURE_LPAR)) 1073 return PCI_PROBE_DEVTREE; 1074 return PCI_PROBE_NORMAL; 1075 } 1076 1077 struct pci_controller_ops pseries_pci_controller_ops = { 1078 .probe_mode = pSeries_pci_probe_mode, 1079 }; 1080 1081 define_machine(pseries) { 1082 .name = "pSeries", 1083 .probe = pSeries_probe, 1084 .setup_arch = pSeries_setup_arch, 1085 .init_IRQ = pseries_init_irq, 1086 .show_cpuinfo = pSeries_show_cpuinfo, 1087 .log_error = pSeries_log_error, 1088 .discover_phbs = pSeries_discover_phbs, 1089 .pcibios_fixup = pSeries_final_fixup, 1090 .restart = rtas_restart, 1091 .halt = rtas_halt, 1092 .panic = pseries_panic, 1093 .get_boot_time = rtas_get_boot_time, 1094 .get_rtc_time = rtas_get_rtc_time, 1095 .set_rtc_time = rtas_set_rtc_time, 1096 .calibrate_decr = generic_calibrate_decr, 1097 .progress = rtas_progress, 1098 .system_reset_exception = pSeries_system_reset_exception, 1099 .machine_check_early = pseries_machine_check_realmode, 1100 .machine_check_exception = pSeries_machine_check_exception, 1101 .machine_check_log_err = pSeries_machine_check_log_err, 1102 #ifdef CONFIG_KEXEC_CORE 1103 .machine_kexec = pseries_machine_kexec, 1104 .kexec_cpu_down = pseries_kexec_cpu_down, 1105 #endif 1106 #ifdef CONFIG_MEMORY_HOTPLUG 1107 .memory_block_size = pseries_memory_block_size, 1108 #endif 1109 }; 1110