1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * pSeries_lpar.c
4  * Copyright (C) 2001 Todd Inglett, IBM Corporation
5  *
6  * pSeries LPAR support.
7  */
8 
9 /* Enables debugging of low-level hash table routines - careful! */
10 #undef DEBUG
11 #define pr_fmt(fmt) "lpar: " fmt
12 
13 #include <linux/kernel.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/console.h>
16 #include <linux/export.h>
17 #include <linux/jump_label.h>
18 #include <linux/delay.h>
19 #include <linux/stop_machine.h>
20 #include <linux/spinlock.h>
21 #include <linux/cpuhotplug.h>
22 #include <linux/workqueue.h>
23 #include <linux/proc_fs.h>
24 #include <linux/pgtable.h>
25 #include <linux/debugfs.h>
26 
27 #include <asm/processor.h>
28 #include <asm/mmu.h>
29 #include <asm/page.h>
30 #include <asm/machdep.h>
31 #include <asm/mmu_context.h>
32 #include <asm/iommu.h>
33 #include <asm/tlb.h>
34 #include <asm/prom.h>
35 #include <asm/cputable.h>
36 #include <asm/udbg.h>
37 #include <asm/smp.h>
38 #include <asm/trace.h>
39 #include <asm/firmware.h>
40 #include <asm/plpar_wrappers.h>
41 #include <asm/kexec.h>
42 #include <asm/fadump.h>
43 #include <asm/asm-prototypes.h>
44 #include <asm/dtl.h>
45 
46 #include "pseries.h"
47 
48 /* Flag bits for H_BULK_REMOVE */
49 #define HBR_REQUEST	0x4000000000000000UL
50 #define HBR_RESPONSE	0x8000000000000000UL
51 #define HBR_END		0xc000000000000000UL
52 #define HBR_AVPN	0x0200000000000000UL
53 #define HBR_ANDCOND	0x0100000000000000UL
54 
55 
56 /* in hvCall.S */
57 EXPORT_SYMBOL(plpar_hcall);
58 EXPORT_SYMBOL(plpar_hcall9);
59 EXPORT_SYMBOL(plpar_hcall_norets);
60 
61 #ifdef CONFIG_PPC_64S_HASH_MMU
62 /*
63  * H_BLOCK_REMOVE supported block size for this page size in segment who's base
64  * page size is that page size.
65  *
66  * The first index is the segment base page size, the second one is the actual
67  * page size.
68  */
69 static int hblkrm_size[MMU_PAGE_COUNT][MMU_PAGE_COUNT] __ro_after_init;
70 #endif
71 
72 /*
73  * Due to the involved complexity, and that the current hypervisor is only
74  * returning this value or 0, we are limiting the support of the H_BLOCK_REMOVE
75  * buffer size to 8 size block.
76  */
77 #define HBLKRM_SUPPORTED_BLOCK_SIZE 8
78 
79 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
80 static u8 dtl_mask = DTL_LOG_PREEMPT;
81 #else
82 static u8 dtl_mask;
83 #endif
84 
85 void alloc_dtl_buffers(unsigned long *time_limit)
86 {
87 	int cpu;
88 	struct paca_struct *pp;
89 	struct dtl_entry *dtl;
90 
91 	for_each_possible_cpu(cpu) {
92 		pp = paca_ptrs[cpu];
93 		if (pp->dispatch_log)
94 			continue;
95 		dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
96 		if (!dtl) {
97 			pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
98 				cpu);
99 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
100 			pr_warn("Stolen time statistics will be unreliable\n");
101 #endif
102 			break;
103 		}
104 
105 		pp->dtl_ridx = 0;
106 		pp->dispatch_log = dtl;
107 		pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
108 		pp->dtl_curr = dtl;
109 
110 		if (time_limit && time_after(jiffies, *time_limit)) {
111 			cond_resched();
112 			*time_limit = jiffies + HZ;
113 		}
114 	}
115 }
116 
117 void register_dtl_buffer(int cpu)
118 {
119 	long ret;
120 	struct paca_struct *pp;
121 	struct dtl_entry *dtl;
122 	int hwcpu = get_hard_smp_processor_id(cpu);
123 
124 	pp = paca_ptrs[cpu];
125 	dtl = pp->dispatch_log;
126 	if (dtl && dtl_mask) {
127 		pp->dtl_ridx = 0;
128 		pp->dtl_curr = dtl;
129 		lppaca_of(cpu).dtl_idx = 0;
130 
131 		/* hypervisor reads buffer length from this field */
132 		dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
133 		ret = register_dtl(hwcpu, __pa(dtl));
134 		if (ret)
135 			pr_err("WARNING: DTL registration of cpu %d (hw %d) failed with %ld\n",
136 			       cpu, hwcpu, ret);
137 
138 		lppaca_of(cpu).dtl_enable_mask = dtl_mask;
139 	}
140 }
141 
142 #ifdef CONFIG_PPC_SPLPAR
143 struct dtl_worker {
144 	struct delayed_work work;
145 	int cpu;
146 };
147 
148 struct vcpu_dispatch_data {
149 	int last_disp_cpu;
150 
151 	int total_disp;
152 
153 	int same_cpu_disp;
154 	int same_chip_disp;
155 	int diff_chip_disp;
156 	int far_chip_disp;
157 
158 	int numa_home_disp;
159 	int numa_remote_disp;
160 	int numa_far_disp;
161 };
162 
163 /*
164  * This represents the number of cpus in the hypervisor. Since there is no
165  * architected way to discover the number of processors in the host, we
166  * provision for dealing with NR_CPUS. This is currently 2048 by default, and
167  * is sufficient for our purposes. This will need to be tweaked if
168  * CONFIG_NR_CPUS is changed.
169  */
170 #define NR_CPUS_H	NR_CPUS
171 
172 DEFINE_RWLOCK(dtl_access_lock);
173 static DEFINE_PER_CPU(struct vcpu_dispatch_data, vcpu_disp_data);
174 static DEFINE_PER_CPU(u64, dtl_entry_ridx);
175 static DEFINE_PER_CPU(struct dtl_worker, dtl_workers);
176 static enum cpuhp_state dtl_worker_state;
177 static DEFINE_MUTEX(dtl_enable_mutex);
178 static int vcpudispatch_stats_on __read_mostly;
179 static int vcpudispatch_stats_freq = 50;
180 static __be32 *vcpu_associativity, *pcpu_associativity;
181 
182 
183 static void free_dtl_buffers(unsigned long *time_limit)
184 {
185 #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
186 	int cpu;
187 	struct paca_struct *pp;
188 
189 	for_each_possible_cpu(cpu) {
190 		pp = paca_ptrs[cpu];
191 		if (!pp->dispatch_log)
192 			continue;
193 		kmem_cache_free(dtl_cache, pp->dispatch_log);
194 		pp->dtl_ridx = 0;
195 		pp->dispatch_log = 0;
196 		pp->dispatch_log_end = 0;
197 		pp->dtl_curr = 0;
198 
199 		if (time_limit && time_after(jiffies, *time_limit)) {
200 			cond_resched();
201 			*time_limit = jiffies + HZ;
202 		}
203 	}
204 #endif
205 }
206 
207 static int init_cpu_associativity(void)
208 {
209 	vcpu_associativity = kcalloc(num_possible_cpus() / threads_per_core,
210 			VPHN_ASSOC_BUFSIZE * sizeof(__be32), GFP_KERNEL);
211 	pcpu_associativity = kcalloc(NR_CPUS_H / threads_per_core,
212 			VPHN_ASSOC_BUFSIZE * sizeof(__be32), GFP_KERNEL);
213 
214 	if (!vcpu_associativity || !pcpu_associativity) {
215 		pr_err("error allocating memory for associativity information\n");
216 		return -ENOMEM;
217 	}
218 
219 	return 0;
220 }
221 
222 static void destroy_cpu_associativity(void)
223 {
224 	kfree(vcpu_associativity);
225 	kfree(pcpu_associativity);
226 	vcpu_associativity = pcpu_associativity = 0;
227 }
228 
229 static __be32 *__get_cpu_associativity(int cpu, __be32 *cpu_assoc, int flag)
230 {
231 	__be32 *assoc;
232 	int rc = 0;
233 
234 	assoc = &cpu_assoc[(int)(cpu / threads_per_core) * VPHN_ASSOC_BUFSIZE];
235 	if (!assoc[0]) {
236 		rc = hcall_vphn(cpu, flag, &assoc[0]);
237 		if (rc)
238 			return NULL;
239 	}
240 
241 	return assoc;
242 }
243 
244 static __be32 *get_pcpu_associativity(int cpu)
245 {
246 	return __get_cpu_associativity(cpu, pcpu_associativity, VPHN_FLAG_PCPU);
247 }
248 
249 static __be32 *get_vcpu_associativity(int cpu)
250 {
251 	return __get_cpu_associativity(cpu, vcpu_associativity, VPHN_FLAG_VCPU);
252 }
253 
254 static int cpu_relative_dispatch_distance(int last_disp_cpu, int cur_disp_cpu)
255 {
256 	__be32 *last_disp_cpu_assoc, *cur_disp_cpu_assoc;
257 
258 	if (last_disp_cpu >= NR_CPUS_H || cur_disp_cpu >= NR_CPUS_H)
259 		return -EINVAL;
260 
261 	last_disp_cpu_assoc = get_pcpu_associativity(last_disp_cpu);
262 	cur_disp_cpu_assoc = get_pcpu_associativity(cur_disp_cpu);
263 
264 	if (!last_disp_cpu_assoc || !cur_disp_cpu_assoc)
265 		return -EIO;
266 
267 	return cpu_relative_distance(last_disp_cpu_assoc, cur_disp_cpu_assoc);
268 }
269 
270 static int cpu_home_node_dispatch_distance(int disp_cpu)
271 {
272 	__be32 *disp_cpu_assoc, *vcpu_assoc;
273 	int vcpu_id = smp_processor_id();
274 
275 	if (disp_cpu >= NR_CPUS_H) {
276 		pr_debug_ratelimited("vcpu dispatch cpu %d > %d\n",
277 						disp_cpu, NR_CPUS_H);
278 		return -EINVAL;
279 	}
280 
281 	disp_cpu_assoc = get_pcpu_associativity(disp_cpu);
282 	vcpu_assoc = get_vcpu_associativity(vcpu_id);
283 
284 	if (!disp_cpu_assoc || !vcpu_assoc)
285 		return -EIO;
286 
287 	return cpu_relative_distance(disp_cpu_assoc, vcpu_assoc);
288 }
289 
290 static void update_vcpu_disp_stat(int disp_cpu)
291 {
292 	struct vcpu_dispatch_data *disp;
293 	int distance;
294 
295 	disp = this_cpu_ptr(&vcpu_disp_data);
296 	if (disp->last_disp_cpu == -1) {
297 		disp->last_disp_cpu = disp_cpu;
298 		return;
299 	}
300 
301 	disp->total_disp++;
302 
303 	if (disp->last_disp_cpu == disp_cpu ||
304 		(cpu_first_thread_sibling(disp->last_disp_cpu) ==
305 					cpu_first_thread_sibling(disp_cpu)))
306 		disp->same_cpu_disp++;
307 	else {
308 		distance = cpu_relative_dispatch_distance(disp->last_disp_cpu,
309 								disp_cpu);
310 		if (distance < 0)
311 			pr_debug_ratelimited("vcpudispatch_stats: cpu %d: error determining associativity\n",
312 					smp_processor_id());
313 		else {
314 			switch (distance) {
315 			case 0:
316 				disp->same_chip_disp++;
317 				break;
318 			case 1:
319 				disp->diff_chip_disp++;
320 				break;
321 			case 2:
322 				disp->far_chip_disp++;
323 				break;
324 			default:
325 				pr_debug_ratelimited("vcpudispatch_stats: cpu %d (%d -> %d): unexpected relative dispatch distance %d\n",
326 						 smp_processor_id(),
327 						 disp->last_disp_cpu,
328 						 disp_cpu,
329 						 distance);
330 			}
331 		}
332 	}
333 
334 	distance = cpu_home_node_dispatch_distance(disp_cpu);
335 	if (distance < 0)
336 		pr_debug_ratelimited("vcpudispatch_stats: cpu %d: error determining associativity\n",
337 				smp_processor_id());
338 	else {
339 		switch (distance) {
340 		case 0:
341 			disp->numa_home_disp++;
342 			break;
343 		case 1:
344 			disp->numa_remote_disp++;
345 			break;
346 		case 2:
347 			disp->numa_far_disp++;
348 			break;
349 		default:
350 			pr_debug_ratelimited("vcpudispatch_stats: cpu %d on %d: unexpected numa dispatch distance %d\n",
351 						 smp_processor_id(),
352 						 disp_cpu,
353 						 distance);
354 		}
355 	}
356 
357 	disp->last_disp_cpu = disp_cpu;
358 }
359 
360 static void process_dtl_buffer(struct work_struct *work)
361 {
362 	struct dtl_entry dtle;
363 	u64 i = __this_cpu_read(dtl_entry_ridx);
364 	struct dtl_entry *dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG);
365 	struct dtl_entry *dtl_end = local_paca->dispatch_log_end;
366 	struct lppaca *vpa = local_paca->lppaca_ptr;
367 	struct dtl_worker *d = container_of(work, struct dtl_worker, work.work);
368 
369 	if (!local_paca->dispatch_log)
370 		return;
371 
372 	/* if we have been migrated away, we cancel ourself */
373 	if (d->cpu != smp_processor_id()) {
374 		pr_debug("vcpudispatch_stats: cpu %d worker migrated -- canceling worker\n",
375 						smp_processor_id());
376 		return;
377 	}
378 
379 	if (i == be64_to_cpu(vpa->dtl_idx))
380 		goto out;
381 
382 	while (i < be64_to_cpu(vpa->dtl_idx)) {
383 		dtle = *dtl;
384 		barrier();
385 		if (i + N_DISPATCH_LOG < be64_to_cpu(vpa->dtl_idx)) {
386 			/* buffer has overflowed */
387 			pr_debug_ratelimited("vcpudispatch_stats: cpu %d lost %lld DTL samples\n",
388 				d->cpu,
389 				be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG - i);
390 			i = be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG;
391 			dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG);
392 			continue;
393 		}
394 		update_vcpu_disp_stat(be16_to_cpu(dtle.processor_id));
395 		++i;
396 		++dtl;
397 		if (dtl == dtl_end)
398 			dtl = local_paca->dispatch_log;
399 	}
400 
401 	__this_cpu_write(dtl_entry_ridx, i);
402 
403 out:
404 	schedule_delayed_work_on(d->cpu, to_delayed_work(work),
405 					HZ / vcpudispatch_stats_freq);
406 }
407 
408 static int dtl_worker_online(unsigned int cpu)
409 {
410 	struct dtl_worker *d = &per_cpu(dtl_workers, cpu);
411 
412 	memset(d, 0, sizeof(*d));
413 	INIT_DELAYED_WORK(&d->work, process_dtl_buffer);
414 	d->cpu = cpu;
415 
416 #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
417 	per_cpu(dtl_entry_ridx, cpu) = 0;
418 	register_dtl_buffer(cpu);
419 #else
420 	per_cpu(dtl_entry_ridx, cpu) = be64_to_cpu(lppaca_of(cpu).dtl_idx);
421 #endif
422 
423 	schedule_delayed_work_on(cpu, &d->work, HZ / vcpudispatch_stats_freq);
424 	return 0;
425 }
426 
427 static int dtl_worker_offline(unsigned int cpu)
428 {
429 	struct dtl_worker *d = &per_cpu(dtl_workers, cpu);
430 
431 	cancel_delayed_work_sync(&d->work);
432 
433 #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
434 	unregister_dtl(get_hard_smp_processor_id(cpu));
435 #endif
436 
437 	return 0;
438 }
439 
440 static void set_global_dtl_mask(u8 mask)
441 {
442 	int cpu;
443 
444 	dtl_mask = mask;
445 	for_each_present_cpu(cpu)
446 		lppaca_of(cpu).dtl_enable_mask = dtl_mask;
447 }
448 
449 static void reset_global_dtl_mask(void)
450 {
451 	int cpu;
452 
453 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
454 	dtl_mask = DTL_LOG_PREEMPT;
455 #else
456 	dtl_mask = 0;
457 #endif
458 	for_each_present_cpu(cpu)
459 		lppaca_of(cpu).dtl_enable_mask = dtl_mask;
460 }
461 
462 static int dtl_worker_enable(unsigned long *time_limit)
463 {
464 	int rc = 0, state;
465 
466 	if (!write_trylock(&dtl_access_lock)) {
467 		rc = -EBUSY;
468 		goto out;
469 	}
470 
471 	set_global_dtl_mask(DTL_LOG_ALL);
472 
473 	/* Setup dtl buffers and register those */
474 	alloc_dtl_buffers(time_limit);
475 
476 	state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powerpc/dtl:online",
477 					dtl_worker_online, dtl_worker_offline);
478 	if (state < 0) {
479 		pr_err("vcpudispatch_stats: unable to setup workqueue for DTL processing\n");
480 		free_dtl_buffers(time_limit);
481 		reset_global_dtl_mask();
482 		write_unlock(&dtl_access_lock);
483 		rc = -EINVAL;
484 		goto out;
485 	}
486 	dtl_worker_state = state;
487 
488 out:
489 	return rc;
490 }
491 
492 static void dtl_worker_disable(unsigned long *time_limit)
493 {
494 	cpuhp_remove_state(dtl_worker_state);
495 	free_dtl_buffers(time_limit);
496 	reset_global_dtl_mask();
497 	write_unlock(&dtl_access_lock);
498 }
499 
500 static ssize_t vcpudispatch_stats_write(struct file *file, const char __user *p,
501 		size_t count, loff_t *ppos)
502 {
503 	unsigned long time_limit = jiffies + HZ;
504 	struct vcpu_dispatch_data *disp;
505 	int rc, cmd, cpu;
506 	char buf[16];
507 
508 	if (count > 15)
509 		return -EINVAL;
510 
511 	if (copy_from_user(buf, p, count))
512 		return -EFAULT;
513 
514 	buf[count] = 0;
515 	rc = kstrtoint(buf, 0, &cmd);
516 	if (rc || cmd < 0 || cmd > 1) {
517 		pr_err("vcpudispatch_stats: please use 0 to disable or 1 to enable dispatch statistics\n");
518 		return rc ? rc : -EINVAL;
519 	}
520 
521 	mutex_lock(&dtl_enable_mutex);
522 
523 	if ((cmd == 0 && !vcpudispatch_stats_on) ||
524 			(cmd == 1 && vcpudispatch_stats_on))
525 		goto out;
526 
527 	if (cmd) {
528 		rc = init_cpu_associativity();
529 		if (rc)
530 			goto out;
531 
532 		for_each_possible_cpu(cpu) {
533 			disp = per_cpu_ptr(&vcpu_disp_data, cpu);
534 			memset(disp, 0, sizeof(*disp));
535 			disp->last_disp_cpu = -1;
536 		}
537 
538 		rc = dtl_worker_enable(&time_limit);
539 		if (rc) {
540 			destroy_cpu_associativity();
541 			goto out;
542 		}
543 	} else {
544 		dtl_worker_disable(&time_limit);
545 		destroy_cpu_associativity();
546 	}
547 
548 	vcpudispatch_stats_on = cmd;
549 
550 out:
551 	mutex_unlock(&dtl_enable_mutex);
552 	if (rc)
553 		return rc;
554 	return count;
555 }
556 
557 static int vcpudispatch_stats_display(struct seq_file *p, void *v)
558 {
559 	int cpu;
560 	struct vcpu_dispatch_data *disp;
561 
562 	if (!vcpudispatch_stats_on) {
563 		seq_puts(p, "off\n");
564 		return 0;
565 	}
566 
567 	for_each_online_cpu(cpu) {
568 		disp = per_cpu_ptr(&vcpu_disp_data, cpu);
569 		seq_printf(p, "cpu%d", cpu);
570 		seq_put_decimal_ull(p, " ", disp->total_disp);
571 		seq_put_decimal_ull(p, " ", disp->same_cpu_disp);
572 		seq_put_decimal_ull(p, " ", disp->same_chip_disp);
573 		seq_put_decimal_ull(p, " ", disp->diff_chip_disp);
574 		seq_put_decimal_ull(p, " ", disp->far_chip_disp);
575 		seq_put_decimal_ull(p, " ", disp->numa_home_disp);
576 		seq_put_decimal_ull(p, " ", disp->numa_remote_disp);
577 		seq_put_decimal_ull(p, " ", disp->numa_far_disp);
578 		seq_puts(p, "\n");
579 	}
580 
581 	return 0;
582 }
583 
584 static int vcpudispatch_stats_open(struct inode *inode, struct file *file)
585 {
586 	return single_open(file, vcpudispatch_stats_display, NULL);
587 }
588 
589 static const struct proc_ops vcpudispatch_stats_proc_ops = {
590 	.proc_open	= vcpudispatch_stats_open,
591 	.proc_read	= seq_read,
592 	.proc_write	= vcpudispatch_stats_write,
593 	.proc_lseek	= seq_lseek,
594 	.proc_release	= single_release,
595 };
596 
597 static ssize_t vcpudispatch_stats_freq_write(struct file *file,
598 		const char __user *p, size_t count, loff_t *ppos)
599 {
600 	int rc, freq;
601 	char buf[16];
602 
603 	if (count > 15)
604 		return -EINVAL;
605 
606 	if (copy_from_user(buf, p, count))
607 		return -EFAULT;
608 
609 	buf[count] = 0;
610 	rc = kstrtoint(buf, 0, &freq);
611 	if (rc || freq < 1 || freq > HZ) {
612 		pr_err("vcpudispatch_stats_freq: please specify a frequency between 1 and %d\n",
613 				HZ);
614 		return rc ? rc : -EINVAL;
615 	}
616 
617 	vcpudispatch_stats_freq = freq;
618 
619 	return count;
620 }
621 
622 static int vcpudispatch_stats_freq_display(struct seq_file *p, void *v)
623 {
624 	seq_printf(p, "%d\n", vcpudispatch_stats_freq);
625 	return 0;
626 }
627 
628 static int vcpudispatch_stats_freq_open(struct inode *inode, struct file *file)
629 {
630 	return single_open(file, vcpudispatch_stats_freq_display, NULL);
631 }
632 
633 static const struct proc_ops vcpudispatch_stats_freq_proc_ops = {
634 	.proc_open	= vcpudispatch_stats_freq_open,
635 	.proc_read	= seq_read,
636 	.proc_write	= vcpudispatch_stats_freq_write,
637 	.proc_lseek	= seq_lseek,
638 	.proc_release	= single_release,
639 };
640 
641 static int __init vcpudispatch_stats_procfs_init(void)
642 {
643 	/*
644 	 * Avoid smp_processor_id while preemptible. All CPUs should have
645 	 * the same value for lppaca_shared_proc.
646 	 */
647 	preempt_disable();
648 	if (!lppaca_shared_proc(get_lppaca())) {
649 		preempt_enable();
650 		return 0;
651 	}
652 	preempt_enable();
653 
654 	if (!proc_create("powerpc/vcpudispatch_stats", 0600, NULL,
655 					&vcpudispatch_stats_proc_ops))
656 		pr_err("vcpudispatch_stats: error creating procfs file\n");
657 	else if (!proc_create("powerpc/vcpudispatch_stats_freq", 0600, NULL,
658 					&vcpudispatch_stats_freq_proc_ops))
659 		pr_err("vcpudispatch_stats_freq: error creating procfs file\n");
660 
661 	return 0;
662 }
663 
664 machine_device_initcall(pseries, vcpudispatch_stats_procfs_init);
665 #endif /* CONFIG_PPC_SPLPAR */
666 
667 void vpa_init(int cpu)
668 {
669 	int hwcpu = get_hard_smp_processor_id(cpu);
670 	unsigned long addr;
671 	long ret;
672 
673 	/*
674 	 * The spec says it "may be problematic" if CPU x registers the VPA of
675 	 * CPU y. We should never do that, but wail if we ever do.
676 	 */
677 	WARN_ON(cpu != smp_processor_id());
678 
679 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
680 		lppaca_of(cpu).vmxregs_in_use = 1;
681 
682 	if (cpu_has_feature(CPU_FTR_ARCH_207S))
683 		lppaca_of(cpu).ebb_regs_in_use = 1;
684 
685 	addr = __pa(&lppaca_of(cpu));
686 	ret = register_vpa(hwcpu, addr);
687 
688 	if (ret) {
689 		pr_err("WARNING: VPA registration for cpu %d (hw %d) of area "
690 		       "%lx failed with %ld\n", cpu, hwcpu, addr, ret);
691 		return;
692 	}
693 
694 #ifdef CONFIG_PPC_64S_HASH_MMU
695 	/*
696 	 * PAPR says this feature is SLB-Buffer but firmware never
697 	 * reports that.  All SPLPAR support SLB shadow buffer.
698 	 */
699 	if (!radix_enabled() && firmware_has_feature(FW_FEATURE_SPLPAR)) {
700 		addr = __pa(paca_ptrs[cpu]->slb_shadow_ptr);
701 		ret = register_slb_shadow(hwcpu, addr);
702 		if (ret)
703 			pr_err("WARNING: SLB shadow buffer registration for "
704 			       "cpu %d (hw %d) of area %lx failed with %ld\n",
705 			       cpu, hwcpu, addr, ret);
706 	}
707 #endif /* CONFIG_PPC_64S_HASH_MMU */
708 
709 	/*
710 	 * Register dispatch trace log, if one has been allocated.
711 	 */
712 	register_dtl_buffer(cpu);
713 }
714 
715 #ifdef CONFIG_PPC_BOOK3S_64
716 
717 static int __init pseries_lpar_register_process_table(unsigned long base,
718 			unsigned long page_size, unsigned long table_size)
719 {
720 	long rc;
721 	unsigned long flags = 0;
722 
723 	if (table_size)
724 		flags |= PROC_TABLE_NEW;
725 	if (radix_enabled()) {
726 		flags |= PROC_TABLE_RADIX;
727 		if (mmu_has_feature(MMU_FTR_GTSE))
728 			flags |= PROC_TABLE_GTSE;
729 	} else
730 		flags |= PROC_TABLE_HPT_SLB;
731 	for (;;) {
732 		rc = plpar_hcall_norets(H_REGISTER_PROC_TBL, flags, base,
733 					page_size, table_size);
734 		if (!H_IS_LONG_BUSY(rc))
735 			break;
736 		mdelay(get_longbusy_msecs(rc));
737 	}
738 	if (rc != H_SUCCESS) {
739 		pr_err("Failed to register process table (rc=%ld)\n", rc);
740 		BUG();
741 	}
742 	return rc;
743 }
744 
745 #ifdef CONFIG_PPC_64S_HASH_MMU
746 
747 static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
748 				     unsigned long vpn, unsigned long pa,
749 				     unsigned long rflags, unsigned long vflags,
750 				     int psize, int apsize, int ssize)
751 {
752 	unsigned long lpar_rc;
753 	unsigned long flags;
754 	unsigned long slot;
755 	unsigned long hpte_v, hpte_r;
756 
757 	if (!(vflags & HPTE_V_BOLTED))
758 		pr_devel("hpte_insert(group=%lx, vpn=%016lx, "
759 			 "pa=%016lx, rflags=%lx, vflags=%lx, psize=%d)\n",
760 			 hpte_group, vpn,  pa, rflags, vflags, psize);
761 
762 	hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID;
763 	hpte_r = hpte_encode_r(pa, psize, apsize) | rflags;
764 
765 	if (!(vflags & HPTE_V_BOLTED))
766 		pr_devel(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
767 
768 	/* Now fill in the actual HPTE */
769 	/* Set CEC cookie to 0         */
770 	/* Zero page = 0               */
771 	/* I-cache Invalidate = 0      */
772 	/* I-cache synchronize = 0     */
773 	/* Exact = 0                   */
774 	flags = 0;
775 
776 	if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N))
777 		flags |= H_COALESCE_CAND;
778 
779 	lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
780 	if (unlikely(lpar_rc == H_PTEG_FULL)) {
781 		pr_devel("Hash table group is full\n");
782 		return -1;
783 	}
784 
785 	/*
786 	 * Since we try and ioremap PHBs we don't own, the pte insert
787 	 * will fail. However we must catch the failure in hash_page
788 	 * or we will loop forever, so return -2 in this case.
789 	 */
790 	if (unlikely(lpar_rc != H_SUCCESS)) {
791 		pr_err("Failed hash pte insert with error %ld\n", lpar_rc);
792 		return -2;
793 	}
794 	if (!(vflags & HPTE_V_BOLTED))
795 		pr_devel(" -> slot: %lu\n", slot & 7);
796 
797 	/* Because of iSeries, we have to pass down the secondary
798 	 * bucket bit here as well
799 	 */
800 	return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);
801 }
802 
803 static DEFINE_SPINLOCK(pSeries_lpar_tlbie_lock);
804 
805 static long pSeries_lpar_hpte_remove(unsigned long hpte_group)
806 {
807 	unsigned long slot_offset;
808 	unsigned long lpar_rc;
809 	int i;
810 	unsigned long dummy1, dummy2;
811 
812 	/* pick a random slot to start at */
813 	slot_offset = mftb() & 0x7;
814 
815 	for (i = 0; i < HPTES_PER_GROUP; i++) {
816 
817 		/* don't remove a bolted entry */
818 		lpar_rc = plpar_pte_remove(H_ANDCOND, hpte_group + slot_offset,
819 					   HPTE_V_BOLTED, &dummy1, &dummy2);
820 		if (lpar_rc == H_SUCCESS)
821 			return i;
822 
823 		/*
824 		 * The test for adjunct partition is performed before the
825 		 * ANDCOND test.  H_RESOURCE may be returned, so we need to
826 		 * check for that as well.
827 		 */
828 		BUG_ON(lpar_rc != H_NOT_FOUND && lpar_rc != H_RESOURCE);
829 
830 		slot_offset++;
831 		slot_offset &= 0x7;
832 	}
833 
834 	return -1;
835 }
836 
837 /* Called during kexec sequence with MMU off */
838 static notrace void manual_hpte_clear_all(void)
839 {
840 	unsigned long size_bytes = 1UL << ppc64_pft_size;
841 	unsigned long hpte_count = size_bytes >> 4;
842 	struct {
843 		unsigned long pteh;
844 		unsigned long ptel;
845 	} ptes[4];
846 	long lpar_rc;
847 	unsigned long i, j;
848 
849 	/* Read in batches of 4,
850 	 * invalidate only valid entries not in the VRMA
851 	 * hpte_count will be a multiple of 4
852          */
853 	for (i = 0; i < hpte_count; i += 4) {
854 		lpar_rc = plpar_pte_read_4_raw(0, i, (void *)ptes);
855 		if (lpar_rc != H_SUCCESS) {
856 			pr_info("Failed to read hash page table at %ld err %ld\n",
857 				i, lpar_rc);
858 			continue;
859 		}
860 		for (j = 0; j < 4; j++){
861 			if ((ptes[j].pteh & HPTE_V_VRMA_MASK) ==
862 				HPTE_V_VRMA_MASK)
863 				continue;
864 			if (ptes[j].pteh & HPTE_V_VALID)
865 				plpar_pte_remove_raw(0, i + j, 0,
866 					&(ptes[j].pteh), &(ptes[j].ptel));
867 		}
868 	}
869 }
870 
871 /* Called during kexec sequence with MMU off */
872 static notrace int hcall_hpte_clear_all(void)
873 {
874 	int rc;
875 
876 	do {
877 		rc = plpar_hcall_norets(H_CLEAR_HPT);
878 	} while (rc == H_CONTINUE);
879 
880 	return rc;
881 }
882 
883 /* Called during kexec sequence with MMU off */
884 static notrace void pseries_hpte_clear_all(void)
885 {
886 	int rc;
887 
888 	rc = hcall_hpte_clear_all();
889 	if (rc != H_SUCCESS)
890 		manual_hpte_clear_all();
891 
892 #ifdef __LITTLE_ENDIAN__
893 	/*
894 	 * Reset exceptions to big endian.
895 	 *
896 	 * FIXME this is a hack for kexec, we need to reset the exception
897 	 * endian before starting the new kernel and this is a convenient place
898 	 * to do it.
899 	 *
900 	 * This is also called on boot when a fadump happens. In that case we
901 	 * must not change the exception endian mode.
902 	 */
903 	if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active())
904 		pseries_big_endian_exceptions();
905 #endif
906 }
907 
908 /*
909  * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
910  * the low 3 bits of flags happen to line up.  So no transform is needed.
911  * We can probably optimize here and assume the high bits of newpp are
912  * already zero.  For now I am paranoid.
913  */
914 static long pSeries_lpar_hpte_updatepp(unsigned long slot,
915 				       unsigned long newpp,
916 				       unsigned long vpn,
917 				       int psize, int apsize,
918 				       int ssize, unsigned long inv_flags)
919 {
920 	unsigned long lpar_rc;
921 	unsigned long flags;
922 	unsigned long want_v;
923 
924 	want_v = hpte_encode_avpn(vpn, psize, ssize);
925 
926 	flags = (newpp & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO)) | H_AVPN;
927 	flags |= (newpp & HPTE_R_KEY_HI) >> 48;
928 	if (mmu_has_feature(MMU_FTR_KERNEL_RO))
929 		/* Move pp0 into bit 8 (IBM 55) */
930 		flags |= (newpp & HPTE_R_PP0) >> 55;
931 
932 	pr_devel("    update: avpnv=%016lx, hash=%016lx, f=%lx, psize: %d ...",
933 		 want_v, slot, flags, psize);
934 
935 	lpar_rc = plpar_pte_protect(flags, slot, want_v);
936 
937 	if (lpar_rc == H_NOT_FOUND) {
938 		pr_devel("not found !\n");
939 		return -1;
940 	}
941 
942 	pr_devel("ok\n");
943 
944 	BUG_ON(lpar_rc != H_SUCCESS);
945 
946 	return 0;
947 }
948 
949 static long __pSeries_lpar_hpte_find(unsigned long want_v, unsigned long hpte_group)
950 {
951 	long lpar_rc;
952 	unsigned long i, j;
953 	struct {
954 		unsigned long pteh;
955 		unsigned long ptel;
956 	} ptes[4];
957 
958 	for (i = 0; i < HPTES_PER_GROUP; i += 4, hpte_group += 4) {
959 
960 		lpar_rc = plpar_pte_read_4(0, hpte_group, (void *)ptes);
961 		if (lpar_rc != H_SUCCESS) {
962 			pr_info("Failed to read hash page table at %ld err %ld\n",
963 				hpte_group, lpar_rc);
964 			continue;
965 		}
966 
967 		for (j = 0; j < 4; j++) {
968 			if (HPTE_V_COMPARE(ptes[j].pteh, want_v) &&
969 			    (ptes[j].pteh & HPTE_V_VALID))
970 				return i + j;
971 		}
972 	}
973 
974 	return -1;
975 }
976 
977 static long pSeries_lpar_hpte_find(unsigned long vpn, int psize, int ssize)
978 {
979 	long slot;
980 	unsigned long hash;
981 	unsigned long want_v;
982 	unsigned long hpte_group;
983 
984 	hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize);
985 	want_v = hpte_encode_avpn(vpn, psize, ssize);
986 
987 	/*
988 	 * We try to keep bolted entries always in primary hash
989 	 * But in some case we can find them in secondary too.
990 	 */
991 	hpte_group = (hash & htab_hash_mask) * HPTES_PER_GROUP;
992 	slot = __pSeries_lpar_hpte_find(want_v, hpte_group);
993 	if (slot < 0) {
994 		/* Try in secondary */
995 		hpte_group = (~hash & htab_hash_mask) * HPTES_PER_GROUP;
996 		slot = __pSeries_lpar_hpte_find(want_v, hpte_group);
997 		if (slot < 0)
998 			return -1;
999 	}
1000 	return hpte_group + slot;
1001 }
1002 
1003 static void pSeries_lpar_hpte_updateboltedpp(unsigned long newpp,
1004 					     unsigned long ea,
1005 					     int psize, int ssize)
1006 {
1007 	unsigned long vpn;
1008 	unsigned long lpar_rc, slot, vsid, flags;
1009 
1010 	vsid = get_kernel_vsid(ea, ssize);
1011 	vpn = hpt_vpn(ea, vsid, ssize);
1012 
1013 	slot = pSeries_lpar_hpte_find(vpn, psize, ssize);
1014 	BUG_ON(slot == -1);
1015 
1016 	flags = newpp & (HPTE_R_PP | HPTE_R_N);
1017 	if (mmu_has_feature(MMU_FTR_KERNEL_RO))
1018 		/* Move pp0 into bit 8 (IBM 55) */
1019 		flags |= (newpp & HPTE_R_PP0) >> 55;
1020 
1021 	flags |= ((newpp & HPTE_R_KEY_HI) >> 48) | (newpp & HPTE_R_KEY_LO);
1022 
1023 	lpar_rc = plpar_pte_protect(flags, slot, 0);
1024 
1025 	BUG_ON(lpar_rc != H_SUCCESS);
1026 }
1027 
1028 static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long vpn,
1029 					 int psize, int apsize,
1030 					 int ssize, int local)
1031 {
1032 	unsigned long want_v;
1033 	unsigned long lpar_rc;
1034 	unsigned long dummy1, dummy2;
1035 
1036 	pr_devel("    inval : slot=%lx, vpn=%016lx, psize: %d, local: %d\n",
1037 		 slot, vpn, psize, local);
1038 
1039 	want_v = hpte_encode_avpn(vpn, psize, ssize);
1040 	lpar_rc = plpar_pte_remove(H_AVPN, slot, want_v, &dummy1, &dummy2);
1041 	if (lpar_rc == H_NOT_FOUND)
1042 		return;
1043 
1044 	BUG_ON(lpar_rc != H_SUCCESS);
1045 }
1046 
1047 
1048 /*
1049  * As defined in the PAPR's section 14.5.4.1.8
1050  * The control mask doesn't include the returned reference and change bit from
1051  * the processed PTE.
1052  */
1053 #define HBLKR_AVPN		0x0100000000000000UL
1054 #define HBLKR_CTRL_MASK		0xf800000000000000UL
1055 #define HBLKR_CTRL_SUCCESS	0x8000000000000000UL
1056 #define HBLKR_CTRL_ERRNOTFOUND	0x8800000000000000UL
1057 #define HBLKR_CTRL_ERRBUSY	0xa000000000000000UL
1058 
1059 /*
1060  * Returned true if we are supporting this block size for the specified segment
1061  * base page size and actual page size.
1062  *
1063  * Currently, we only support 8 size block.
1064  */
1065 static inline bool is_supported_hlbkrm(int bpsize, int psize)
1066 {
1067 	return (hblkrm_size[bpsize][psize] == HBLKRM_SUPPORTED_BLOCK_SIZE);
1068 }
1069 
1070 /**
1071  * H_BLOCK_REMOVE caller.
1072  * @idx should point to the latest @param entry set with a PTEX.
1073  * If PTE cannot be processed because another CPUs has already locked that
1074  * group, those entries are put back in @param starting at index 1.
1075  * If entries has to be retried and @retry_busy is set to true, these entries
1076  * are retried until success. If @retry_busy is set to false, the returned
1077  * is the number of entries yet to process.
1078  */
1079 static unsigned long call_block_remove(unsigned long idx, unsigned long *param,
1080 				       bool retry_busy)
1081 {
1082 	unsigned long i, rc, new_idx;
1083 	unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
1084 
1085 	if (idx < 2) {
1086 		pr_warn("Unexpected empty call to H_BLOCK_REMOVE");
1087 		return 0;
1088 	}
1089 again:
1090 	new_idx = 0;
1091 	if (idx > PLPAR_HCALL9_BUFSIZE) {
1092 		pr_err("Too many PTEs (%lu) for H_BLOCK_REMOVE", idx);
1093 		idx = PLPAR_HCALL9_BUFSIZE;
1094 	} else if (idx < PLPAR_HCALL9_BUFSIZE)
1095 		param[idx] = HBR_END;
1096 
1097 	rc = plpar_hcall9(H_BLOCK_REMOVE, retbuf,
1098 			  param[0], /* AVA */
1099 			  param[1],  param[2],  param[3],  param[4], /* TS0-7 */
1100 			  param[5],  param[6],  param[7],  param[8]);
1101 	if (rc == H_SUCCESS)
1102 		return 0;
1103 
1104 	BUG_ON(rc != H_PARTIAL);
1105 
1106 	/* Check that the unprocessed entries were 'not found' or 'busy' */
1107 	for (i = 0; i < idx-1; i++) {
1108 		unsigned long ctrl = retbuf[i] & HBLKR_CTRL_MASK;
1109 
1110 		if (ctrl == HBLKR_CTRL_ERRBUSY) {
1111 			param[++new_idx] = param[i+1];
1112 			continue;
1113 		}
1114 
1115 		BUG_ON(ctrl != HBLKR_CTRL_SUCCESS
1116 		       && ctrl != HBLKR_CTRL_ERRNOTFOUND);
1117 	}
1118 
1119 	/*
1120 	 * If there were entries found busy, retry these entries if requested,
1121 	 * of if all the entries have to be retried.
1122 	 */
1123 	if (new_idx && (retry_busy || new_idx == (PLPAR_HCALL9_BUFSIZE-1))) {
1124 		idx = new_idx + 1;
1125 		goto again;
1126 	}
1127 
1128 	return new_idx;
1129 }
1130 
1131 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1132 /*
1133  * Limit iterations holding pSeries_lpar_tlbie_lock to 3. We also need
1134  * to make sure that we avoid bouncing the hypervisor tlbie lock.
1135  */
1136 #define PPC64_HUGE_HPTE_BATCH 12
1137 
1138 static void hugepage_block_invalidate(unsigned long *slot, unsigned long *vpn,
1139 				      int count, int psize, int ssize)
1140 {
1141 	unsigned long param[PLPAR_HCALL9_BUFSIZE];
1142 	unsigned long shift, current_vpgb, vpgb;
1143 	int i, pix = 0;
1144 
1145 	shift = mmu_psize_defs[psize].shift;
1146 
1147 	for (i = 0; i < count; i++) {
1148 		/*
1149 		 * Shifting 3 bits more on the right to get a
1150 		 * 8 pages aligned virtual addresse.
1151 		 */
1152 		vpgb = (vpn[i] >> (shift - VPN_SHIFT + 3));
1153 		if (!pix || vpgb != current_vpgb) {
1154 			/*
1155 			 * Need to start a new 8 pages block, flush
1156 			 * the current one if needed.
1157 			 */
1158 			if (pix)
1159 				(void)call_block_remove(pix, param, true);
1160 			current_vpgb = vpgb;
1161 			param[0] = hpte_encode_avpn(vpn[i], psize, ssize);
1162 			pix = 1;
1163 		}
1164 
1165 		param[pix++] = HBR_REQUEST | HBLKR_AVPN | slot[i];
1166 		if (pix == PLPAR_HCALL9_BUFSIZE) {
1167 			pix = call_block_remove(pix, param, false);
1168 			/*
1169 			 * pix = 0 means that all the entries were
1170 			 * removed, we can start a new block.
1171 			 * Otherwise, this means that there are entries
1172 			 * to retry, and pix points to latest one, so
1173 			 * we should increment it and try to continue
1174 			 * the same block.
1175 			 */
1176 			if (pix)
1177 				pix++;
1178 		}
1179 	}
1180 	if (pix)
1181 		(void)call_block_remove(pix, param, true);
1182 }
1183 
1184 static void hugepage_bulk_invalidate(unsigned long *slot, unsigned long *vpn,
1185 				     int count, int psize, int ssize)
1186 {
1187 	unsigned long param[PLPAR_HCALL9_BUFSIZE];
1188 	int i = 0, pix = 0, rc;
1189 
1190 	for (i = 0; i < count; i++) {
1191 
1192 		if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
1193 			pSeries_lpar_hpte_invalidate(slot[i], vpn[i], psize, 0,
1194 						     ssize, 0);
1195 		} else {
1196 			param[pix] = HBR_REQUEST | HBR_AVPN | slot[i];
1197 			param[pix+1] = hpte_encode_avpn(vpn[i], psize, ssize);
1198 			pix += 2;
1199 			if (pix == 8) {
1200 				rc = plpar_hcall9(H_BULK_REMOVE, param,
1201 						  param[0], param[1], param[2],
1202 						  param[3], param[4], param[5],
1203 						  param[6], param[7]);
1204 				BUG_ON(rc != H_SUCCESS);
1205 				pix = 0;
1206 			}
1207 		}
1208 	}
1209 	if (pix) {
1210 		param[pix] = HBR_END;
1211 		rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
1212 				  param[2], param[3], param[4], param[5],
1213 				  param[6], param[7]);
1214 		BUG_ON(rc != H_SUCCESS);
1215 	}
1216 }
1217 
1218 static inline void __pSeries_lpar_hugepage_invalidate(unsigned long *slot,
1219 						      unsigned long *vpn,
1220 						      int count, int psize,
1221 						      int ssize)
1222 {
1223 	unsigned long flags = 0;
1224 	int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
1225 
1226 	if (lock_tlbie)
1227 		spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
1228 
1229 	/* Assuming THP size is 16M */
1230 	if (is_supported_hlbkrm(psize, MMU_PAGE_16M))
1231 		hugepage_block_invalidate(slot, vpn, count, psize, ssize);
1232 	else
1233 		hugepage_bulk_invalidate(slot, vpn, count, psize, ssize);
1234 
1235 	if (lock_tlbie)
1236 		spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
1237 }
1238 
1239 static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
1240 					     unsigned long addr,
1241 					     unsigned char *hpte_slot_array,
1242 					     int psize, int ssize, int local)
1243 {
1244 	int i, index = 0;
1245 	unsigned long s_addr = addr;
1246 	unsigned int max_hpte_count, valid;
1247 	unsigned long vpn_array[PPC64_HUGE_HPTE_BATCH];
1248 	unsigned long slot_array[PPC64_HUGE_HPTE_BATCH];
1249 	unsigned long shift, hidx, vpn = 0, hash, slot;
1250 
1251 	shift = mmu_psize_defs[psize].shift;
1252 	max_hpte_count = 1U << (PMD_SHIFT - shift);
1253 
1254 	for (i = 0; i < max_hpte_count; i++) {
1255 		valid = hpte_valid(hpte_slot_array, i);
1256 		if (!valid)
1257 			continue;
1258 		hidx =  hpte_hash_index(hpte_slot_array, i);
1259 
1260 		/* get the vpn */
1261 		addr = s_addr + (i * (1ul << shift));
1262 		vpn = hpt_vpn(addr, vsid, ssize);
1263 		hash = hpt_hash(vpn, shift, ssize);
1264 		if (hidx & _PTEIDX_SECONDARY)
1265 			hash = ~hash;
1266 
1267 		slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
1268 		slot += hidx & _PTEIDX_GROUP_IX;
1269 
1270 		slot_array[index] = slot;
1271 		vpn_array[index] = vpn;
1272 		if (index == PPC64_HUGE_HPTE_BATCH - 1) {
1273 			/*
1274 			 * Now do a bluk invalidate
1275 			 */
1276 			__pSeries_lpar_hugepage_invalidate(slot_array,
1277 							   vpn_array,
1278 							   PPC64_HUGE_HPTE_BATCH,
1279 							   psize, ssize);
1280 			index = 0;
1281 		} else
1282 			index++;
1283 	}
1284 	if (index)
1285 		__pSeries_lpar_hugepage_invalidate(slot_array, vpn_array,
1286 						   index, psize, ssize);
1287 }
1288 #else
1289 static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
1290 					     unsigned long addr,
1291 					     unsigned char *hpte_slot_array,
1292 					     int psize, int ssize, int local)
1293 {
1294 	WARN(1, "%s called without THP support\n", __func__);
1295 }
1296 #endif
1297 
1298 static int pSeries_lpar_hpte_removebolted(unsigned long ea,
1299 					  int psize, int ssize)
1300 {
1301 	unsigned long vpn;
1302 	unsigned long slot, vsid;
1303 
1304 	vsid = get_kernel_vsid(ea, ssize);
1305 	vpn = hpt_vpn(ea, vsid, ssize);
1306 
1307 	slot = pSeries_lpar_hpte_find(vpn, psize, ssize);
1308 	if (slot == -1)
1309 		return -ENOENT;
1310 
1311 	/*
1312 	 * lpar doesn't use the passed actual page size
1313 	 */
1314 	pSeries_lpar_hpte_invalidate(slot, vpn, psize, 0, ssize, 0);
1315 	return 0;
1316 }
1317 
1318 
1319 static inline unsigned long compute_slot(real_pte_t pte,
1320 					 unsigned long vpn,
1321 					 unsigned long index,
1322 					 unsigned long shift,
1323 					 int ssize)
1324 {
1325 	unsigned long slot, hash, hidx;
1326 
1327 	hash = hpt_hash(vpn, shift, ssize);
1328 	hidx = __rpte_to_hidx(pte, index);
1329 	if (hidx & _PTEIDX_SECONDARY)
1330 		hash = ~hash;
1331 	slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
1332 	slot += hidx & _PTEIDX_GROUP_IX;
1333 	return slot;
1334 }
1335 
1336 /**
1337  * The hcall H_BLOCK_REMOVE implies that the virtual pages to processed are
1338  * "all within the same naturally aligned 8 page virtual address block".
1339  */
1340 static void do_block_remove(unsigned long number, struct ppc64_tlb_batch *batch,
1341 			    unsigned long *param)
1342 {
1343 	unsigned long vpn;
1344 	unsigned long i, pix = 0;
1345 	unsigned long index, shift, slot, current_vpgb, vpgb;
1346 	real_pte_t pte;
1347 	int psize, ssize;
1348 
1349 	psize = batch->psize;
1350 	ssize = batch->ssize;
1351 
1352 	for (i = 0; i < number; i++) {
1353 		vpn = batch->vpn[i];
1354 		pte = batch->pte[i];
1355 		pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {
1356 			/*
1357 			 * Shifting 3 bits more on the right to get a
1358 			 * 8 pages aligned virtual addresse.
1359 			 */
1360 			vpgb = (vpn >> (shift - VPN_SHIFT + 3));
1361 			if (!pix || vpgb != current_vpgb) {
1362 				/*
1363 				 * Need to start a new 8 pages block, flush
1364 				 * the current one if needed.
1365 				 */
1366 				if (pix)
1367 					(void)call_block_remove(pix, param,
1368 								true);
1369 				current_vpgb = vpgb;
1370 				param[0] = hpte_encode_avpn(vpn, psize,
1371 							    ssize);
1372 				pix = 1;
1373 			}
1374 
1375 			slot = compute_slot(pte, vpn, index, shift, ssize);
1376 			param[pix++] = HBR_REQUEST | HBLKR_AVPN | slot;
1377 
1378 			if (pix == PLPAR_HCALL9_BUFSIZE) {
1379 				pix = call_block_remove(pix, param, false);
1380 				/*
1381 				 * pix = 0 means that all the entries were
1382 				 * removed, we can start a new block.
1383 				 * Otherwise, this means that there are entries
1384 				 * to retry, and pix points to latest one, so
1385 				 * we should increment it and try to continue
1386 				 * the same block.
1387 				 */
1388 				if (pix)
1389 					pix++;
1390 			}
1391 		} pte_iterate_hashed_end();
1392 	}
1393 
1394 	if (pix)
1395 		(void)call_block_remove(pix, param, true);
1396 }
1397 
1398 /*
1399  * TLB Block Invalidate Characteristics
1400  *
1401  * These characteristics define the size of the block the hcall H_BLOCK_REMOVE
1402  * is able to process for each couple segment base page size, actual page size.
1403  *
1404  * The ibm,get-system-parameter properties is returning a buffer with the
1405  * following layout:
1406  *
1407  * [ 2 bytes size of the RTAS buffer (excluding these 2 bytes) ]
1408  * -----------------
1409  * TLB Block Invalidate Specifiers:
1410  * [ 1 byte LOG base 2 of the TLB invalidate block size being specified ]
1411  * [ 1 byte Number of page sizes (N) that are supported for the specified
1412  *          TLB invalidate block size ]
1413  * [ 1 byte Encoded segment base page size and actual page size
1414  *          MSB=0 means 4k segment base page size and actual page size
1415  *          MSB=1 the penc value in mmu_psize_def ]
1416  * ...
1417  * -----------------
1418  * Next TLB Block Invalidate Specifiers...
1419  * -----------------
1420  * [ 0 ]
1421  */
1422 static inline void set_hblkrm_bloc_size(int bpsize, int psize,
1423 					unsigned int block_size)
1424 {
1425 	if (block_size > hblkrm_size[bpsize][psize])
1426 		hblkrm_size[bpsize][psize] = block_size;
1427 }
1428 
1429 /*
1430  * Decode the Encoded segment base page size and actual page size.
1431  * PAPR specifies:
1432  *   - bit 7 is the L bit
1433  *   - bits 0-5 are the penc value
1434  * If the L bit is 0, this means 4K segment base page size and actual page size
1435  * otherwise the penc value should be read.
1436  */
1437 #define HBLKRM_L_MASK		0x80
1438 #define HBLKRM_PENC_MASK	0x3f
1439 static inline void __init check_lp_set_hblkrm(unsigned int lp,
1440 					      unsigned int block_size)
1441 {
1442 	unsigned int bpsize, psize;
1443 
1444 	/* First, check the L bit, if not set, this means 4K */
1445 	if ((lp & HBLKRM_L_MASK) == 0) {
1446 		set_hblkrm_bloc_size(MMU_PAGE_4K, MMU_PAGE_4K, block_size);
1447 		return;
1448 	}
1449 
1450 	lp &= HBLKRM_PENC_MASK;
1451 	for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++) {
1452 		struct mmu_psize_def *def = &mmu_psize_defs[bpsize];
1453 
1454 		for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
1455 			if (def->penc[psize] == lp) {
1456 				set_hblkrm_bloc_size(bpsize, psize, block_size);
1457 				return;
1458 			}
1459 		}
1460 	}
1461 }
1462 
1463 #define SPLPAR_TLB_BIC_TOKEN		50
1464 
1465 /*
1466  * The size of the TLB Block Invalidate Characteristics is variable. But at the
1467  * maximum it will be the number of possible page sizes *2 + 10 bytes.
1468  * Currently MMU_PAGE_COUNT is 16, which means 42 bytes. Use a cache line size
1469  * (128 bytes) for the buffer to get plenty of space.
1470  */
1471 #define SPLPAR_TLB_BIC_MAXLENGTH	128
1472 
1473 void __init pseries_lpar_read_hblkrm_characteristics(void)
1474 {
1475 	unsigned char local_buffer[SPLPAR_TLB_BIC_MAXLENGTH];
1476 	int call_status, len, idx, bpsize;
1477 
1478 	if (!firmware_has_feature(FW_FEATURE_BLOCK_REMOVE))
1479 		return;
1480 
1481 	spin_lock(&rtas_data_buf_lock);
1482 	memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
1483 	call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
1484 				NULL,
1485 				SPLPAR_TLB_BIC_TOKEN,
1486 				__pa(rtas_data_buf),
1487 				RTAS_DATA_BUF_SIZE);
1488 	memcpy(local_buffer, rtas_data_buf, SPLPAR_TLB_BIC_MAXLENGTH);
1489 	local_buffer[SPLPAR_TLB_BIC_MAXLENGTH - 1] = '\0';
1490 	spin_unlock(&rtas_data_buf_lock);
1491 
1492 	if (call_status != 0) {
1493 		pr_warn("%s %s Error calling get-system-parameter (0x%x)\n",
1494 			__FILE__, __func__, call_status);
1495 		return;
1496 	}
1497 
1498 	/*
1499 	 * The first two (2) bytes of the data in the buffer are the length of
1500 	 * the returned data, not counting these first two (2) bytes.
1501 	 */
1502 	len = be16_to_cpu(*((u16 *)local_buffer)) + 2;
1503 	if (len > SPLPAR_TLB_BIC_MAXLENGTH) {
1504 		pr_warn("%s too large returned buffer %d", __func__, len);
1505 		return;
1506 	}
1507 
1508 	idx = 2;
1509 	while (idx < len) {
1510 		u8 block_shift = local_buffer[idx++];
1511 		u32 block_size;
1512 		unsigned int npsize;
1513 
1514 		if (!block_shift)
1515 			break;
1516 
1517 		block_size = 1 << block_shift;
1518 
1519 		for (npsize = local_buffer[idx++];
1520 		     npsize > 0 && idx < len; npsize--)
1521 			check_lp_set_hblkrm((unsigned int) local_buffer[idx++],
1522 					    block_size);
1523 	}
1524 
1525 	for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++)
1526 		for (idx = 0; idx < MMU_PAGE_COUNT; idx++)
1527 			if (hblkrm_size[bpsize][idx])
1528 				pr_info("H_BLOCK_REMOVE supports base psize:%d psize:%d block size:%d",
1529 					bpsize, idx, hblkrm_size[bpsize][idx]);
1530 }
1531 
1532 /*
1533  * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
1534  * lock.
1535  */
1536 static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
1537 {
1538 	unsigned long vpn;
1539 	unsigned long i, pix, rc;
1540 	unsigned long flags = 0;
1541 	struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
1542 	int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
1543 	unsigned long param[PLPAR_HCALL9_BUFSIZE];
1544 	unsigned long index, shift, slot;
1545 	real_pte_t pte;
1546 	int psize, ssize;
1547 
1548 	if (lock_tlbie)
1549 		spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
1550 
1551 	if (is_supported_hlbkrm(batch->psize, batch->psize)) {
1552 		do_block_remove(number, batch, param);
1553 		goto out;
1554 	}
1555 
1556 	psize = batch->psize;
1557 	ssize = batch->ssize;
1558 	pix = 0;
1559 	for (i = 0; i < number; i++) {
1560 		vpn = batch->vpn[i];
1561 		pte = batch->pte[i];
1562 		pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {
1563 			slot = compute_slot(pte, vpn, index, shift, ssize);
1564 			if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
1565 				/*
1566 				 * lpar doesn't use the passed actual page size
1567 				 */
1568 				pSeries_lpar_hpte_invalidate(slot, vpn, psize,
1569 							     0, ssize, local);
1570 			} else {
1571 				param[pix] = HBR_REQUEST | HBR_AVPN | slot;
1572 				param[pix+1] = hpte_encode_avpn(vpn, psize,
1573 								ssize);
1574 				pix += 2;
1575 				if (pix == 8) {
1576 					rc = plpar_hcall9(H_BULK_REMOVE, param,
1577 						param[0], param[1], param[2],
1578 						param[3], param[4], param[5],
1579 						param[6], param[7]);
1580 					BUG_ON(rc != H_SUCCESS);
1581 					pix = 0;
1582 				}
1583 			}
1584 		} pte_iterate_hashed_end();
1585 	}
1586 	if (pix) {
1587 		param[pix] = HBR_END;
1588 		rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
1589 				  param[2], param[3], param[4], param[5],
1590 				  param[6], param[7]);
1591 		BUG_ON(rc != H_SUCCESS);
1592 	}
1593 
1594 out:
1595 	if (lock_tlbie)
1596 		spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
1597 }
1598 
1599 static int __init disable_bulk_remove(char *str)
1600 {
1601 	if (strcmp(str, "off") == 0 &&
1602 	    firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
1603 		pr_info("Disabling BULK_REMOVE firmware feature");
1604 		powerpc_firmware_features &= ~FW_FEATURE_BULK_REMOVE;
1605 	}
1606 	return 1;
1607 }
1608 
1609 __setup("bulk_remove=", disable_bulk_remove);
1610 
1611 #define HPT_RESIZE_TIMEOUT	10000 /* ms */
1612 
1613 struct hpt_resize_state {
1614 	unsigned long shift;
1615 	int commit_rc;
1616 };
1617 
1618 static int pseries_lpar_resize_hpt_commit(void *data)
1619 {
1620 	struct hpt_resize_state *state = data;
1621 
1622 	state->commit_rc = plpar_resize_hpt_commit(0, state->shift);
1623 	if (state->commit_rc != H_SUCCESS)
1624 		return -EIO;
1625 
1626 	/* Hypervisor has transitioned the HTAB, update our globals */
1627 	ppc64_pft_size = state->shift;
1628 	htab_size_bytes = 1UL << ppc64_pft_size;
1629 	htab_hash_mask = (htab_size_bytes >> 7) - 1;
1630 
1631 	return 0;
1632 }
1633 
1634 /*
1635  * Must be called in process context. The caller must hold the
1636  * cpus_lock.
1637  */
1638 static int pseries_lpar_resize_hpt(unsigned long shift)
1639 {
1640 	struct hpt_resize_state state = {
1641 		.shift = shift,
1642 		.commit_rc = H_FUNCTION,
1643 	};
1644 	unsigned int delay, total_delay = 0;
1645 	int rc;
1646 	ktime_t t0, t1, t2;
1647 
1648 	might_sleep();
1649 
1650 	if (!firmware_has_feature(FW_FEATURE_HPT_RESIZE))
1651 		return -ENODEV;
1652 
1653 	pr_info("Attempting to resize HPT to shift %lu\n", shift);
1654 
1655 	t0 = ktime_get();
1656 
1657 	rc = plpar_resize_hpt_prepare(0, shift);
1658 	while (H_IS_LONG_BUSY(rc)) {
1659 		delay = get_longbusy_msecs(rc);
1660 		total_delay += delay;
1661 		if (total_delay > HPT_RESIZE_TIMEOUT) {
1662 			/* prepare with shift==0 cancels an in-progress resize */
1663 			rc = plpar_resize_hpt_prepare(0, 0);
1664 			if (rc != H_SUCCESS)
1665 				pr_warn("Unexpected error %d cancelling timed out HPT resize\n",
1666 				       rc);
1667 			return -ETIMEDOUT;
1668 		}
1669 		msleep(delay);
1670 		rc = plpar_resize_hpt_prepare(0, shift);
1671 	}
1672 
1673 	switch (rc) {
1674 	case H_SUCCESS:
1675 		/* Continue on */
1676 		break;
1677 
1678 	case H_PARAMETER:
1679 		pr_warn("Invalid argument from H_RESIZE_HPT_PREPARE\n");
1680 		return -EINVAL;
1681 	case H_RESOURCE:
1682 		pr_warn("Operation not permitted from H_RESIZE_HPT_PREPARE\n");
1683 		return -EPERM;
1684 	default:
1685 		pr_warn("Unexpected error %d from H_RESIZE_HPT_PREPARE\n", rc);
1686 		return -EIO;
1687 	}
1688 
1689 	t1 = ktime_get();
1690 
1691 	rc = stop_machine_cpuslocked(pseries_lpar_resize_hpt_commit,
1692 				     &state, NULL);
1693 
1694 	t2 = ktime_get();
1695 
1696 	if (rc != 0) {
1697 		switch (state.commit_rc) {
1698 		case H_PTEG_FULL:
1699 			return -ENOSPC;
1700 
1701 		default:
1702 			pr_warn("Unexpected error %d from H_RESIZE_HPT_COMMIT\n",
1703 				state.commit_rc);
1704 			return -EIO;
1705 		};
1706 	}
1707 
1708 	pr_info("HPT resize to shift %lu complete (%lld ms / %lld ms)\n",
1709 		shift, (long long) ktime_ms_delta(t1, t0),
1710 		(long long) ktime_ms_delta(t2, t1));
1711 
1712 	return 0;
1713 }
1714 
1715 void __init hpte_init_pseries(void)
1716 {
1717 	mmu_hash_ops.hpte_invalidate	 = pSeries_lpar_hpte_invalidate;
1718 	mmu_hash_ops.hpte_updatepp	 = pSeries_lpar_hpte_updatepp;
1719 	mmu_hash_ops.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp;
1720 	mmu_hash_ops.hpte_insert	 = pSeries_lpar_hpte_insert;
1721 	mmu_hash_ops.hpte_remove	 = pSeries_lpar_hpte_remove;
1722 	mmu_hash_ops.hpte_removebolted   = pSeries_lpar_hpte_removebolted;
1723 	mmu_hash_ops.flush_hash_range	 = pSeries_lpar_flush_hash_range;
1724 	mmu_hash_ops.hpte_clear_all      = pseries_hpte_clear_all;
1725 	mmu_hash_ops.hugepage_invalidate = pSeries_lpar_hugepage_invalidate;
1726 
1727 	if (firmware_has_feature(FW_FEATURE_HPT_RESIZE))
1728 		mmu_hash_ops.resize_hpt = pseries_lpar_resize_hpt;
1729 
1730 	/*
1731 	 * On POWER9, we need to do a H_REGISTER_PROC_TBL hcall
1732 	 * to inform the hypervisor that we wish to use the HPT.
1733 	 */
1734 	if (cpu_has_feature(CPU_FTR_ARCH_300))
1735 		pseries_lpar_register_process_table(0, 0, 0);
1736 }
1737 #endif /* CONFIG_PPC_64S_HASH_MMU */
1738 
1739 #ifdef CONFIG_PPC_RADIX_MMU
1740 void __init radix_init_pseries(void)
1741 {
1742 	pr_info("Using radix MMU under hypervisor\n");
1743 
1744 	pseries_lpar_register_process_table(__pa(process_tb),
1745 						0, PRTB_SIZE_SHIFT - 12);
1746 }
1747 #endif
1748 
1749 #ifdef CONFIG_PPC_SMLPAR
1750 #define CMO_FREE_HINT_DEFAULT 1
1751 static int cmo_free_hint_flag = CMO_FREE_HINT_DEFAULT;
1752 
1753 static int __init cmo_free_hint(char *str)
1754 {
1755 	char *parm;
1756 	parm = strstrip(str);
1757 
1758 	if (strcasecmp(parm, "no") == 0 || strcasecmp(parm, "off") == 0) {
1759 		pr_info("%s: CMO free page hinting is not active.\n", __func__);
1760 		cmo_free_hint_flag = 0;
1761 		return 1;
1762 	}
1763 
1764 	cmo_free_hint_flag = 1;
1765 	pr_info("%s: CMO free page hinting is active.\n", __func__);
1766 
1767 	if (strcasecmp(parm, "yes") == 0 || strcasecmp(parm, "on") == 0)
1768 		return 1;
1769 
1770 	return 0;
1771 }
1772 
1773 __setup("cmo_free_hint=", cmo_free_hint);
1774 
1775 static void pSeries_set_page_state(struct page *page, int order,
1776 				   unsigned long state)
1777 {
1778 	int i, j;
1779 	unsigned long cmo_page_sz, addr;
1780 
1781 	cmo_page_sz = cmo_get_page_size();
1782 	addr = __pa((unsigned long)page_address(page));
1783 
1784 	for (i = 0; i < (1 << order); i++, addr += PAGE_SIZE) {
1785 		for (j = 0; j < PAGE_SIZE; j += cmo_page_sz)
1786 			plpar_hcall_norets(H_PAGE_INIT, state, addr + j, 0);
1787 	}
1788 }
1789 
1790 void arch_free_page(struct page *page, int order)
1791 {
1792 	if (radix_enabled())
1793 		return;
1794 	if (!cmo_free_hint_flag || !firmware_has_feature(FW_FEATURE_CMO))
1795 		return;
1796 
1797 	pSeries_set_page_state(page, order, H_PAGE_SET_UNUSED);
1798 }
1799 EXPORT_SYMBOL(arch_free_page);
1800 
1801 #endif /* CONFIG_PPC_SMLPAR */
1802 #endif /* CONFIG_PPC_BOOK3S_64 */
1803 
1804 #ifdef CONFIG_TRACEPOINTS
1805 #ifdef CONFIG_JUMP_LABEL
1806 struct static_key hcall_tracepoint_key = STATIC_KEY_INIT;
1807 
1808 int hcall_tracepoint_regfunc(void)
1809 {
1810 	static_key_slow_inc(&hcall_tracepoint_key);
1811 	return 0;
1812 }
1813 
1814 void hcall_tracepoint_unregfunc(void)
1815 {
1816 	static_key_slow_dec(&hcall_tracepoint_key);
1817 }
1818 #else
1819 /*
1820  * We optimise our hcall path by placing hcall_tracepoint_refcount
1821  * directly in the TOC so we can check if the hcall tracepoints are
1822  * enabled via a single load.
1823  */
1824 
1825 /* NB: reg/unreg are called while guarded with the tracepoints_mutex */
1826 extern long hcall_tracepoint_refcount;
1827 
1828 int hcall_tracepoint_regfunc(void)
1829 {
1830 	hcall_tracepoint_refcount++;
1831 	return 0;
1832 }
1833 
1834 void hcall_tracepoint_unregfunc(void)
1835 {
1836 	hcall_tracepoint_refcount--;
1837 }
1838 #endif
1839 
1840 /*
1841  * Keep track of hcall tracing depth and prevent recursion. Warn if any is
1842  * detected because it may indicate a problem. This will not catch all
1843  * problems with tracing code making hcalls, because the tracing might have
1844  * been invoked from a non-hcall, so the first hcall could recurse into it
1845  * without warning here, but this better than nothing.
1846  *
1847  * Hcalls with specific problems being traced should use the _notrace
1848  * plpar_hcall variants.
1849  */
1850 static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
1851 
1852 
1853 notrace void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
1854 {
1855 	unsigned long flags;
1856 	unsigned int *depth;
1857 
1858 	local_irq_save(flags);
1859 
1860 	depth = this_cpu_ptr(&hcall_trace_depth);
1861 
1862 	if (WARN_ON_ONCE(*depth))
1863 		goto out;
1864 
1865 	(*depth)++;
1866 	preempt_disable();
1867 	trace_hcall_entry(opcode, args);
1868 	(*depth)--;
1869 
1870 out:
1871 	local_irq_restore(flags);
1872 }
1873 
1874 notrace void __trace_hcall_exit(long opcode, long retval, unsigned long *retbuf)
1875 {
1876 	unsigned long flags;
1877 	unsigned int *depth;
1878 
1879 	local_irq_save(flags);
1880 
1881 	depth = this_cpu_ptr(&hcall_trace_depth);
1882 
1883 	if (*depth) /* Don't warn again on the way out */
1884 		goto out;
1885 
1886 	(*depth)++;
1887 	trace_hcall_exit(opcode, retval, retbuf);
1888 	preempt_enable();
1889 	(*depth)--;
1890 
1891 out:
1892 	local_irq_restore(flags);
1893 }
1894 #endif
1895 
1896 /**
1897  * h_get_mpp
1898  * H_GET_MPP hcall returns info in 7 parms
1899  */
1900 int h_get_mpp(struct hvcall_mpp_data *mpp_data)
1901 {
1902 	int rc;
1903 	unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
1904 
1905 	rc = plpar_hcall9(H_GET_MPP, retbuf);
1906 
1907 	mpp_data->entitled_mem = retbuf[0];
1908 	mpp_data->mapped_mem = retbuf[1];
1909 
1910 	mpp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff;
1911 	mpp_data->pool_num = retbuf[2] & 0xffff;
1912 
1913 	mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff;
1914 	mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff;
1915 	mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffffUL;
1916 
1917 	mpp_data->pool_size = retbuf[4];
1918 	mpp_data->loan_request = retbuf[5];
1919 	mpp_data->backing_mem = retbuf[6];
1920 
1921 	return rc;
1922 }
1923 EXPORT_SYMBOL(h_get_mpp);
1924 
1925 int h_get_mpp_x(struct hvcall_mpp_x_data *mpp_x_data)
1926 {
1927 	int rc;
1928 	unsigned long retbuf[PLPAR_HCALL9_BUFSIZE] = { 0 };
1929 
1930 	rc = plpar_hcall9(H_GET_MPP_X, retbuf);
1931 
1932 	mpp_x_data->coalesced_bytes = retbuf[0];
1933 	mpp_x_data->pool_coalesced_bytes = retbuf[1];
1934 	mpp_x_data->pool_purr_cycles = retbuf[2];
1935 	mpp_x_data->pool_spurr_cycles = retbuf[3];
1936 
1937 	return rc;
1938 }
1939 
1940 #ifdef CONFIG_PPC_64S_HASH_MMU
1941 static unsigned long __init vsid_unscramble(unsigned long vsid, int ssize)
1942 {
1943 	unsigned long protovsid;
1944 	unsigned long va_bits = VA_BITS;
1945 	unsigned long modinv, vsid_modulus;
1946 	unsigned long max_mod_inv, tmp_modinv;
1947 
1948 	if (!mmu_has_feature(MMU_FTR_68_BIT_VA))
1949 		va_bits = 65;
1950 
1951 	if (ssize == MMU_SEGSIZE_256M) {
1952 		modinv = VSID_MULINV_256M;
1953 		vsid_modulus = ((1UL << (va_bits - SID_SHIFT)) - 1);
1954 	} else {
1955 		modinv = VSID_MULINV_1T;
1956 		vsid_modulus = ((1UL << (va_bits - SID_SHIFT_1T)) - 1);
1957 	}
1958 
1959 	/*
1960 	 * vsid outside our range.
1961 	 */
1962 	if (vsid >= vsid_modulus)
1963 		return 0;
1964 
1965 	/*
1966 	 * If modinv is the modular multiplicate inverse of (x % vsid_modulus)
1967 	 * and vsid = (protovsid * x) % vsid_modulus, then we say:
1968 	 *   protovsid = (vsid * modinv) % vsid_modulus
1969 	 */
1970 
1971 	/* Check if (vsid * modinv) overflow (63 bits) */
1972 	max_mod_inv = 0x7fffffffffffffffull / vsid;
1973 	if (modinv < max_mod_inv)
1974 		return (vsid * modinv) % vsid_modulus;
1975 
1976 	tmp_modinv = modinv/max_mod_inv;
1977 	modinv %= max_mod_inv;
1978 
1979 	protovsid = (((vsid * max_mod_inv) % vsid_modulus) * tmp_modinv) % vsid_modulus;
1980 	protovsid = (protovsid + vsid * modinv) % vsid_modulus;
1981 
1982 	return protovsid;
1983 }
1984 
1985 static int __init reserve_vrma_context_id(void)
1986 {
1987 	unsigned long protovsid;
1988 
1989 	/*
1990 	 * Reserve context ids which map to reserved virtual addresses. For now
1991 	 * we only reserve the context id which maps to the VRMA VSID. We ignore
1992 	 * the addresses in "ibm,adjunct-virtual-addresses" because we don't
1993 	 * enable adjunct support via the "ibm,client-architecture-support"
1994 	 * interface.
1995 	 */
1996 	protovsid = vsid_unscramble(VRMA_VSID, MMU_SEGSIZE_1T);
1997 	hash__reserve_context_id(protovsid >> ESID_BITS_1T);
1998 	return 0;
1999 }
2000 machine_device_initcall(pseries, reserve_vrma_context_id);
2001 #endif
2002 
2003 #ifdef CONFIG_DEBUG_FS
2004 /* debugfs file interface for vpa data */
2005 static ssize_t vpa_file_read(struct file *filp, char __user *buf, size_t len,
2006 			      loff_t *pos)
2007 {
2008 	int cpu = (long)filp->private_data;
2009 	struct lppaca *lppaca = &lppaca_of(cpu);
2010 
2011 	return simple_read_from_buffer(buf, len, pos, lppaca,
2012 				sizeof(struct lppaca));
2013 }
2014 
2015 static const struct file_operations vpa_fops = {
2016 	.open		= simple_open,
2017 	.read		= vpa_file_read,
2018 	.llseek		= default_llseek,
2019 };
2020 
2021 static int __init vpa_debugfs_init(void)
2022 {
2023 	char name[16];
2024 	long i;
2025 	struct dentry *vpa_dir;
2026 
2027 	if (!firmware_has_feature(FW_FEATURE_SPLPAR))
2028 		return 0;
2029 
2030 	vpa_dir = debugfs_create_dir("vpa", arch_debugfs_dir);
2031 
2032 	/* set up the per-cpu vpa file*/
2033 	for_each_possible_cpu(i) {
2034 		sprintf(name, "cpu-%ld", i);
2035 		debugfs_create_file(name, 0400, vpa_dir, (void *)i, &vpa_fops);
2036 	}
2037 
2038 	return 0;
2039 }
2040 machine_arch_initcall(pseries, vpa_debugfs_init);
2041 #endif /* CONFIG_DEBUG_FS */
2042