1 /*
2  * The file intends to implement the platform dependent EEH operations on pseries.
3  * Actually, the pseries platform is built based on RTAS heavily. That means the
4  * pseries platform dependent EEH operations will be built on RTAS calls. The functions
5  * are devired from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
6  * been done.
7  *
8  * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
9  * Copyright IBM Corporation 2001, 2005, 2006
10  * Copyright Dave Engebretsen & Todd Inglett 2001
11  * Copyright Linas Vepstas 2005, 2006
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
26  */
27 
28 #include <linux/atomic.h>
29 #include <linux/delay.h>
30 #include <linux/export.h>
31 #include <linux/init.h>
32 #include <linux/list.h>
33 #include <linux/of.h>
34 #include <linux/pci.h>
35 #include <linux/proc_fs.h>
36 #include <linux/rbtree.h>
37 #include <linux/sched.h>
38 #include <linux/seq_file.h>
39 #include <linux/spinlock.h>
40 
41 #include <asm/eeh.h>
42 #include <asm/eeh_event.h>
43 #include <asm/io.h>
44 #include <asm/machdep.h>
45 #include <asm/ppc-pci.h>
46 #include <asm/rtas.h>
47 
48 /* RTAS tokens */
49 static int ibm_set_eeh_option;
50 static int ibm_set_slot_reset;
51 static int ibm_read_slot_reset_state;
52 static int ibm_read_slot_reset_state2;
53 static int ibm_slot_error_detail;
54 static int ibm_get_config_addr_info;
55 static int ibm_get_config_addr_info2;
56 static int ibm_configure_bridge;
57 static int ibm_configure_pe;
58 
59 /*
60  * Buffer for reporting slot-error-detail rtas calls. Its here
61  * in BSS, and not dynamically alloced, so that it ends up in
62  * RMO where RTAS can access it.
63  */
64 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
65 static DEFINE_SPINLOCK(slot_errbuf_lock);
66 static int eeh_error_buf_size;
67 
68 /**
69  * pseries_eeh_init - EEH platform dependent initialization
70  *
71  * EEH platform dependent initialization on pseries.
72  */
73 static int pseries_eeh_init(void)
74 {
75 	/* figure out EEH RTAS function call tokens */
76 	ibm_set_eeh_option		= rtas_token("ibm,set-eeh-option");
77 	ibm_set_slot_reset		= rtas_token("ibm,set-slot-reset");
78 	ibm_read_slot_reset_state2	= rtas_token("ibm,read-slot-reset-state2");
79 	ibm_read_slot_reset_state	= rtas_token("ibm,read-slot-reset-state");
80 	ibm_slot_error_detail		= rtas_token("ibm,slot-error-detail");
81 	ibm_get_config_addr_info2	= rtas_token("ibm,get-config-addr-info2");
82 	ibm_get_config_addr_info	= rtas_token("ibm,get-config-addr-info");
83 	ibm_configure_pe		= rtas_token("ibm,configure-pe");
84 	ibm_configure_bridge		= rtas_token("ibm,configure-bridge");
85 
86 	/*
87 	 * Necessary sanity check. We needn't check "get-config-addr-info"
88 	 * and its variant since the old firmware probably support address
89 	 * of domain/bus/slot/function for EEH RTAS operations.
90 	 */
91 	if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE) {
92 		pr_warning("%s: RTAS service <ibm,set-eeh-option> invalid\n",
93 			__func__);
94 		return -EINVAL;
95 	} else if (ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE) {
96 		pr_warning("%s: RTAS service <ibm,set-slot-reset> invalid\n",
97 			__func__);
98 		return -EINVAL;
99 	} else if (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
100 		   ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) {
101 		pr_warning("%s: RTAS service <ibm,read-slot-reset-state2> and "
102 			"<ibm,read-slot-reset-state> invalid\n",
103 			__func__);
104 		return -EINVAL;
105 	} else if (ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE) {
106 		pr_warning("%s: RTAS service <ibm,slot-error-detail> invalid\n",
107 			__func__);
108 		return -EINVAL;
109 	} else if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE &&
110 		   ibm_configure_bridge == RTAS_UNKNOWN_SERVICE) {
111 		pr_warning("%s: RTAS service <ibm,configure-pe> and "
112 			"<ibm,configure-bridge> invalid\n",
113 			__func__);
114 		return -EINVAL;
115 	}
116 
117 	/* Initialize error log lock and size */
118 	spin_lock_init(&slot_errbuf_lock);
119 	eeh_error_buf_size = rtas_token("rtas-error-log-max");
120 	if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
121 		pr_warning("%s: unknown EEH error log size\n",
122 			__func__);
123 		eeh_error_buf_size = 1024;
124 	} else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
125 		pr_warning("%s: EEH error log size %d exceeds the maximal %d\n",
126 			__func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
127 		eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
128 	}
129 
130 	/* Set EEH probe mode */
131 	eeh_probe_mode_set(EEH_PROBE_MODE_DEVTREE);
132 
133 	return 0;
134 }
135 
136 static int pseries_eeh_cap_start(struct device_node *dn)
137 {
138 	struct pci_dn *pdn = PCI_DN(dn);
139 	u32 status;
140 
141 	if (!pdn)
142 		return 0;
143 
144 	rtas_read_config(pdn, PCI_STATUS, 2, &status);
145 	if (!(status & PCI_STATUS_CAP_LIST))
146 		return 0;
147 
148 	return PCI_CAPABILITY_LIST;
149 }
150 
151 
152 static int pseries_eeh_find_cap(struct device_node *dn, int cap)
153 {
154 	struct pci_dn *pdn = PCI_DN(dn);
155 	int pos = pseries_eeh_cap_start(dn);
156 	int cnt = 48;	/* Maximal number of capabilities */
157 	u32 id;
158 
159 	if (!pos)
160 		return 0;
161 
162         while (cnt--) {
163 		rtas_read_config(pdn, pos, 1, &pos);
164 		if (pos < 0x40)
165 			break;
166 		pos &= ~3;
167 		rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
168 		if (id == 0xff)
169 			break;
170 		if (id == cap)
171 			return pos;
172 		pos += PCI_CAP_LIST_NEXT;
173 	}
174 
175 	return 0;
176 }
177 
178 static int pseries_eeh_find_ecap(struct device_node *dn, int cap)
179 {
180 	struct pci_dn *pdn = PCI_DN(dn);
181 	struct eeh_dev *edev = of_node_to_eeh_dev(dn);
182 	u32 header;
183 	int pos = 256;
184 	int ttl = (4096 - 256) / 8;
185 
186 	if (!edev || !edev->pcie_cap)
187 		return 0;
188 	if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
189 		return 0;
190 	else if (!header)
191 		return 0;
192 
193 	while (ttl-- > 0) {
194 		if (PCI_EXT_CAP_ID(header) == cap && pos)
195 			return pos;
196 
197 		pos = PCI_EXT_CAP_NEXT(header);
198 		if (pos < 256)
199 			break;
200 
201 		if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
202 			break;
203 	}
204 
205 	return 0;
206 }
207 
208 /**
209  * pseries_eeh_of_probe - EEH probe on the given device
210  * @dn: OF node
211  * @flag: Unused
212  *
213  * When EEH module is installed during system boot, all PCI devices
214  * are checked one by one to see if it supports EEH. The function
215  * is introduced for the purpose.
216  */
217 static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
218 {
219 	struct eeh_dev *edev;
220 	struct eeh_pe pe;
221 	struct pci_dn *pdn = PCI_DN(dn);
222 	const __be32 *classp, *vendorp, *devicep;
223 	u32 class_code;
224 	const __be32 *regs;
225 	u32 pcie_flags;
226 	int enable = 0;
227 	int ret;
228 
229 	/* Retrieve OF node and eeh device */
230 	edev = of_node_to_eeh_dev(dn);
231 	if (edev->pe || !of_device_is_available(dn))
232 		return NULL;
233 
234 	/* Retrieve class/vendor/device IDs */
235 	classp = of_get_property(dn, "class-code", NULL);
236 	vendorp = of_get_property(dn, "vendor-id", NULL);
237 	devicep = of_get_property(dn, "device-id", NULL);
238 
239 	/* Skip for bad OF node or PCI-ISA bridge */
240 	if (!classp || !vendorp || !devicep)
241 		return NULL;
242 	if (dn->type && !strcmp(dn->type, "isa"))
243 		return NULL;
244 
245 	class_code = of_read_number(classp, 1);
246 
247 	/*
248 	 * Update class code and mode of eeh device. We need
249 	 * correctly reflects that current device is root port
250 	 * or PCIe switch downstream port.
251 	 */
252 	edev->class_code = class_code;
253 	edev->pcix_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_PCIX);
254 	edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP);
255 	edev->aer_cap = pseries_eeh_find_ecap(dn, PCI_EXT_CAP_ID_ERR);
256 	edev->mode &= 0xFFFFFF00;
257 	if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
258 		edev->mode |= EEH_DEV_BRIDGE;
259 		if (edev->pcie_cap) {
260 			rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
261 					 2, &pcie_flags);
262 			pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
263 			if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
264 				edev->mode |= EEH_DEV_ROOT_PORT;
265 			else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
266 				edev->mode |= EEH_DEV_DS_PORT;
267 		}
268 	}
269 
270 	/* Retrieve the device address */
271 	regs = of_get_property(dn, "reg", NULL);
272 	if (!regs) {
273 		pr_warning("%s: OF node property %s::reg not found\n",
274 			__func__, dn->full_name);
275 		return NULL;
276 	}
277 
278 	/* Initialize the fake PE */
279 	memset(&pe, 0, sizeof(struct eeh_pe));
280 	pe.phb = edev->phb;
281 	pe.config_addr = of_read_number(regs, 1);
282 
283 	/* Enable EEH on the device */
284 	ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
285 	if (!ret) {
286 		edev->config_addr = of_read_number(regs, 1);
287 		/* Retrieve PE address */
288 		edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
289 		pe.addr = edev->pe_config_addr;
290 
291 		/* Some older systems (Power4) allow the ibm,set-eeh-option
292 		 * call to succeed even on nodes where EEH is not supported.
293 		 * Verify support explicitly.
294 		 */
295 		ret = eeh_ops->get_state(&pe, NULL);
296 		if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
297 			enable = 1;
298 
299 		if (enable) {
300 			eeh_set_enable(true);
301 			eeh_add_to_parent_pe(edev);
302 
303 			pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n",
304 				__func__, dn->full_name, pe.phb->global_number,
305 				pe.addr, pe.config_addr);
306 		} else if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
307 			   (of_node_to_eeh_dev(dn->parent))->pe) {
308 			/* This device doesn't support EEH, but it may have an
309 			 * EEH parent, in which case we mark it as supported.
310 			 */
311 			edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
312 			edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
313 			eeh_add_to_parent_pe(edev);
314 		}
315 	}
316 
317 	/* Save memory bars */
318 	eeh_save_bars(edev);
319 
320 	return NULL;
321 }
322 
323 /**
324  * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
325  * @pe: EEH PE
326  * @option: operation to be issued
327  *
328  * The function is used to control the EEH functionality globally.
329  * Currently, following options are support according to PAPR:
330  * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
331  */
332 static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
333 {
334 	int ret = 0;
335 	int config_addr;
336 
337 	/*
338 	 * When we're enabling or disabling EEH functioality on
339 	 * the particular PE, the PE config address is possibly
340 	 * unavailable. Therefore, we have to figure it out from
341 	 * the FDT node.
342 	 */
343 	switch (option) {
344 	case EEH_OPT_DISABLE:
345 	case EEH_OPT_ENABLE:
346 	case EEH_OPT_THAW_MMIO:
347 	case EEH_OPT_THAW_DMA:
348 		config_addr = pe->config_addr;
349 		if (pe->addr)
350 			config_addr = pe->addr;
351 		break;
352 
353 	default:
354 		pr_err("%s: Invalid option %d\n",
355 			__func__, option);
356 		return -EINVAL;
357 	}
358 
359 	ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
360 			config_addr, BUID_HI(pe->phb->buid),
361 			BUID_LO(pe->phb->buid), option);
362 
363 	return ret;
364 }
365 
366 /**
367  * pseries_eeh_get_pe_addr - Retrieve PE address
368  * @pe: EEH PE
369  *
370  * Retrieve the assocated PE address. Actually, there're 2 RTAS
371  * function calls dedicated for the purpose. We need implement
372  * it through the new function and then the old one. Besides,
373  * you should make sure the config address is figured out from
374  * FDT node before calling the function.
375  *
376  * It's notable that zero'ed return value means invalid PE config
377  * address.
378  */
379 static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
380 {
381 	int ret = 0;
382 	int rets[3];
383 
384 	if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
385 		/*
386 		 * First of all, we need to make sure there has one PE
387 		 * associated with the device. Otherwise, PE address is
388 		 * meaningless.
389 		 */
390 		ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
391 				pe->config_addr, BUID_HI(pe->phb->buid),
392 				BUID_LO(pe->phb->buid), 1);
393 		if (ret || (rets[0] == 0))
394 			return 0;
395 
396 		/* Retrieve the associated PE config address */
397 		ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
398 				pe->config_addr, BUID_HI(pe->phb->buid),
399 				BUID_LO(pe->phb->buid), 0);
400 		if (ret) {
401 			pr_warning("%s: Failed to get address for PHB#%d-PE#%x\n",
402 				__func__, pe->phb->global_number, pe->config_addr);
403 			return 0;
404 		}
405 
406 		return rets[0];
407 	}
408 
409 	if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
410 		ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
411 				pe->config_addr, BUID_HI(pe->phb->buid),
412 				BUID_LO(pe->phb->buid), 0);
413 		if (ret) {
414 			pr_warning("%s: Failed to get address for PHB#%d-PE#%x\n",
415 				__func__, pe->phb->global_number, pe->config_addr);
416 			return 0;
417 		}
418 
419 		return rets[0];
420 	}
421 
422 	return ret;
423 }
424 
425 /**
426  * pseries_eeh_get_state - Retrieve PE state
427  * @pe: EEH PE
428  * @state: return value
429  *
430  * Retrieve the state of the specified PE. On RTAS compliant
431  * pseries platform, there already has one dedicated RTAS function
432  * for the purpose. It's notable that the associated PE config address
433  * might be ready when calling the function. Therefore, endeavour to
434  * use the PE config address if possible. Further more, there're 2
435  * RTAS calls for the purpose, we need to try the new one and back
436  * to the old one if the new one couldn't work properly.
437  */
438 static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
439 {
440 	int config_addr;
441 	int ret;
442 	int rets[4];
443 	int result;
444 
445 	/* Figure out PE config address if possible */
446 	config_addr = pe->config_addr;
447 	if (pe->addr)
448 		config_addr = pe->addr;
449 
450 	if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
451 		ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
452 				config_addr, BUID_HI(pe->phb->buid),
453 				BUID_LO(pe->phb->buid));
454 	} else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
455 		/* Fake PE unavailable info */
456 		rets[2] = 0;
457 		ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
458 				config_addr, BUID_HI(pe->phb->buid),
459 				BUID_LO(pe->phb->buid));
460 	} else {
461 		return EEH_STATE_NOT_SUPPORT;
462 	}
463 
464 	if (ret)
465 		return ret;
466 
467 	/* Parse the result out */
468 	result = 0;
469 	if (rets[1]) {
470 		switch(rets[0]) {
471 		case 0:
472 			result &= ~EEH_STATE_RESET_ACTIVE;
473 			result |= EEH_STATE_MMIO_ACTIVE;
474 			result |= EEH_STATE_DMA_ACTIVE;
475 			break;
476 		case 1:
477 			result |= EEH_STATE_RESET_ACTIVE;
478 			result |= EEH_STATE_MMIO_ACTIVE;
479 			result |= EEH_STATE_DMA_ACTIVE;
480 			break;
481 		case 2:
482 			result &= ~EEH_STATE_RESET_ACTIVE;
483 			result &= ~EEH_STATE_MMIO_ACTIVE;
484 			result &= ~EEH_STATE_DMA_ACTIVE;
485 			break;
486 		case 4:
487 			result &= ~EEH_STATE_RESET_ACTIVE;
488 			result &= ~EEH_STATE_MMIO_ACTIVE;
489 			result &= ~EEH_STATE_DMA_ACTIVE;
490 			result |= EEH_STATE_MMIO_ENABLED;
491 			break;
492 		case 5:
493 			if (rets[2]) {
494 				if (state) *state = rets[2];
495 				result = EEH_STATE_UNAVAILABLE;
496 			} else {
497 				result = EEH_STATE_NOT_SUPPORT;
498 			}
499 			break;
500 		default:
501 			result = EEH_STATE_NOT_SUPPORT;
502 		}
503 	} else {
504 		result = EEH_STATE_NOT_SUPPORT;
505 	}
506 
507 	return result;
508 }
509 
510 /**
511  * pseries_eeh_reset - Reset the specified PE
512  * @pe: EEH PE
513  * @option: reset option
514  *
515  * Reset the specified PE
516  */
517 static int pseries_eeh_reset(struct eeh_pe *pe, int option)
518 {
519 	int config_addr;
520 	int ret;
521 
522 	/* Figure out PE address */
523 	config_addr = pe->config_addr;
524 	if (pe->addr)
525 		config_addr = pe->addr;
526 
527 	/* Reset PE through RTAS call */
528 	ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
529 			config_addr, BUID_HI(pe->phb->buid),
530 			BUID_LO(pe->phb->buid), option);
531 
532 	/* If fundamental-reset not supported, try hot-reset */
533 	if (option == EEH_RESET_FUNDAMENTAL &&
534 	    ret == -8) {
535 		option = EEH_RESET_HOT;
536 		ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
537 				config_addr, BUID_HI(pe->phb->buid),
538 				BUID_LO(pe->phb->buid), option);
539 	}
540 
541 	/* We need reset hold or settlement delay */
542 	if (option == EEH_RESET_FUNDAMENTAL ||
543 	    option == EEH_RESET_HOT)
544 		msleep(EEH_PE_RST_HOLD_TIME);
545 	else
546 		msleep(EEH_PE_RST_SETTLE_TIME);
547 
548 	return ret;
549 }
550 
551 /**
552  * pseries_eeh_wait_state - Wait for PE state
553  * @pe: EEH PE
554  * @max_wait: maximal period in microsecond
555  *
556  * Wait for the state of associated PE. It might take some time
557  * to retrieve the PE's state.
558  */
559 static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait)
560 {
561 	int ret;
562 	int mwait;
563 
564 	/*
565 	 * According to PAPR, the state of PE might be temporarily
566 	 * unavailable. Under the circumstance, we have to wait
567 	 * for indicated time determined by firmware. The maximal
568 	 * wait time is 5 minutes, which is acquired from the original
569 	 * EEH implementation. Also, the original implementation
570 	 * also defined the minimal wait time as 1 second.
571 	 */
572 #define EEH_STATE_MIN_WAIT_TIME	(1000)
573 #define EEH_STATE_MAX_WAIT_TIME	(300 * 1000)
574 
575 	while (1) {
576 		ret = pseries_eeh_get_state(pe, &mwait);
577 
578 		/*
579 		 * If the PE's state is temporarily unavailable,
580 		 * we have to wait for the specified time. Otherwise,
581 		 * the PE's state will be returned immediately.
582 		 */
583 		if (ret != EEH_STATE_UNAVAILABLE)
584 			return ret;
585 
586 		if (max_wait <= 0) {
587 			pr_warning("%s: Timeout when getting PE's state (%d)\n",
588 				__func__, max_wait);
589 			return EEH_STATE_NOT_SUPPORT;
590 		}
591 
592 		if (mwait <= 0) {
593 			pr_warning("%s: Firmware returned bad wait value %d\n",
594 				__func__, mwait);
595 			mwait = EEH_STATE_MIN_WAIT_TIME;
596 		} else if (mwait > EEH_STATE_MAX_WAIT_TIME) {
597 			pr_warning("%s: Firmware returned too long wait value %d\n",
598 				__func__, mwait);
599 			mwait = EEH_STATE_MAX_WAIT_TIME;
600 		}
601 
602 		max_wait -= mwait;
603 		msleep(mwait);
604 	}
605 
606 	return EEH_STATE_NOT_SUPPORT;
607 }
608 
609 /**
610  * pseries_eeh_get_log - Retrieve error log
611  * @pe: EEH PE
612  * @severity: temporary or permanent error log
613  * @drv_log: driver log to be combined with retrieved error log
614  * @len: length of driver log
615  *
616  * Retrieve the temporary or permanent error from the PE.
617  * Actually, the error will be retrieved through the dedicated
618  * RTAS call.
619  */
620 static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
621 {
622 	int config_addr;
623 	unsigned long flags;
624 	int ret;
625 
626 	spin_lock_irqsave(&slot_errbuf_lock, flags);
627 	memset(slot_errbuf, 0, eeh_error_buf_size);
628 
629 	/* Figure out the PE address */
630 	config_addr = pe->config_addr;
631 	if (pe->addr)
632 		config_addr = pe->addr;
633 
634 	ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
635 			BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
636 			virt_to_phys(drv_log), len,
637 			virt_to_phys(slot_errbuf), eeh_error_buf_size,
638 			severity);
639 	if (!ret)
640 		log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
641 	spin_unlock_irqrestore(&slot_errbuf_lock, flags);
642 
643 	return ret;
644 }
645 
646 /**
647  * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
648  * @pe: EEH PE
649  *
650  * The function will be called to reconfigure the bridges included
651  * in the specified PE so that the mulfunctional PE would be recovered
652  * again.
653  */
654 static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
655 {
656 	int config_addr;
657 	int ret;
658 
659 	/* Figure out the PE address */
660 	config_addr = pe->config_addr;
661 	if (pe->addr)
662 		config_addr = pe->addr;
663 
664 	/* Use new configure-pe function, if supported */
665 	if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) {
666 		ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
667 				config_addr, BUID_HI(pe->phb->buid),
668 				BUID_LO(pe->phb->buid));
669 	} else if (ibm_configure_bridge != RTAS_UNKNOWN_SERVICE) {
670 		ret = rtas_call(ibm_configure_bridge, 3, 1, NULL,
671 				config_addr, BUID_HI(pe->phb->buid),
672 				BUID_LO(pe->phb->buid));
673 	} else {
674 		return -EFAULT;
675 	}
676 
677 	if (ret)
678 		pr_warning("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",
679 			__func__, pe->phb->global_number, pe->addr, ret);
680 
681 	return ret;
682 }
683 
684 /**
685  * pseries_eeh_read_config - Read PCI config space
686  * @dn: device node
687  * @where: PCI address
688  * @size: size to read
689  * @val: return value
690  *
691  * Read config space from the speicifed device
692  */
693 static int pseries_eeh_read_config(struct device_node *dn, int where, int size, u32 *val)
694 {
695 	struct pci_dn *pdn;
696 
697 	pdn = PCI_DN(dn);
698 
699 	return rtas_read_config(pdn, where, size, val);
700 }
701 
702 /**
703  * pseries_eeh_write_config - Write PCI config space
704  * @dn: device node
705  * @where: PCI address
706  * @size: size to write
707  * @val: value to be written
708  *
709  * Write config space to the specified device
710  */
711 static int pseries_eeh_write_config(struct device_node *dn, int where, int size, u32 val)
712 {
713 	struct pci_dn *pdn;
714 
715 	pdn = PCI_DN(dn);
716 
717 	return rtas_write_config(pdn, where, size, val);
718 }
719 
720 static struct eeh_ops pseries_eeh_ops = {
721 	.name			= "pseries",
722 	.init			= pseries_eeh_init,
723 	.of_probe		= pseries_eeh_of_probe,
724 	.dev_probe		= NULL,
725 	.set_option		= pseries_eeh_set_option,
726 	.get_pe_addr		= pseries_eeh_get_pe_addr,
727 	.get_state		= pseries_eeh_get_state,
728 	.reset			= pseries_eeh_reset,
729 	.wait_state		= pseries_eeh_wait_state,
730 	.get_log		= pseries_eeh_get_log,
731 	.configure_bridge       = pseries_eeh_configure_bridge,
732 	.read_config		= pseries_eeh_read_config,
733 	.write_config		= pseries_eeh_write_config,
734 	.next_error		= NULL,
735 	.restore_config		= NULL
736 };
737 
738 /**
739  * eeh_pseries_init - Register platform dependent EEH operations
740  *
741  * EEH initialization on pseries platform. This function should be
742  * called before any EEH related functions.
743  */
744 static int __init eeh_pseries_init(void)
745 {
746 	int ret = -EINVAL;
747 
748 	if (!machine_is(pseries))
749 		return ret;
750 
751 	ret = eeh_ops_register(&pseries_eeh_ops);
752 	if (!ret)
753 		pr_info("EEH: pSeries platform initialized\n");
754 	else
755 		pr_info("EEH: pSeries platform initialization failure (%d)\n",
756 			ret);
757 
758 	return ret;
759 }
760 
761 early_initcall(eeh_pseries_init);
762