1 /* 2 * The file intends to implement the platform dependent EEH operations on pseries. 3 * Actually, the pseries platform is built based on RTAS heavily. That means the 4 * pseries platform dependent EEH operations will be built on RTAS calls. The functions 5 * are devired from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has 6 * been done. 7 * 8 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011. 9 * Copyright IBM Corporation 2001, 2005, 2006 10 * Copyright Dave Engebretsen & Todd Inglett 2001 11 * Copyright Linas Vepstas 2005, 2006 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 26 */ 27 28 #include <linux/atomic.h> 29 #include <linux/delay.h> 30 #include <linux/export.h> 31 #include <linux/init.h> 32 #include <linux/list.h> 33 #include <linux/of.h> 34 #include <linux/pci.h> 35 #include <linux/proc_fs.h> 36 #include <linux/rbtree.h> 37 #include <linux/sched.h> 38 #include <linux/seq_file.h> 39 #include <linux/spinlock.h> 40 41 #include <asm/eeh.h> 42 #include <asm/eeh_event.h> 43 #include <asm/io.h> 44 #include <asm/machdep.h> 45 #include <asm/ppc-pci.h> 46 #include <asm/rtas.h> 47 48 /* RTAS tokens */ 49 static int ibm_set_eeh_option; 50 static int ibm_set_slot_reset; 51 static int ibm_read_slot_reset_state; 52 static int ibm_read_slot_reset_state2; 53 static int ibm_slot_error_detail; 54 static int ibm_get_config_addr_info; 55 static int ibm_get_config_addr_info2; 56 static int ibm_configure_bridge; 57 static int ibm_configure_pe; 58 59 /* 60 * Buffer for reporting slot-error-detail rtas calls. Its here 61 * in BSS, and not dynamically alloced, so that it ends up in 62 * RMO where RTAS can access it. 63 */ 64 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX]; 65 static DEFINE_SPINLOCK(slot_errbuf_lock); 66 static int eeh_error_buf_size; 67 68 /** 69 * pseries_eeh_init - EEH platform dependent initialization 70 * 71 * EEH platform dependent initialization on pseries. 72 */ 73 static int pseries_eeh_init(void) 74 { 75 /* figure out EEH RTAS function call tokens */ 76 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option"); 77 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset"); 78 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2"); 79 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state"); 80 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail"); 81 ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2"); 82 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info"); 83 ibm_configure_pe = rtas_token("ibm,configure-pe"); 84 ibm_configure_bridge = rtas_token("ibm,configure-bridge"); 85 86 /* 87 * Necessary sanity check. We needn't check "get-config-addr-info" 88 * and its variant since the old firmware probably support address 89 * of domain/bus/slot/function for EEH RTAS operations. 90 */ 91 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE) { 92 pr_warning("%s: RTAS service <ibm,set-eeh-option> invalid\n", 93 __func__); 94 return -EINVAL; 95 } else if (ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE) { 96 pr_warning("%s: RTAS service <ibm,set-slot-reset> invalid\n", 97 __func__); 98 return -EINVAL; 99 } else if (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE && 100 ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) { 101 pr_warning("%s: RTAS service <ibm,read-slot-reset-state2> and " 102 "<ibm,read-slot-reset-state> invalid\n", 103 __func__); 104 return -EINVAL; 105 } else if (ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE) { 106 pr_warning("%s: RTAS service <ibm,slot-error-detail> invalid\n", 107 __func__); 108 return -EINVAL; 109 } else if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE && 110 ibm_configure_bridge == RTAS_UNKNOWN_SERVICE) { 111 pr_warning("%s: RTAS service <ibm,configure-pe> and " 112 "<ibm,configure-bridge> invalid\n", 113 __func__); 114 return -EINVAL; 115 } 116 117 /* Initialize error log lock and size */ 118 spin_lock_init(&slot_errbuf_lock); 119 eeh_error_buf_size = rtas_token("rtas-error-log-max"); 120 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) { 121 pr_warning("%s: unknown EEH error log size\n", 122 __func__); 123 eeh_error_buf_size = 1024; 124 } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) { 125 pr_warning("%s: EEH error log size %d exceeds the maximal %d\n", 126 __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX); 127 eeh_error_buf_size = RTAS_ERROR_LOG_MAX; 128 } 129 130 /* Set EEH probe mode */ 131 eeh_probe_mode_set(EEH_PROBE_MODE_DEVTREE); 132 133 return 0; 134 } 135 136 static int pseries_eeh_cap_start(struct device_node *dn) 137 { 138 struct pci_dn *pdn = PCI_DN(dn); 139 u32 status; 140 141 if (!pdn) 142 return 0; 143 144 rtas_read_config(pdn, PCI_STATUS, 2, &status); 145 if (!(status & PCI_STATUS_CAP_LIST)) 146 return 0; 147 148 return PCI_CAPABILITY_LIST; 149 } 150 151 152 static int pseries_eeh_find_cap(struct device_node *dn, int cap) 153 { 154 struct pci_dn *pdn = PCI_DN(dn); 155 int pos = pseries_eeh_cap_start(dn); 156 int cnt = 48; /* Maximal number of capabilities */ 157 u32 id; 158 159 if (!pos) 160 return 0; 161 162 while (cnt--) { 163 rtas_read_config(pdn, pos, 1, &pos); 164 if (pos < 0x40) 165 break; 166 pos &= ~3; 167 rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id); 168 if (id == 0xff) 169 break; 170 if (id == cap) 171 return pos; 172 pos += PCI_CAP_LIST_NEXT; 173 } 174 175 return 0; 176 } 177 178 /** 179 * pseries_eeh_of_probe - EEH probe on the given device 180 * @dn: OF node 181 * @flag: Unused 182 * 183 * When EEH module is installed during system boot, all PCI devices 184 * are checked one by one to see if it supports EEH. The function 185 * is introduced for the purpose. 186 */ 187 static void *pseries_eeh_of_probe(struct device_node *dn, void *flag) 188 { 189 struct eeh_dev *edev; 190 struct eeh_pe pe; 191 struct pci_dn *pdn = PCI_DN(dn); 192 const u32 *class_code, *vendor_id, *device_id; 193 const u32 *regs; 194 u32 pcie_flags; 195 int enable = 0; 196 int ret; 197 198 /* Retrieve OF node and eeh device */ 199 edev = of_node_to_eeh_dev(dn); 200 if (edev->pe || !of_device_is_available(dn)) 201 return NULL; 202 203 /* Retrieve class/vendor/device IDs */ 204 class_code = of_get_property(dn, "class-code", NULL); 205 vendor_id = of_get_property(dn, "vendor-id", NULL); 206 device_id = of_get_property(dn, "device-id", NULL); 207 208 /* Skip for bad OF node or PCI-ISA bridge */ 209 if (!class_code || !vendor_id || !device_id) 210 return NULL; 211 if (dn->type && !strcmp(dn->type, "isa")) 212 return NULL; 213 214 /* 215 * Update class code and mode of eeh device. We need 216 * correctly reflects that current device is root port 217 * or PCIe switch downstream port. 218 */ 219 edev->class_code = *class_code; 220 edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP); 221 edev->mode &= 0xFFFFFF00; 222 if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) { 223 edev->mode |= EEH_DEV_BRIDGE; 224 if (edev->pcie_cap) { 225 rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS, 226 2, &pcie_flags); 227 pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4; 228 if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT) 229 edev->mode |= EEH_DEV_ROOT_PORT; 230 else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM) 231 edev->mode |= EEH_DEV_DS_PORT; 232 } 233 } 234 235 /* Retrieve the device address */ 236 regs = of_get_property(dn, "reg", NULL); 237 if (!regs) { 238 pr_warning("%s: OF node property %s::reg not found\n", 239 __func__, dn->full_name); 240 return NULL; 241 } 242 243 /* Initialize the fake PE */ 244 memset(&pe, 0, sizeof(struct eeh_pe)); 245 pe.phb = edev->phb; 246 pe.config_addr = regs[0]; 247 248 /* Enable EEH on the device */ 249 ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE); 250 if (!ret) { 251 edev->config_addr = regs[0]; 252 /* Retrieve PE address */ 253 edev->pe_config_addr = eeh_ops->get_pe_addr(&pe); 254 pe.addr = edev->pe_config_addr; 255 256 /* Some older systems (Power4) allow the ibm,set-eeh-option 257 * call to succeed even on nodes where EEH is not supported. 258 * Verify support explicitly. 259 */ 260 ret = eeh_ops->get_state(&pe, NULL); 261 if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT) 262 enable = 1; 263 264 if (enable) { 265 eeh_subsystem_enabled = 1; 266 eeh_add_to_parent_pe(edev); 267 268 pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n", 269 __func__, dn->full_name, pe.phb->global_number, 270 pe.addr, pe.config_addr); 271 } else if (dn->parent && of_node_to_eeh_dev(dn->parent) && 272 (of_node_to_eeh_dev(dn->parent))->pe) { 273 /* This device doesn't support EEH, but it may have an 274 * EEH parent, in which case we mark it as supported. 275 */ 276 edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr; 277 edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr; 278 eeh_add_to_parent_pe(edev); 279 } 280 } 281 282 /* Save memory bars */ 283 eeh_save_bars(edev); 284 285 return NULL; 286 } 287 288 /** 289 * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable 290 * @pe: EEH PE 291 * @option: operation to be issued 292 * 293 * The function is used to control the EEH functionality globally. 294 * Currently, following options are support according to PAPR: 295 * Enable EEH, Disable EEH, Enable MMIO and Enable DMA 296 */ 297 static int pseries_eeh_set_option(struct eeh_pe *pe, int option) 298 { 299 int ret = 0; 300 int config_addr; 301 302 /* 303 * When we're enabling or disabling EEH functioality on 304 * the particular PE, the PE config address is possibly 305 * unavailable. Therefore, we have to figure it out from 306 * the FDT node. 307 */ 308 switch (option) { 309 case EEH_OPT_DISABLE: 310 case EEH_OPT_ENABLE: 311 case EEH_OPT_THAW_MMIO: 312 case EEH_OPT_THAW_DMA: 313 config_addr = pe->config_addr; 314 if (pe->addr) 315 config_addr = pe->addr; 316 break; 317 318 default: 319 pr_err("%s: Invalid option %d\n", 320 __func__, option); 321 return -EINVAL; 322 } 323 324 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL, 325 config_addr, BUID_HI(pe->phb->buid), 326 BUID_LO(pe->phb->buid), option); 327 328 return ret; 329 } 330 331 /** 332 * pseries_eeh_get_pe_addr - Retrieve PE address 333 * @pe: EEH PE 334 * 335 * Retrieve the assocated PE address. Actually, there're 2 RTAS 336 * function calls dedicated for the purpose. We need implement 337 * it through the new function and then the old one. Besides, 338 * you should make sure the config address is figured out from 339 * FDT node before calling the function. 340 * 341 * It's notable that zero'ed return value means invalid PE config 342 * address. 343 */ 344 static int pseries_eeh_get_pe_addr(struct eeh_pe *pe) 345 { 346 int ret = 0; 347 int rets[3]; 348 349 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) { 350 /* 351 * First of all, we need to make sure there has one PE 352 * associated with the device. Otherwise, PE address is 353 * meaningless. 354 */ 355 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets, 356 pe->config_addr, BUID_HI(pe->phb->buid), 357 BUID_LO(pe->phb->buid), 1); 358 if (ret || (rets[0] == 0)) 359 return 0; 360 361 /* Retrieve the associated PE config address */ 362 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets, 363 pe->config_addr, BUID_HI(pe->phb->buid), 364 BUID_LO(pe->phb->buid), 0); 365 if (ret) { 366 pr_warning("%s: Failed to get address for PHB#%d-PE#%x\n", 367 __func__, pe->phb->global_number, pe->config_addr); 368 return 0; 369 } 370 371 return rets[0]; 372 } 373 374 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) { 375 ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets, 376 pe->config_addr, BUID_HI(pe->phb->buid), 377 BUID_LO(pe->phb->buid), 0); 378 if (ret) { 379 pr_warning("%s: Failed to get address for PHB#%d-PE#%x\n", 380 __func__, pe->phb->global_number, pe->config_addr); 381 return 0; 382 } 383 384 return rets[0]; 385 } 386 387 return ret; 388 } 389 390 /** 391 * pseries_eeh_get_state - Retrieve PE state 392 * @pe: EEH PE 393 * @state: return value 394 * 395 * Retrieve the state of the specified PE. On RTAS compliant 396 * pseries platform, there already has one dedicated RTAS function 397 * for the purpose. It's notable that the associated PE config address 398 * might be ready when calling the function. Therefore, endeavour to 399 * use the PE config address if possible. Further more, there're 2 400 * RTAS calls for the purpose, we need to try the new one and back 401 * to the old one if the new one couldn't work properly. 402 */ 403 static int pseries_eeh_get_state(struct eeh_pe *pe, int *state) 404 { 405 int config_addr; 406 int ret; 407 int rets[4]; 408 int result; 409 410 /* Figure out PE config address if possible */ 411 config_addr = pe->config_addr; 412 if (pe->addr) 413 config_addr = pe->addr; 414 415 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) { 416 ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets, 417 config_addr, BUID_HI(pe->phb->buid), 418 BUID_LO(pe->phb->buid)); 419 } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) { 420 /* Fake PE unavailable info */ 421 rets[2] = 0; 422 ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets, 423 config_addr, BUID_HI(pe->phb->buid), 424 BUID_LO(pe->phb->buid)); 425 } else { 426 return EEH_STATE_NOT_SUPPORT; 427 } 428 429 if (ret) 430 return ret; 431 432 /* Parse the result out */ 433 result = 0; 434 if (rets[1]) { 435 switch(rets[0]) { 436 case 0: 437 result &= ~EEH_STATE_RESET_ACTIVE; 438 result |= EEH_STATE_MMIO_ACTIVE; 439 result |= EEH_STATE_DMA_ACTIVE; 440 break; 441 case 1: 442 result |= EEH_STATE_RESET_ACTIVE; 443 result |= EEH_STATE_MMIO_ACTIVE; 444 result |= EEH_STATE_DMA_ACTIVE; 445 break; 446 case 2: 447 result &= ~EEH_STATE_RESET_ACTIVE; 448 result &= ~EEH_STATE_MMIO_ACTIVE; 449 result &= ~EEH_STATE_DMA_ACTIVE; 450 break; 451 case 4: 452 result &= ~EEH_STATE_RESET_ACTIVE; 453 result &= ~EEH_STATE_MMIO_ACTIVE; 454 result &= ~EEH_STATE_DMA_ACTIVE; 455 result |= EEH_STATE_MMIO_ENABLED; 456 break; 457 case 5: 458 if (rets[2]) { 459 if (state) *state = rets[2]; 460 result = EEH_STATE_UNAVAILABLE; 461 } else { 462 result = EEH_STATE_NOT_SUPPORT; 463 } 464 default: 465 result = EEH_STATE_NOT_SUPPORT; 466 } 467 } else { 468 result = EEH_STATE_NOT_SUPPORT; 469 } 470 471 return result; 472 } 473 474 /** 475 * pseries_eeh_reset - Reset the specified PE 476 * @pe: EEH PE 477 * @option: reset option 478 * 479 * Reset the specified PE 480 */ 481 static int pseries_eeh_reset(struct eeh_pe *pe, int option) 482 { 483 int config_addr; 484 int ret; 485 486 /* Figure out PE address */ 487 config_addr = pe->config_addr; 488 if (pe->addr) 489 config_addr = pe->addr; 490 491 /* Reset PE through RTAS call */ 492 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL, 493 config_addr, BUID_HI(pe->phb->buid), 494 BUID_LO(pe->phb->buid), option); 495 496 /* If fundamental-reset not supported, try hot-reset */ 497 if (option == EEH_RESET_FUNDAMENTAL && 498 ret == -8) { 499 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL, 500 config_addr, BUID_HI(pe->phb->buid), 501 BUID_LO(pe->phb->buid), EEH_RESET_HOT); 502 } 503 504 return ret; 505 } 506 507 /** 508 * pseries_eeh_wait_state - Wait for PE state 509 * @pe: EEH PE 510 * @max_wait: maximal period in microsecond 511 * 512 * Wait for the state of associated PE. It might take some time 513 * to retrieve the PE's state. 514 */ 515 static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait) 516 { 517 int ret; 518 int mwait; 519 520 /* 521 * According to PAPR, the state of PE might be temporarily 522 * unavailable. Under the circumstance, we have to wait 523 * for indicated time determined by firmware. The maximal 524 * wait time is 5 minutes, which is acquired from the original 525 * EEH implementation. Also, the original implementation 526 * also defined the minimal wait time as 1 second. 527 */ 528 #define EEH_STATE_MIN_WAIT_TIME (1000) 529 #define EEH_STATE_MAX_WAIT_TIME (300 * 1000) 530 531 while (1) { 532 ret = pseries_eeh_get_state(pe, &mwait); 533 534 /* 535 * If the PE's state is temporarily unavailable, 536 * we have to wait for the specified time. Otherwise, 537 * the PE's state will be returned immediately. 538 */ 539 if (ret != EEH_STATE_UNAVAILABLE) 540 return ret; 541 542 if (max_wait <= 0) { 543 pr_warning("%s: Timeout when getting PE's state (%d)\n", 544 __func__, max_wait); 545 return EEH_STATE_NOT_SUPPORT; 546 } 547 548 if (mwait <= 0) { 549 pr_warning("%s: Firmware returned bad wait value %d\n", 550 __func__, mwait); 551 mwait = EEH_STATE_MIN_WAIT_TIME; 552 } else if (mwait > EEH_STATE_MAX_WAIT_TIME) { 553 pr_warning("%s: Firmware returned too long wait value %d\n", 554 __func__, mwait); 555 mwait = EEH_STATE_MAX_WAIT_TIME; 556 } 557 558 max_wait -= mwait; 559 msleep(mwait); 560 } 561 562 return EEH_STATE_NOT_SUPPORT; 563 } 564 565 /** 566 * pseries_eeh_get_log - Retrieve error log 567 * @pe: EEH PE 568 * @severity: temporary or permanent error log 569 * @drv_log: driver log to be combined with retrieved error log 570 * @len: length of driver log 571 * 572 * Retrieve the temporary or permanent error from the PE. 573 * Actually, the error will be retrieved through the dedicated 574 * RTAS call. 575 */ 576 static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len) 577 { 578 int config_addr; 579 unsigned long flags; 580 int ret; 581 582 spin_lock_irqsave(&slot_errbuf_lock, flags); 583 memset(slot_errbuf, 0, eeh_error_buf_size); 584 585 /* Figure out the PE address */ 586 config_addr = pe->config_addr; 587 if (pe->addr) 588 config_addr = pe->addr; 589 590 ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr, 591 BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid), 592 virt_to_phys(drv_log), len, 593 virt_to_phys(slot_errbuf), eeh_error_buf_size, 594 severity); 595 if (!ret) 596 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0); 597 spin_unlock_irqrestore(&slot_errbuf_lock, flags); 598 599 return ret; 600 } 601 602 /** 603 * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE 604 * @pe: EEH PE 605 * 606 * The function will be called to reconfigure the bridges included 607 * in the specified PE so that the mulfunctional PE would be recovered 608 * again. 609 */ 610 static int pseries_eeh_configure_bridge(struct eeh_pe *pe) 611 { 612 int config_addr; 613 int ret; 614 615 /* Figure out the PE address */ 616 config_addr = pe->config_addr; 617 if (pe->addr) 618 config_addr = pe->addr; 619 620 /* Use new configure-pe function, if supported */ 621 if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) { 622 ret = rtas_call(ibm_configure_pe, 3, 1, NULL, 623 config_addr, BUID_HI(pe->phb->buid), 624 BUID_LO(pe->phb->buid)); 625 } else if (ibm_configure_bridge != RTAS_UNKNOWN_SERVICE) { 626 ret = rtas_call(ibm_configure_bridge, 3, 1, NULL, 627 config_addr, BUID_HI(pe->phb->buid), 628 BUID_LO(pe->phb->buid)); 629 } else { 630 return -EFAULT; 631 } 632 633 if (ret) 634 pr_warning("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n", 635 __func__, pe->phb->global_number, pe->addr, ret); 636 637 return ret; 638 } 639 640 /** 641 * pseries_eeh_read_config - Read PCI config space 642 * @dn: device node 643 * @where: PCI address 644 * @size: size to read 645 * @val: return value 646 * 647 * Read config space from the speicifed device 648 */ 649 static int pseries_eeh_read_config(struct device_node *dn, int where, int size, u32 *val) 650 { 651 struct pci_dn *pdn; 652 653 pdn = PCI_DN(dn); 654 655 return rtas_read_config(pdn, where, size, val); 656 } 657 658 /** 659 * pseries_eeh_write_config - Write PCI config space 660 * @dn: device node 661 * @where: PCI address 662 * @size: size to write 663 * @val: value to be written 664 * 665 * Write config space to the specified device 666 */ 667 static int pseries_eeh_write_config(struct device_node *dn, int where, int size, u32 val) 668 { 669 struct pci_dn *pdn; 670 671 pdn = PCI_DN(dn); 672 673 return rtas_write_config(pdn, where, size, val); 674 } 675 676 static struct eeh_ops pseries_eeh_ops = { 677 .name = "pseries", 678 .init = pseries_eeh_init, 679 .of_probe = pseries_eeh_of_probe, 680 .dev_probe = NULL, 681 .set_option = pseries_eeh_set_option, 682 .get_pe_addr = pseries_eeh_get_pe_addr, 683 .get_state = pseries_eeh_get_state, 684 .reset = pseries_eeh_reset, 685 .wait_state = pseries_eeh_wait_state, 686 .get_log = pseries_eeh_get_log, 687 .configure_bridge = pseries_eeh_configure_bridge, 688 .read_config = pseries_eeh_read_config, 689 .write_config = pseries_eeh_write_config 690 }; 691 692 /** 693 * eeh_pseries_init - Register platform dependent EEH operations 694 * 695 * EEH initialization on pseries platform. This function should be 696 * called before any EEH related functions. 697 */ 698 static int __init eeh_pseries_init(void) 699 { 700 int ret = -EINVAL; 701 702 if (!machine_is(pseries)) 703 return ret; 704 705 ret = eeh_ops_register(&pseries_eeh_ops); 706 if (!ret) 707 pr_info("EEH: pSeries platform initialized\n"); 708 else 709 pr_info("EEH: pSeries platform initialization failure (%d)\n", 710 ret); 711 712 return ret; 713 } 714 715 early_initcall(eeh_pseries_init); 716