1 /*
2  * The file intends to implement the platform dependent EEH operations on pseries.
3  * Actually, the pseries platform is built based on RTAS heavily. That means the
4  * pseries platform dependent EEH operations will be built on RTAS calls. The functions
5  * are devired from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
6  * been done.
7  *
8  * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
9  * Copyright IBM Corporation 2001, 2005, 2006
10  * Copyright Dave Engebretsen & Todd Inglett 2001
11  * Copyright Linas Vepstas 2005, 2006
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
26  */
27 
28 #include <linux/atomic.h>
29 #include <linux/delay.h>
30 #include <linux/export.h>
31 #include <linux/init.h>
32 #include <linux/list.h>
33 #include <linux/of.h>
34 #include <linux/pci.h>
35 #include <linux/proc_fs.h>
36 #include <linux/rbtree.h>
37 #include <linux/sched.h>
38 #include <linux/seq_file.h>
39 #include <linux/spinlock.h>
40 
41 #include <asm/eeh.h>
42 #include <asm/eeh_event.h>
43 #include <asm/io.h>
44 #include <asm/machdep.h>
45 #include <asm/ppc-pci.h>
46 #include <asm/rtas.h>
47 
48 /* RTAS tokens */
49 static int ibm_set_eeh_option;
50 static int ibm_set_slot_reset;
51 static int ibm_read_slot_reset_state;
52 static int ibm_read_slot_reset_state2;
53 static int ibm_slot_error_detail;
54 static int ibm_get_config_addr_info;
55 static int ibm_get_config_addr_info2;
56 static int ibm_configure_bridge;
57 static int ibm_configure_pe;
58 
59 /*
60  * Buffer for reporting slot-error-detail rtas calls. Its here
61  * in BSS, and not dynamically alloced, so that it ends up in
62  * RMO where RTAS can access it.
63  */
64 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
65 static DEFINE_SPINLOCK(slot_errbuf_lock);
66 static int eeh_error_buf_size;
67 
68 /**
69  * pseries_eeh_init - EEH platform dependent initialization
70  *
71  * EEH platform dependent initialization on pseries.
72  */
73 static int pseries_eeh_init(void)
74 {
75 	/* figure out EEH RTAS function call tokens */
76 	ibm_set_eeh_option		= rtas_token("ibm,set-eeh-option");
77 	ibm_set_slot_reset		= rtas_token("ibm,set-slot-reset");
78 	ibm_read_slot_reset_state2	= rtas_token("ibm,read-slot-reset-state2");
79 	ibm_read_slot_reset_state	= rtas_token("ibm,read-slot-reset-state");
80 	ibm_slot_error_detail		= rtas_token("ibm,slot-error-detail");
81 	ibm_get_config_addr_info2	= rtas_token("ibm,get-config-addr-info2");
82 	ibm_get_config_addr_info	= rtas_token("ibm,get-config-addr-info");
83 	ibm_configure_pe		= rtas_token("ibm,configure-pe");
84 	ibm_configure_bridge		= rtas_token("ibm,configure-bridge");
85 
86 	/*
87 	 * Necessary sanity check. We needn't check "get-config-addr-info"
88 	 * and its variant since the old firmware probably support address
89 	 * of domain/bus/slot/function for EEH RTAS operations.
90 	 */
91 	if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE		||
92 	    ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE		||
93 	    (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
94 	     ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE)	||
95 	    ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE	||
96 	    (ibm_configure_pe == RTAS_UNKNOWN_SERVICE		&&
97 	     ibm_configure_bridge == RTAS_UNKNOWN_SERVICE)) {
98 		pr_info("EEH functionality not supported\n");
99 		return -EINVAL;
100 	}
101 
102 	/* Initialize error log lock and size */
103 	spin_lock_init(&slot_errbuf_lock);
104 	eeh_error_buf_size = rtas_token("rtas-error-log-max");
105 	if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
106 		pr_info("%s: unknown EEH error log size\n",
107 			__func__);
108 		eeh_error_buf_size = 1024;
109 	} else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
110 		pr_info("%s: EEH error log size %d exceeds the maximal %d\n",
111 			__func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
112 		eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
113 	}
114 
115 	/* Set EEH probe mode */
116 	eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG);
117 
118 	return 0;
119 }
120 
121 static int pseries_eeh_cap_start(struct device_node *dn)
122 {
123 	struct pci_dn *pdn = PCI_DN(dn);
124 	u32 status;
125 
126 	if (!pdn)
127 		return 0;
128 
129 	rtas_read_config(pdn, PCI_STATUS, 2, &status);
130 	if (!(status & PCI_STATUS_CAP_LIST))
131 		return 0;
132 
133 	return PCI_CAPABILITY_LIST;
134 }
135 
136 
137 static int pseries_eeh_find_cap(struct device_node *dn, int cap)
138 {
139 	struct pci_dn *pdn = PCI_DN(dn);
140 	int pos = pseries_eeh_cap_start(dn);
141 	int cnt = 48;	/* Maximal number of capabilities */
142 	u32 id;
143 
144 	if (!pos)
145 		return 0;
146 
147         while (cnt--) {
148 		rtas_read_config(pdn, pos, 1, &pos);
149 		if (pos < 0x40)
150 			break;
151 		pos &= ~3;
152 		rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
153 		if (id == 0xff)
154 			break;
155 		if (id == cap)
156 			return pos;
157 		pos += PCI_CAP_LIST_NEXT;
158 	}
159 
160 	return 0;
161 }
162 
163 static int pseries_eeh_find_ecap(struct device_node *dn, int cap)
164 {
165 	struct pci_dn *pdn = PCI_DN(dn);
166 	struct eeh_dev *edev = of_node_to_eeh_dev(dn);
167 	u32 header;
168 	int pos = 256;
169 	int ttl = (4096 - 256) / 8;
170 
171 	if (!edev || !edev->pcie_cap)
172 		return 0;
173 	if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
174 		return 0;
175 	else if (!header)
176 		return 0;
177 
178 	while (ttl-- > 0) {
179 		if (PCI_EXT_CAP_ID(header) == cap && pos)
180 			return pos;
181 
182 		pos = PCI_EXT_CAP_NEXT(header);
183 		if (pos < 256)
184 			break;
185 
186 		if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
187 			break;
188 	}
189 
190 	return 0;
191 }
192 
193 /**
194  * pseries_eeh_of_probe - EEH probe on the given device
195  * @dn: OF node
196  * @flag: Unused
197  *
198  * When EEH module is installed during system boot, all PCI devices
199  * are checked one by one to see if it supports EEH. The function
200  * is introduced for the purpose.
201  */
202 static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
203 {
204 	struct eeh_dev *edev;
205 	struct eeh_pe pe;
206 	struct pci_dn *pdn = PCI_DN(dn);
207 	const __be32 *classp, *vendorp, *devicep;
208 	u32 class_code;
209 	const __be32 *regs;
210 	u32 pcie_flags;
211 	int enable = 0;
212 	int ret;
213 
214 	/* Retrieve OF node and eeh device */
215 	edev = of_node_to_eeh_dev(dn);
216 	if (edev->pe || !of_device_is_available(dn))
217 		return NULL;
218 
219 	/* Retrieve class/vendor/device IDs */
220 	classp = of_get_property(dn, "class-code", NULL);
221 	vendorp = of_get_property(dn, "vendor-id", NULL);
222 	devicep = of_get_property(dn, "device-id", NULL);
223 
224 	/* Skip for bad OF node or PCI-ISA bridge */
225 	if (!classp || !vendorp || !devicep)
226 		return NULL;
227 	if (dn->type && !strcmp(dn->type, "isa"))
228 		return NULL;
229 
230 	class_code = of_read_number(classp, 1);
231 
232 	/*
233 	 * Update class code and mode of eeh device. We need
234 	 * correctly reflects that current device is root port
235 	 * or PCIe switch downstream port.
236 	 */
237 	edev->class_code = class_code;
238 	edev->pcix_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_PCIX);
239 	edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP);
240 	edev->aer_cap = pseries_eeh_find_ecap(dn, PCI_EXT_CAP_ID_ERR);
241 	edev->mode &= 0xFFFFFF00;
242 	if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
243 		edev->mode |= EEH_DEV_BRIDGE;
244 		if (edev->pcie_cap) {
245 			rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
246 					 2, &pcie_flags);
247 			pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
248 			if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
249 				edev->mode |= EEH_DEV_ROOT_PORT;
250 			else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
251 				edev->mode |= EEH_DEV_DS_PORT;
252 		}
253 	}
254 
255 	/* Retrieve the device address */
256 	regs = of_get_property(dn, "reg", NULL);
257 	if (!regs) {
258 		pr_warn("%s: OF node property %s::reg not found\n",
259 			__func__, dn->full_name);
260 		return NULL;
261 	}
262 
263 	/* Initialize the fake PE */
264 	memset(&pe, 0, sizeof(struct eeh_pe));
265 	pe.phb = edev->phb;
266 	pe.config_addr = of_read_number(regs, 1);
267 
268 	/* Enable EEH on the device */
269 	ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
270 	if (!ret) {
271 		edev->config_addr = of_read_number(regs, 1);
272 		/* Retrieve PE address */
273 		edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
274 		pe.addr = edev->pe_config_addr;
275 
276 		/* Some older systems (Power4) allow the ibm,set-eeh-option
277 		 * call to succeed even on nodes where EEH is not supported.
278 		 * Verify support explicitly.
279 		 */
280 		ret = eeh_ops->get_state(&pe, NULL);
281 		if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
282 			enable = 1;
283 
284 		if (enable) {
285 			eeh_add_flag(EEH_ENABLED);
286 			eeh_add_to_parent_pe(edev);
287 
288 			pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n",
289 				__func__, dn->full_name, pe.phb->global_number,
290 				pe.addr, pe.config_addr);
291 		} else if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
292 			   (of_node_to_eeh_dev(dn->parent))->pe) {
293 			/* This device doesn't support EEH, but it may have an
294 			 * EEH parent, in which case we mark it as supported.
295 			 */
296 			edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
297 			edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
298 			eeh_add_to_parent_pe(edev);
299 		}
300 	}
301 
302 	/* Save memory bars */
303 	eeh_save_bars(edev);
304 
305 	return NULL;
306 }
307 
308 /**
309  * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
310  * @pe: EEH PE
311  * @option: operation to be issued
312  *
313  * The function is used to control the EEH functionality globally.
314  * Currently, following options are support according to PAPR:
315  * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
316  */
317 static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
318 {
319 	int ret = 0;
320 	int config_addr;
321 
322 	/*
323 	 * When we're enabling or disabling EEH functioality on
324 	 * the particular PE, the PE config address is possibly
325 	 * unavailable. Therefore, we have to figure it out from
326 	 * the FDT node.
327 	 */
328 	switch (option) {
329 	case EEH_OPT_DISABLE:
330 	case EEH_OPT_ENABLE:
331 	case EEH_OPT_THAW_MMIO:
332 	case EEH_OPT_THAW_DMA:
333 		config_addr = pe->config_addr;
334 		if (pe->addr)
335 			config_addr = pe->addr;
336 		break;
337 	case EEH_OPT_FREEZE_PE:
338 		/* Not support */
339 		return 0;
340 	default:
341 		pr_err("%s: Invalid option %d\n",
342 			__func__, option);
343 		return -EINVAL;
344 	}
345 
346 	ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
347 			config_addr, BUID_HI(pe->phb->buid),
348 			BUID_LO(pe->phb->buid), option);
349 
350 	return ret;
351 }
352 
353 /**
354  * pseries_eeh_get_pe_addr - Retrieve PE address
355  * @pe: EEH PE
356  *
357  * Retrieve the assocated PE address. Actually, there're 2 RTAS
358  * function calls dedicated for the purpose. We need implement
359  * it through the new function and then the old one. Besides,
360  * you should make sure the config address is figured out from
361  * FDT node before calling the function.
362  *
363  * It's notable that zero'ed return value means invalid PE config
364  * address.
365  */
366 static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
367 {
368 	int ret = 0;
369 	int rets[3];
370 
371 	if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
372 		/*
373 		 * First of all, we need to make sure there has one PE
374 		 * associated with the device. Otherwise, PE address is
375 		 * meaningless.
376 		 */
377 		ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
378 				pe->config_addr, BUID_HI(pe->phb->buid),
379 				BUID_LO(pe->phb->buid), 1);
380 		if (ret || (rets[0] == 0))
381 			return 0;
382 
383 		/* Retrieve the associated PE config address */
384 		ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
385 				pe->config_addr, BUID_HI(pe->phb->buid),
386 				BUID_LO(pe->phb->buid), 0);
387 		if (ret) {
388 			pr_warn("%s: Failed to get address for PHB#%d-PE#%x\n",
389 				__func__, pe->phb->global_number, pe->config_addr);
390 			return 0;
391 		}
392 
393 		return rets[0];
394 	}
395 
396 	if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
397 		ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
398 				pe->config_addr, BUID_HI(pe->phb->buid),
399 				BUID_LO(pe->phb->buid), 0);
400 		if (ret) {
401 			pr_warn("%s: Failed to get address for PHB#%d-PE#%x\n",
402 				__func__, pe->phb->global_number, pe->config_addr);
403 			return 0;
404 		}
405 
406 		return rets[0];
407 	}
408 
409 	return ret;
410 }
411 
412 /**
413  * pseries_eeh_get_state - Retrieve PE state
414  * @pe: EEH PE
415  * @state: return value
416  *
417  * Retrieve the state of the specified PE. On RTAS compliant
418  * pseries platform, there already has one dedicated RTAS function
419  * for the purpose. It's notable that the associated PE config address
420  * might be ready when calling the function. Therefore, endeavour to
421  * use the PE config address if possible. Further more, there're 2
422  * RTAS calls for the purpose, we need to try the new one and back
423  * to the old one if the new one couldn't work properly.
424  */
425 static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
426 {
427 	int config_addr;
428 	int ret;
429 	int rets[4];
430 	int result;
431 
432 	/* Figure out PE config address if possible */
433 	config_addr = pe->config_addr;
434 	if (pe->addr)
435 		config_addr = pe->addr;
436 
437 	if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
438 		ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
439 				config_addr, BUID_HI(pe->phb->buid),
440 				BUID_LO(pe->phb->buid));
441 	} else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
442 		/* Fake PE unavailable info */
443 		rets[2] = 0;
444 		ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
445 				config_addr, BUID_HI(pe->phb->buid),
446 				BUID_LO(pe->phb->buid));
447 	} else {
448 		return EEH_STATE_NOT_SUPPORT;
449 	}
450 
451 	if (ret)
452 		return ret;
453 
454 	/* Parse the result out */
455 	result = 0;
456 	if (rets[1]) {
457 		switch(rets[0]) {
458 		case 0:
459 			result &= ~EEH_STATE_RESET_ACTIVE;
460 			result |= EEH_STATE_MMIO_ACTIVE;
461 			result |= EEH_STATE_DMA_ACTIVE;
462 			break;
463 		case 1:
464 			result |= EEH_STATE_RESET_ACTIVE;
465 			result |= EEH_STATE_MMIO_ACTIVE;
466 			result |= EEH_STATE_DMA_ACTIVE;
467 			break;
468 		case 2:
469 			result &= ~EEH_STATE_RESET_ACTIVE;
470 			result &= ~EEH_STATE_MMIO_ACTIVE;
471 			result &= ~EEH_STATE_DMA_ACTIVE;
472 			break;
473 		case 4:
474 			result &= ~EEH_STATE_RESET_ACTIVE;
475 			result &= ~EEH_STATE_MMIO_ACTIVE;
476 			result &= ~EEH_STATE_DMA_ACTIVE;
477 			result |= EEH_STATE_MMIO_ENABLED;
478 			break;
479 		case 5:
480 			if (rets[2]) {
481 				if (state) *state = rets[2];
482 				result = EEH_STATE_UNAVAILABLE;
483 			} else {
484 				result = EEH_STATE_NOT_SUPPORT;
485 			}
486 			break;
487 		default:
488 			result = EEH_STATE_NOT_SUPPORT;
489 		}
490 	} else {
491 		result = EEH_STATE_NOT_SUPPORT;
492 	}
493 
494 	return result;
495 }
496 
497 /**
498  * pseries_eeh_reset - Reset the specified PE
499  * @pe: EEH PE
500  * @option: reset option
501  *
502  * Reset the specified PE
503  */
504 static int pseries_eeh_reset(struct eeh_pe *pe, int option)
505 {
506 	int config_addr;
507 	int ret;
508 
509 	/* Figure out PE address */
510 	config_addr = pe->config_addr;
511 	if (pe->addr)
512 		config_addr = pe->addr;
513 
514 	/* Reset PE through RTAS call */
515 	ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
516 			config_addr, BUID_HI(pe->phb->buid),
517 			BUID_LO(pe->phb->buid), option);
518 
519 	/* If fundamental-reset not supported, try hot-reset */
520 	if (option == EEH_RESET_FUNDAMENTAL &&
521 	    ret == -8) {
522 		option = EEH_RESET_HOT;
523 		ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
524 				config_addr, BUID_HI(pe->phb->buid),
525 				BUID_LO(pe->phb->buid), option);
526 	}
527 
528 	/* We need reset hold or settlement delay */
529 	if (option == EEH_RESET_FUNDAMENTAL ||
530 	    option == EEH_RESET_HOT)
531 		msleep(EEH_PE_RST_HOLD_TIME);
532 	else
533 		msleep(EEH_PE_RST_SETTLE_TIME);
534 
535 	return ret;
536 }
537 
538 /**
539  * pseries_eeh_wait_state - Wait for PE state
540  * @pe: EEH PE
541  * @max_wait: maximal period in microsecond
542  *
543  * Wait for the state of associated PE. It might take some time
544  * to retrieve the PE's state.
545  */
546 static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait)
547 {
548 	int ret;
549 	int mwait;
550 
551 	/*
552 	 * According to PAPR, the state of PE might be temporarily
553 	 * unavailable. Under the circumstance, we have to wait
554 	 * for indicated time determined by firmware. The maximal
555 	 * wait time is 5 minutes, which is acquired from the original
556 	 * EEH implementation. Also, the original implementation
557 	 * also defined the minimal wait time as 1 second.
558 	 */
559 #define EEH_STATE_MIN_WAIT_TIME	(1000)
560 #define EEH_STATE_MAX_WAIT_TIME	(300 * 1000)
561 
562 	while (1) {
563 		ret = pseries_eeh_get_state(pe, &mwait);
564 
565 		/*
566 		 * If the PE's state is temporarily unavailable,
567 		 * we have to wait for the specified time. Otherwise,
568 		 * the PE's state will be returned immediately.
569 		 */
570 		if (ret != EEH_STATE_UNAVAILABLE)
571 			return ret;
572 
573 		if (max_wait <= 0) {
574 			pr_warn("%s: Timeout when getting PE's state (%d)\n",
575 				__func__, max_wait);
576 			return EEH_STATE_NOT_SUPPORT;
577 		}
578 
579 		if (mwait <= 0) {
580 			pr_warn("%s: Firmware returned bad wait value %d\n",
581 				__func__, mwait);
582 			mwait = EEH_STATE_MIN_WAIT_TIME;
583 		} else if (mwait > EEH_STATE_MAX_WAIT_TIME) {
584 			pr_warn("%s: Firmware returned too long wait value %d\n",
585 				__func__, mwait);
586 			mwait = EEH_STATE_MAX_WAIT_TIME;
587 		}
588 
589 		max_wait -= mwait;
590 		msleep(mwait);
591 	}
592 
593 	return EEH_STATE_NOT_SUPPORT;
594 }
595 
596 /**
597  * pseries_eeh_get_log - Retrieve error log
598  * @pe: EEH PE
599  * @severity: temporary or permanent error log
600  * @drv_log: driver log to be combined with retrieved error log
601  * @len: length of driver log
602  *
603  * Retrieve the temporary or permanent error from the PE.
604  * Actually, the error will be retrieved through the dedicated
605  * RTAS call.
606  */
607 static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
608 {
609 	int config_addr;
610 	unsigned long flags;
611 	int ret;
612 
613 	spin_lock_irqsave(&slot_errbuf_lock, flags);
614 	memset(slot_errbuf, 0, eeh_error_buf_size);
615 
616 	/* Figure out the PE address */
617 	config_addr = pe->config_addr;
618 	if (pe->addr)
619 		config_addr = pe->addr;
620 
621 	ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
622 			BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
623 			virt_to_phys(drv_log), len,
624 			virt_to_phys(slot_errbuf), eeh_error_buf_size,
625 			severity);
626 	if (!ret)
627 		log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
628 	spin_unlock_irqrestore(&slot_errbuf_lock, flags);
629 
630 	return ret;
631 }
632 
633 /**
634  * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
635  * @pe: EEH PE
636  *
637  * The function will be called to reconfigure the bridges included
638  * in the specified PE so that the mulfunctional PE would be recovered
639  * again.
640  */
641 static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
642 {
643 	int config_addr;
644 	int ret;
645 
646 	/* Figure out the PE address */
647 	config_addr = pe->config_addr;
648 	if (pe->addr)
649 		config_addr = pe->addr;
650 
651 	/* Use new configure-pe function, if supported */
652 	if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) {
653 		ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
654 				config_addr, BUID_HI(pe->phb->buid),
655 				BUID_LO(pe->phb->buid));
656 	} else if (ibm_configure_bridge != RTAS_UNKNOWN_SERVICE) {
657 		ret = rtas_call(ibm_configure_bridge, 3, 1, NULL,
658 				config_addr, BUID_HI(pe->phb->buid),
659 				BUID_LO(pe->phb->buid));
660 	} else {
661 		return -EFAULT;
662 	}
663 
664 	if (ret)
665 		pr_warn("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",
666 			__func__, pe->phb->global_number, pe->addr, ret);
667 
668 	return ret;
669 }
670 
671 /**
672  * pseries_eeh_read_config - Read PCI config space
673  * @dn: device node
674  * @where: PCI address
675  * @size: size to read
676  * @val: return value
677  *
678  * Read config space from the speicifed device
679  */
680 static int pseries_eeh_read_config(struct device_node *dn, int where, int size, u32 *val)
681 {
682 	struct pci_dn *pdn;
683 
684 	pdn = PCI_DN(dn);
685 
686 	return rtas_read_config(pdn, where, size, val);
687 }
688 
689 /**
690  * pseries_eeh_write_config - Write PCI config space
691  * @dn: device node
692  * @where: PCI address
693  * @size: size to write
694  * @val: value to be written
695  *
696  * Write config space to the specified device
697  */
698 static int pseries_eeh_write_config(struct device_node *dn, int where, int size, u32 val)
699 {
700 	struct pci_dn *pdn;
701 
702 	pdn = PCI_DN(dn);
703 
704 	return rtas_write_config(pdn, where, size, val);
705 }
706 
707 static struct eeh_ops pseries_eeh_ops = {
708 	.name			= "pseries",
709 	.init			= pseries_eeh_init,
710 	.of_probe		= pseries_eeh_of_probe,
711 	.dev_probe		= NULL,
712 	.set_option		= pseries_eeh_set_option,
713 	.get_pe_addr		= pseries_eeh_get_pe_addr,
714 	.get_state		= pseries_eeh_get_state,
715 	.reset			= pseries_eeh_reset,
716 	.wait_state		= pseries_eeh_wait_state,
717 	.get_log		= pseries_eeh_get_log,
718 	.configure_bridge       = pseries_eeh_configure_bridge,
719 	.err_inject		= NULL,
720 	.read_config		= pseries_eeh_read_config,
721 	.write_config		= pseries_eeh_write_config,
722 	.next_error		= NULL,
723 	.restore_config		= NULL
724 };
725 
726 /**
727  * eeh_pseries_init - Register platform dependent EEH operations
728  *
729  * EEH initialization on pseries platform. This function should be
730  * called before any EEH related functions.
731  */
732 static int __init eeh_pseries_init(void)
733 {
734 	int ret;
735 
736 	ret = eeh_ops_register(&pseries_eeh_ops);
737 	if (!ret)
738 		pr_info("EEH: pSeries platform initialized\n");
739 	else
740 		pr_info("EEH: pSeries platform initialization failure (%d)\n",
741 			ret);
742 
743 	return ret;
744 }
745 machine_early_initcall(pseries, eeh_pseries_init);
746