1 /*
2  * PowerNV setup code.
3  *
4  * Copyright 2011 IBM Corp.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 
12 #undef DEBUG
13 
14 #include <linux/cpu.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/kernel.h>
18 #include <linux/tty.h>
19 #include <linux/reboot.h>
20 #include <linux/init.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/irq.h>
24 #include <linux/seq_file.h>
25 #include <linux/of.h>
26 #include <linux/of_fdt.h>
27 #include <linux/interrupt.h>
28 #include <linux/bug.h>
29 #include <linux/pci.h>
30 #include <linux/cpufreq.h>
31 
32 #include <asm/machdep.h>
33 #include <asm/firmware.h>
34 #include <asm/xics.h>
35 #include <asm/xive.h>
36 #include <asm/opal.h>
37 #include <asm/kexec.h>
38 #include <asm/smp.h>
39 
40 #include "powernv.h"
41 
42 static void __init pnv_setup_arch(void)
43 {
44 	set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
45 
46 	/* Initialize SMP */
47 	pnv_smp_init();
48 
49 	/* Setup PCI */
50 	pnv_pci_init();
51 
52 	/* Setup RTC and NVRAM callbacks */
53 	if (firmware_has_feature(FW_FEATURE_OPAL))
54 		opal_nvram_init();
55 
56 	/* Enable NAP mode */
57 	powersave_nap = 1;
58 
59 	/* XXX PMCS */
60 }
61 
62 static void __init pnv_init(void)
63 {
64 	/*
65 	 * Initialize the LPC bus now so that legacy serial
66 	 * ports can be found on it
67 	 */
68 	opal_lpc_init();
69 
70 #ifdef CONFIG_HVC_OPAL
71 	if (firmware_has_feature(FW_FEATURE_OPAL))
72 		hvc_opal_init_early();
73 	else
74 #endif
75 		add_preferred_console("hvc", 0, NULL);
76 }
77 
78 static void __init pnv_init_IRQ(void)
79 {
80 	/* Try using a XIVE if available, otherwise use a XICS */
81 	if (!xive_native_init())
82 		xics_init();
83 
84 	WARN_ON(!ppc_md.get_irq);
85 }
86 
87 static void pnv_show_cpuinfo(struct seq_file *m)
88 {
89 	struct device_node *root;
90 	const char *model = "";
91 
92 	root = of_find_node_by_path("/");
93 	if (root)
94 		model = of_get_property(root, "model", NULL);
95 	seq_printf(m, "machine\t\t: PowerNV %s\n", model);
96 	if (firmware_has_feature(FW_FEATURE_OPAL))
97 		seq_printf(m, "firmware\t: OPAL\n");
98 	else
99 		seq_printf(m, "firmware\t: BML\n");
100 	of_node_put(root);
101 	if (radix_enabled())
102 		seq_printf(m, "MMU\t\t: Radix\n");
103 	else
104 		seq_printf(m, "MMU\t\t: Hash\n");
105 }
106 
107 static void pnv_prepare_going_down(void)
108 {
109 	/*
110 	 * Disable all notifiers from OPAL, we can't
111 	 * service interrupts anymore anyway
112 	 */
113 	opal_event_shutdown();
114 
115 	/* Soft disable interrupts */
116 	local_irq_disable();
117 
118 	/*
119 	 * Return secondary CPUs to firwmare if a flash update
120 	 * is pending otherwise we will get all sort of error
121 	 * messages about CPU being stuck etc.. This will also
122 	 * have the side effect of hard disabling interrupts so
123 	 * past this point, the kernel is effectively dead.
124 	 */
125 	opal_flash_term_callback();
126 }
127 
128 static void  __noreturn pnv_restart(char *cmd)
129 {
130 	long rc = OPAL_BUSY;
131 
132 	pnv_prepare_going_down();
133 
134 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
135 		rc = opal_cec_reboot();
136 		if (rc == OPAL_BUSY_EVENT)
137 			opal_poll_events(NULL);
138 		else
139 			mdelay(10);
140 	}
141 	for (;;)
142 		opal_poll_events(NULL);
143 }
144 
145 static void __noreturn pnv_power_off(void)
146 {
147 	long rc = OPAL_BUSY;
148 
149 	pnv_prepare_going_down();
150 
151 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
152 		rc = opal_cec_power_down(0);
153 		if (rc == OPAL_BUSY_EVENT)
154 			opal_poll_events(NULL);
155 		else
156 			mdelay(10);
157 	}
158 	for (;;)
159 		opal_poll_events(NULL);
160 }
161 
162 static void __noreturn pnv_halt(void)
163 {
164 	pnv_power_off();
165 }
166 
167 static void pnv_progress(char *s, unsigned short hex)
168 {
169 }
170 
171 static void pnv_shutdown(void)
172 {
173 	/* Let the PCI code clear up IODA tables */
174 	pnv_pci_shutdown();
175 
176 	/*
177 	 * Stop OPAL activity: Unregister all OPAL interrupts so they
178 	 * don't fire up while we kexec and make sure all potentially
179 	 * DMA'ing ops are complete (such as dump retrieval).
180 	 */
181 	opal_shutdown();
182 }
183 
184 #ifdef CONFIG_KEXEC_CORE
185 static void pnv_kexec_wait_secondaries_down(void)
186 {
187 	int my_cpu, i, notified = -1;
188 
189 	my_cpu = get_cpu();
190 
191 	for_each_online_cpu(i) {
192 		uint8_t status;
193 		int64_t rc, timeout = 1000;
194 
195 		if (i == my_cpu)
196 			continue;
197 
198 		for (;;) {
199 			rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
200 						   &status);
201 			if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
202 				break;
203 			barrier();
204 			if (i != notified) {
205 				printk(KERN_INFO "kexec: waiting for cpu %d "
206 				       "(physical %d) to enter OPAL\n",
207 				       i, paca[i].hw_cpu_id);
208 				notified = i;
209 			}
210 
211 			/*
212 			 * On crash secondaries might be unreachable or hung,
213 			 * so timeout if we've waited too long
214 			 * */
215 			mdelay(1);
216 			if (timeout-- == 0) {
217 				printk(KERN_ERR "kexec: timed out waiting for "
218 				       "cpu %d (physical %d) to enter OPAL\n",
219 				       i, paca[i].hw_cpu_id);
220 				break;
221 			}
222 		}
223 	}
224 }
225 
226 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
227 {
228 	u64 reinit_flags;
229 
230 	if (xive_enabled())
231 		xive_kexec_teardown_cpu(secondary);
232 	else
233 		xics_kexec_teardown_cpu(secondary);
234 
235 	/* On OPAL, we return all CPUs to firmware */
236 	if (!firmware_has_feature(FW_FEATURE_OPAL))
237 		return;
238 
239 	if (secondary) {
240 		/* Return secondary CPUs to firmware on OPAL v3 */
241 		mb();
242 		get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
243 		mb();
244 
245 		/* Return the CPU to OPAL */
246 		opal_return_cpu();
247 	} else {
248 		/* Primary waits for the secondaries to have reached OPAL */
249 		pnv_kexec_wait_secondaries_down();
250 
251 		/* Switch XIVE back to emulation mode */
252 		if (xive_enabled())
253 			xive_shutdown();
254 
255 		/*
256 		 * We might be running as little-endian - now that interrupts
257 		 * are disabled, reset the HILE bit to big-endian so we don't
258 		 * take interrupts in the wrong endian later
259 		 *
260 		 * We reinit to enable both radix and hash on P9 to ensure
261 		 * the mode used by the next kernel is always supported.
262 		 */
263 		reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
264 		if (cpu_has_feature(CPU_FTR_ARCH_300))
265 			reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
266 				OPAL_REINIT_CPUS_MMU_HASH;
267 		opal_reinit_cpus(reinit_flags);
268 	}
269 }
270 #endif /* CONFIG_KEXEC_CORE */
271 
272 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
273 static unsigned long pnv_memory_block_size(void)
274 {
275 	/*
276 	 * We map the kernel linear region with 1GB large pages on radix. For
277 	 * memory hot unplug to work our memory block size must be at least
278 	 * this size.
279 	 */
280 	if (radix_enabled())
281 		return 1UL * 1024 * 1024 * 1024;
282 	else
283 		return 256UL * 1024 * 1024;
284 }
285 #endif
286 
287 static void __init pnv_setup_machdep_opal(void)
288 {
289 	ppc_md.get_boot_time = opal_get_boot_time;
290 	ppc_md.restart = pnv_restart;
291 	pm_power_off = pnv_power_off;
292 	ppc_md.halt = pnv_halt;
293 	ppc_md.machine_check_exception = opal_machine_check;
294 	ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
295 	ppc_md.hmi_exception_early = opal_hmi_exception_early;
296 	ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
297 }
298 
299 static int __init pnv_probe(void)
300 {
301 	if (!of_machine_is_compatible("ibm,powernv"))
302 		return 0;
303 
304 	if (firmware_has_feature(FW_FEATURE_OPAL))
305 		pnv_setup_machdep_opal();
306 
307 	pr_debug("PowerNV detected !\n");
308 
309 	pnv_init();
310 
311 	return 1;
312 }
313 
314 /*
315  * Returns the cpu frequency for 'cpu' in Hz. This is used by
316  * /proc/cpuinfo
317  */
318 static unsigned long pnv_get_proc_freq(unsigned int cpu)
319 {
320 	unsigned long ret_freq;
321 
322 	ret_freq = cpufreq_quick_get(cpu) * 1000ul;
323 
324 	/*
325 	 * If the backend cpufreq driver does not exist,
326          * then fallback to old way of reporting the clockrate.
327 	 */
328 	if (!ret_freq)
329 		ret_freq = ppc_proc_freq;
330 	return ret_freq;
331 }
332 
333 define_machine(powernv) {
334 	.name			= "PowerNV",
335 	.probe			= pnv_probe,
336 	.setup_arch		= pnv_setup_arch,
337 	.init_IRQ		= pnv_init_IRQ,
338 	.show_cpuinfo		= pnv_show_cpuinfo,
339 	.get_proc_freq          = pnv_get_proc_freq,
340 	.progress		= pnv_progress,
341 	.machine_shutdown	= pnv_shutdown,
342 	.power_save             = NULL,
343 	.calibrate_decr		= generic_calibrate_decr,
344 #ifdef CONFIG_KEXEC_CORE
345 	.kexec_cpu_down		= pnv_kexec_cpu_down,
346 #endif
347 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
348 	.memory_block_size	= pnv_memory_block_size,
349 #endif
350 };
351