1 /*
2  * PowerNV setup code.
3  *
4  * Copyright 2011 IBM Corp.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 
12 #undef DEBUG
13 
14 #include <linux/cpu.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/kernel.h>
18 #include <linux/tty.h>
19 #include <linux/reboot.h>
20 #include <linux/init.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/irq.h>
24 #include <linux/seq_file.h>
25 #include <linux/of.h>
26 #include <linux/of_fdt.h>
27 #include <linux/interrupt.h>
28 #include <linux/bug.h>
29 #include <linux/pci.h>
30 #include <linux/cpufreq.h>
31 
32 #include <asm/machdep.h>
33 #include <asm/firmware.h>
34 #include <asm/xics.h>
35 #include <asm/xive.h>
36 #include <asm/opal.h>
37 #include <asm/kexec.h>
38 #include <asm/smp.h>
39 #include <asm/tm.h>
40 #include <asm/setup.h>
41 #include <asm/security_features.h>
42 
43 #include "powernv.h"
44 
45 
46 static bool fw_feature_is(const char *state, const char *name,
47 			  struct device_node *fw_features)
48 {
49 	struct device_node *np;
50 	bool rc = false;
51 
52 	np = of_get_child_by_name(fw_features, name);
53 	if (np) {
54 		rc = of_property_read_bool(np, state);
55 		of_node_put(np);
56 	}
57 
58 	return rc;
59 }
60 
61 static void init_fw_feat_flags(struct device_node *np)
62 {
63 	if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
64 		security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
65 
66 	if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
67 		security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
68 
69 	if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
70 		security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
71 
72 	if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
73 		security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
74 
75 	if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
76 		security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
77 
78 	if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
79 		security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
80 
81 	if (fw_feature_is("enabled", "fw-count-cache-flush-bcctr2,0,0", np))
82 		security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
83 
84 	if (fw_feature_is("enabled", "needs-count-cache-flush-on-context-switch", np))
85 		security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
86 
87 	/*
88 	 * The features below are enabled by default, so we instead look to see
89 	 * if firmware has *disabled* them, and clear them if so.
90 	 */
91 	if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
92 		security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
93 
94 	if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
95 		security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
96 
97 	if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
98 		security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
99 
100 	if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
101 		security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
102 }
103 
104 static void pnv_setup_rfi_flush(void)
105 {
106 	struct device_node *np, *fw_features;
107 	enum l1d_flush_type type;
108 	bool enable;
109 
110 	/* Default to fallback in case fw-features are not available */
111 	type = L1D_FLUSH_FALLBACK;
112 
113 	np = of_find_node_by_name(NULL, "ibm,opal");
114 	fw_features = of_get_child_by_name(np, "fw-features");
115 	of_node_put(np);
116 
117 	if (fw_features) {
118 		init_fw_feat_flags(fw_features);
119 		of_node_put(fw_features);
120 
121 		if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
122 			type = L1D_FLUSH_MTTRIG;
123 
124 		if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
125 			type = L1D_FLUSH_ORI;
126 	}
127 
128 	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
129 		 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
130 		  security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
131 
132 	setup_rfi_flush(type, enable);
133 	setup_count_cache_flush();
134 }
135 
136 static void __init pnv_setup_arch(void)
137 {
138 	set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
139 
140 	pnv_setup_rfi_flush();
141 	setup_stf_barrier();
142 
143 	/* Initialize SMP */
144 	pnv_smp_init();
145 
146 	/* Setup PCI */
147 	pnv_pci_init();
148 
149 	/* Setup RTC and NVRAM callbacks */
150 	if (firmware_has_feature(FW_FEATURE_OPAL))
151 		opal_nvram_init();
152 
153 	/* Enable NAP mode */
154 	powersave_nap = 1;
155 
156 	/* XXX PMCS */
157 }
158 
159 static void __init pnv_init(void)
160 {
161 	/*
162 	 * Initialize the LPC bus now so that legacy serial
163 	 * ports can be found on it
164 	 */
165 	opal_lpc_init();
166 
167 #ifdef CONFIG_HVC_OPAL
168 	if (firmware_has_feature(FW_FEATURE_OPAL))
169 		hvc_opal_init_early();
170 	else
171 #endif
172 		add_preferred_console("hvc", 0, NULL);
173 }
174 
175 static void __init pnv_init_IRQ(void)
176 {
177 	/* Try using a XIVE if available, otherwise use a XICS */
178 	if (!xive_native_init())
179 		xics_init();
180 
181 	WARN_ON(!ppc_md.get_irq);
182 }
183 
184 static void pnv_show_cpuinfo(struct seq_file *m)
185 {
186 	struct device_node *root;
187 	const char *model = "";
188 
189 	root = of_find_node_by_path("/");
190 	if (root)
191 		model = of_get_property(root, "model", NULL);
192 	seq_printf(m, "machine\t\t: PowerNV %s\n", model);
193 	if (firmware_has_feature(FW_FEATURE_OPAL))
194 		seq_printf(m, "firmware\t: OPAL\n");
195 	else
196 		seq_printf(m, "firmware\t: BML\n");
197 	of_node_put(root);
198 	if (radix_enabled())
199 		seq_printf(m, "MMU\t\t: Radix\n");
200 	else
201 		seq_printf(m, "MMU\t\t: Hash\n");
202 }
203 
204 static void pnv_prepare_going_down(void)
205 {
206 	/*
207 	 * Disable all notifiers from OPAL, we can't
208 	 * service interrupts anymore anyway
209 	 */
210 	opal_event_shutdown();
211 
212 	/* Print flash update message if one is scheduled. */
213 	opal_flash_update_print_message();
214 
215 	smp_send_stop();
216 
217 	hard_irq_disable();
218 }
219 
220 static void  __noreturn pnv_restart(char *cmd)
221 {
222 	long rc;
223 
224 	pnv_prepare_going_down();
225 
226 	do {
227 		if (!cmd)
228 			rc = opal_cec_reboot();
229 		else if (strcmp(cmd, "full") == 0)
230 			rc = opal_cec_reboot2(OPAL_REBOOT_FULL_IPL, NULL);
231 		else
232 			rc = OPAL_UNSUPPORTED;
233 
234 		if (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
235 			/* Opal is busy wait for some time and retry */
236 			opal_poll_events(NULL);
237 			mdelay(10);
238 
239 		} else	if (cmd && rc) {
240 			/* Unknown error while issuing reboot */
241 			if (rc == OPAL_UNSUPPORTED)
242 				pr_err("Unsupported '%s' reboot.\n", cmd);
243 			else
244 				pr_err("Unable to issue '%s' reboot. Err=%ld\n",
245 				       cmd, rc);
246 			pr_info("Forcing a cec-reboot\n");
247 			cmd = NULL;
248 			rc = OPAL_BUSY;
249 
250 		} else if (rc != OPAL_SUCCESS) {
251 			/* Unknown error while issuing cec-reboot */
252 			pr_err("Unable to reboot. Err=%ld\n", rc);
253 		}
254 
255 	} while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT);
256 
257 	for (;;)
258 		opal_poll_events(NULL);
259 }
260 
261 static void __noreturn pnv_power_off(void)
262 {
263 	long rc = OPAL_BUSY;
264 
265 	pnv_prepare_going_down();
266 
267 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
268 		rc = opal_cec_power_down(0);
269 		if (rc == OPAL_BUSY_EVENT)
270 			opal_poll_events(NULL);
271 		else
272 			mdelay(10);
273 	}
274 	for (;;)
275 		opal_poll_events(NULL);
276 }
277 
278 static void __noreturn pnv_halt(void)
279 {
280 	pnv_power_off();
281 }
282 
283 static void pnv_progress(char *s, unsigned short hex)
284 {
285 }
286 
287 static void pnv_shutdown(void)
288 {
289 	/* Let the PCI code clear up IODA tables */
290 	pnv_pci_shutdown();
291 
292 	/*
293 	 * Stop OPAL activity: Unregister all OPAL interrupts so they
294 	 * don't fire up while we kexec and make sure all potentially
295 	 * DMA'ing ops are complete (such as dump retrieval).
296 	 */
297 	opal_shutdown();
298 }
299 
300 #ifdef CONFIG_KEXEC_CORE
301 static void pnv_kexec_wait_secondaries_down(void)
302 {
303 	int my_cpu, i, notified = -1;
304 
305 	my_cpu = get_cpu();
306 
307 	for_each_online_cpu(i) {
308 		uint8_t status;
309 		int64_t rc, timeout = 1000;
310 
311 		if (i == my_cpu)
312 			continue;
313 
314 		for (;;) {
315 			rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
316 						   &status);
317 			if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
318 				break;
319 			barrier();
320 			if (i != notified) {
321 				printk(KERN_INFO "kexec: waiting for cpu %d "
322 				       "(physical %d) to enter OPAL\n",
323 				       i, paca_ptrs[i]->hw_cpu_id);
324 				notified = i;
325 			}
326 
327 			/*
328 			 * On crash secondaries might be unreachable or hung,
329 			 * so timeout if we've waited too long
330 			 * */
331 			mdelay(1);
332 			if (timeout-- == 0) {
333 				printk(KERN_ERR "kexec: timed out waiting for "
334 				       "cpu %d (physical %d) to enter OPAL\n",
335 				       i, paca_ptrs[i]->hw_cpu_id);
336 				break;
337 			}
338 		}
339 	}
340 }
341 
342 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
343 {
344 	u64 reinit_flags;
345 
346 	if (xive_enabled())
347 		xive_teardown_cpu();
348 	else
349 		xics_kexec_teardown_cpu(secondary);
350 
351 	/* On OPAL, we return all CPUs to firmware */
352 	if (!firmware_has_feature(FW_FEATURE_OPAL))
353 		return;
354 
355 	if (secondary) {
356 		/* Return secondary CPUs to firmware on OPAL v3 */
357 		mb();
358 		get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
359 		mb();
360 
361 		/* Return the CPU to OPAL */
362 		opal_return_cpu();
363 	} else {
364 		/* Primary waits for the secondaries to have reached OPAL */
365 		pnv_kexec_wait_secondaries_down();
366 
367 		/* Switch XIVE back to emulation mode */
368 		if (xive_enabled())
369 			xive_shutdown();
370 
371 		/*
372 		 * We might be running as little-endian - now that interrupts
373 		 * are disabled, reset the HILE bit to big-endian so we don't
374 		 * take interrupts in the wrong endian later
375 		 *
376 		 * We reinit to enable both radix and hash on P9 to ensure
377 		 * the mode used by the next kernel is always supported.
378 		 */
379 		reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
380 		if (cpu_has_feature(CPU_FTR_ARCH_300))
381 			reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
382 				OPAL_REINIT_CPUS_MMU_HASH;
383 		opal_reinit_cpus(reinit_flags);
384 	}
385 }
386 #endif /* CONFIG_KEXEC_CORE */
387 
388 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
389 static unsigned long pnv_memory_block_size(void)
390 {
391 	return 256UL * 1024 * 1024;
392 }
393 #endif
394 
395 static void __init pnv_setup_machdep_opal(void)
396 {
397 	ppc_md.get_boot_time = opal_get_boot_time;
398 	ppc_md.restart = pnv_restart;
399 	pm_power_off = pnv_power_off;
400 	ppc_md.halt = pnv_halt;
401 	/* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
402 	ppc_md.machine_check_exception = opal_machine_check;
403 	ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
404 	ppc_md.hmi_exception_early = opal_hmi_exception_early;
405 	ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
406 }
407 
408 static int __init pnv_probe(void)
409 {
410 	if (!of_machine_is_compatible("ibm,powernv"))
411 		return 0;
412 
413 	if (firmware_has_feature(FW_FEATURE_OPAL))
414 		pnv_setup_machdep_opal();
415 
416 	pr_debug("PowerNV detected !\n");
417 
418 	pnv_init();
419 
420 	return 1;
421 }
422 
423 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
424 void __init pnv_tm_init(void)
425 {
426 	if (!firmware_has_feature(FW_FEATURE_OPAL) ||
427 	    !pvr_version_is(PVR_POWER9) ||
428 	    early_cpu_has_feature(CPU_FTR_TM))
429 		return;
430 
431 	if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
432 		return;
433 
434 	pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
435 	cur_cpu_spec->cpu_features |= CPU_FTR_TM;
436 	/* Make sure "normal" HTM is off (it should be) */
437 	cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
438 	/* Turn on no suspend mode, and HTM no SC */
439 	cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
440 					    PPC_FEATURE2_HTM_NOSC;
441 	tm_suspend_disabled = true;
442 }
443 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
444 
445 /*
446  * Returns the cpu frequency for 'cpu' in Hz. This is used by
447  * /proc/cpuinfo
448  */
449 static unsigned long pnv_get_proc_freq(unsigned int cpu)
450 {
451 	unsigned long ret_freq;
452 
453 	ret_freq = cpufreq_get(cpu) * 1000ul;
454 
455 	/*
456 	 * If the backend cpufreq driver does not exist,
457          * then fallback to old way of reporting the clockrate.
458 	 */
459 	if (!ret_freq)
460 		ret_freq = ppc_proc_freq;
461 	return ret_freq;
462 }
463 
464 static long pnv_machine_check_early(struct pt_regs *regs)
465 {
466 	long handled = 0;
467 
468 	if (cur_cpu_spec && cur_cpu_spec->machine_check_early)
469 		handled = cur_cpu_spec->machine_check_early(regs);
470 
471 	return handled;
472 }
473 
474 define_machine(powernv) {
475 	.name			= "PowerNV",
476 	.probe			= pnv_probe,
477 	.setup_arch		= pnv_setup_arch,
478 	.init_IRQ		= pnv_init_IRQ,
479 	.show_cpuinfo		= pnv_show_cpuinfo,
480 	.get_proc_freq          = pnv_get_proc_freq,
481 	.progress		= pnv_progress,
482 	.machine_shutdown	= pnv_shutdown,
483 	.power_save             = NULL,
484 	.calibrate_decr		= generic_calibrate_decr,
485 	.machine_check_early	= pnv_machine_check_early,
486 #ifdef CONFIG_KEXEC_CORE
487 	.kexec_cpu_down		= pnv_kexec_cpu_down,
488 #endif
489 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
490 	.memory_block_size	= pnv_memory_block_size,
491 #endif
492 };
493