1 /*
2  * PowerNV setup code.
3  *
4  * Copyright 2011 IBM Corp.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 
12 #undef DEBUG
13 
14 #include <linux/cpu.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/kernel.h>
18 #include <linux/tty.h>
19 #include <linux/reboot.h>
20 #include <linux/init.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/irq.h>
24 #include <linux/seq_file.h>
25 #include <linux/of.h>
26 #include <linux/of_fdt.h>
27 #include <linux/interrupt.h>
28 #include <linux/bug.h>
29 #include <linux/pci.h>
30 #include <linux/cpufreq.h>
31 
32 #include <asm/machdep.h>
33 #include <asm/firmware.h>
34 #include <asm/xics.h>
35 #include <asm/xive.h>
36 #include <asm/opal.h>
37 #include <asm/kexec.h>
38 #include <asm/smp.h>
39 #include <asm/tm.h>
40 
41 #include "powernv.h"
42 
43 static void __init pnv_setup_arch(void)
44 {
45 	set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
46 
47 	/* Initialize SMP */
48 	pnv_smp_init();
49 
50 	/* Setup PCI */
51 	pnv_pci_init();
52 
53 	/* Setup RTC and NVRAM callbacks */
54 	if (firmware_has_feature(FW_FEATURE_OPAL))
55 		opal_nvram_init();
56 
57 	/* Enable NAP mode */
58 	powersave_nap = 1;
59 
60 	/* XXX PMCS */
61 }
62 
63 static void __init pnv_init(void)
64 {
65 	/*
66 	 * Initialize the LPC bus now so that legacy serial
67 	 * ports can be found on it
68 	 */
69 	opal_lpc_init();
70 
71 #ifdef CONFIG_HVC_OPAL
72 	if (firmware_has_feature(FW_FEATURE_OPAL))
73 		hvc_opal_init_early();
74 	else
75 #endif
76 		add_preferred_console("hvc", 0, NULL);
77 }
78 
79 static void __init pnv_init_IRQ(void)
80 {
81 	/* Try using a XIVE if available, otherwise use a XICS */
82 	if (!xive_native_init())
83 		xics_init();
84 
85 	WARN_ON(!ppc_md.get_irq);
86 }
87 
88 static void pnv_show_cpuinfo(struct seq_file *m)
89 {
90 	struct device_node *root;
91 	const char *model = "";
92 
93 	root = of_find_node_by_path("/");
94 	if (root)
95 		model = of_get_property(root, "model", NULL);
96 	seq_printf(m, "machine\t\t: PowerNV %s\n", model);
97 	if (firmware_has_feature(FW_FEATURE_OPAL))
98 		seq_printf(m, "firmware\t: OPAL\n");
99 	else
100 		seq_printf(m, "firmware\t: BML\n");
101 	of_node_put(root);
102 	if (radix_enabled())
103 		seq_printf(m, "MMU\t\t: Radix\n");
104 	else
105 		seq_printf(m, "MMU\t\t: Hash\n");
106 }
107 
108 static void pnv_prepare_going_down(void)
109 {
110 	/*
111 	 * Disable all notifiers from OPAL, we can't
112 	 * service interrupts anymore anyway
113 	 */
114 	opal_event_shutdown();
115 
116 	/* Soft disable interrupts */
117 	local_irq_disable();
118 
119 	/*
120 	 * Return secondary CPUs to firwmare if a flash update
121 	 * is pending otherwise we will get all sort of error
122 	 * messages about CPU being stuck etc.. This will also
123 	 * have the side effect of hard disabling interrupts so
124 	 * past this point, the kernel is effectively dead.
125 	 */
126 	opal_flash_term_callback();
127 }
128 
129 static void  __noreturn pnv_restart(char *cmd)
130 {
131 	long rc = OPAL_BUSY;
132 
133 	pnv_prepare_going_down();
134 
135 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
136 		rc = opal_cec_reboot();
137 		if (rc == OPAL_BUSY_EVENT)
138 			opal_poll_events(NULL);
139 		else
140 			mdelay(10);
141 	}
142 	for (;;)
143 		opal_poll_events(NULL);
144 }
145 
146 static void __noreturn pnv_power_off(void)
147 {
148 	long rc = OPAL_BUSY;
149 
150 	pnv_prepare_going_down();
151 
152 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
153 		rc = opal_cec_power_down(0);
154 		if (rc == OPAL_BUSY_EVENT)
155 			opal_poll_events(NULL);
156 		else
157 			mdelay(10);
158 	}
159 	for (;;)
160 		opal_poll_events(NULL);
161 }
162 
163 static void __noreturn pnv_halt(void)
164 {
165 	pnv_power_off();
166 }
167 
168 static void pnv_progress(char *s, unsigned short hex)
169 {
170 }
171 
172 static void pnv_shutdown(void)
173 {
174 	/* Let the PCI code clear up IODA tables */
175 	pnv_pci_shutdown();
176 
177 	/*
178 	 * Stop OPAL activity: Unregister all OPAL interrupts so they
179 	 * don't fire up while we kexec and make sure all potentially
180 	 * DMA'ing ops are complete (such as dump retrieval).
181 	 */
182 	opal_shutdown();
183 }
184 
185 #ifdef CONFIG_KEXEC_CORE
186 static void pnv_kexec_wait_secondaries_down(void)
187 {
188 	int my_cpu, i, notified = -1;
189 
190 	my_cpu = get_cpu();
191 
192 	for_each_online_cpu(i) {
193 		uint8_t status;
194 		int64_t rc, timeout = 1000;
195 
196 		if (i == my_cpu)
197 			continue;
198 
199 		for (;;) {
200 			rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
201 						   &status);
202 			if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
203 				break;
204 			barrier();
205 			if (i != notified) {
206 				printk(KERN_INFO "kexec: waiting for cpu %d "
207 				       "(physical %d) to enter OPAL\n",
208 				       i, paca[i].hw_cpu_id);
209 				notified = i;
210 			}
211 
212 			/*
213 			 * On crash secondaries might be unreachable or hung,
214 			 * so timeout if we've waited too long
215 			 * */
216 			mdelay(1);
217 			if (timeout-- == 0) {
218 				printk(KERN_ERR "kexec: timed out waiting for "
219 				       "cpu %d (physical %d) to enter OPAL\n",
220 				       i, paca[i].hw_cpu_id);
221 				break;
222 			}
223 		}
224 	}
225 }
226 
227 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
228 {
229 	u64 reinit_flags;
230 
231 	if (xive_enabled())
232 		xive_kexec_teardown_cpu(secondary);
233 	else
234 		xics_kexec_teardown_cpu(secondary);
235 
236 	/* On OPAL, we return all CPUs to firmware */
237 	if (!firmware_has_feature(FW_FEATURE_OPAL))
238 		return;
239 
240 	if (secondary) {
241 		/* Return secondary CPUs to firmware on OPAL v3 */
242 		mb();
243 		get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
244 		mb();
245 
246 		/* Return the CPU to OPAL */
247 		opal_return_cpu();
248 	} else {
249 		/* Primary waits for the secondaries to have reached OPAL */
250 		pnv_kexec_wait_secondaries_down();
251 
252 		/* Switch XIVE back to emulation mode */
253 		if (xive_enabled())
254 			xive_shutdown();
255 
256 		/*
257 		 * We might be running as little-endian - now that interrupts
258 		 * are disabled, reset the HILE bit to big-endian so we don't
259 		 * take interrupts in the wrong endian later
260 		 *
261 		 * We reinit to enable both radix and hash on P9 to ensure
262 		 * the mode used by the next kernel is always supported.
263 		 */
264 		reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
265 		if (cpu_has_feature(CPU_FTR_ARCH_300))
266 			reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
267 				OPAL_REINIT_CPUS_MMU_HASH;
268 		opal_reinit_cpus(reinit_flags);
269 	}
270 }
271 #endif /* CONFIG_KEXEC_CORE */
272 
273 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
274 static unsigned long pnv_memory_block_size(void)
275 {
276 	/*
277 	 * We map the kernel linear region with 1GB large pages on radix. For
278 	 * memory hot unplug to work our memory block size must be at least
279 	 * this size.
280 	 */
281 	if (radix_enabled())
282 		return 1UL * 1024 * 1024 * 1024;
283 	else
284 		return 256UL * 1024 * 1024;
285 }
286 #endif
287 
288 static void __init pnv_setup_machdep_opal(void)
289 {
290 	ppc_md.get_boot_time = opal_get_boot_time;
291 	ppc_md.restart = pnv_restart;
292 	pm_power_off = pnv_power_off;
293 	ppc_md.halt = pnv_halt;
294 	/* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
295 	ppc_md.machine_check_exception = opal_machine_check;
296 	ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
297 	ppc_md.hmi_exception_early = opal_hmi_exception_early;
298 	ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
299 }
300 
301 static int __init pnv_probe(void)
302 {
303 	if (!of_machine_is_compatible("ibm,powernv"))
304 		return 0;
305 
306 	if (firmware_has_feature(FW_FEATURE_OPAL))
307 		pnv_setup_machdep_opal();
308 
309 	pr_debug("PowerNV detected !\n");
310 
311 	pnv_init();
312 
313 	return 1;
314 }
315 
316 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
317 void __init pnv_tm_init(void)
318 {
319 	if (!firmware_has_feature(FW_FEATURE_OPAL) ||
320 	    !pvr_version_is(PVR_POWER9) ||
321 	    early_cpu_has_feature(CPU_FTR_TM))
322 		return;
323 
324 	if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
325 		return;
326 
327 	pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
328 	cur_cpu_spec->cpu_features |= CPU_FTR_TM;
329 	/* Make sure "normal" HTM is off (it should be) */
330 	cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
331 	/* Turn on no suspend mode, and HTM no SC */
332 	cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
333 					    PPC_FEATURE2_HTM_NOSC;
334 	tm_suspend_disabled = true;
335 }
336 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
337 
338 /*
339  * Returns the cpu frequency for 'cpu' in Hz. This is used by
340  * /proc/cpuinfo
341  */
342 static unsigned long pnv_get_proc_freq(unsigned int cpu)
343 {
344 	unsigned long ret_freq;
345 
346 	ret_freq = cpufreq_get(cpu) * 1000ul;
347 
348 	/*
349 	 * If the backend cpufreq driver does not exist,
350          * then fallback to old way of reporting the clockrate.
351 	 */
352 	if (!ret_freq)
353 		ret_freq = ppc_proc_freq;
354 	return ret_freq;
355 }
356 
357 define_machine(powernv) {
358 	.name			= "PowerNV",
359 	.probe			= pnv_probe,
360 	.setup_arch		= pnv_setup_arch,
361 	.init_IRQ		= pnv_init_IRQ,
362 	.show_cpuinfo		= pnv_show_cpuinfo,
363 	.get_proc_freq          = pnv_get_proc_freq,
364 	.progress		= pnv_progress,
365 	.machine_shutdown	= pnv_shutdown,
366 	.power_save             = NULL,
367 	.calibrate_decr		= generic_calibrate_decr,
368 #ifdef CONFIG_KEXEC_CORE
369 	.kexec_cpu_down		= pnv_kexec_cpu_down,
370 #endif
371 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
372 	.memory_block_size	= pnv_memory_block_size,
373 #endif
374 };
375