1 /* 2 * PowerNV setup code. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12 #undef DEBUG 13 14 #include <linux/cpu.h> 15 #include <linux/errno.h> 16 #include <linux/sched.h> 17 #include <linux/kernel.h> 18 #include <linux/tty.h> 19 #include <linux/reboot.h> 20 #include <linux/init.h> 21 #include <linux/console.h> 22 #include <linux/delay.h> 23 #include <linux/irq.h> 24 #include <linux/seq_file.h> 25 #include <linux/of.h> 26 #include <linux/of_fdt.h> 27 #include <linux/interrupt.h> 28 #include <linux/bug.h> 29 #include <linux/pci.h> 30 #include <linux/cpufreq.h> 31 32 #include <asm/machdep.h> 33 #include <asm/firmware.h> 34 #include <asm/xics.h> 35 #include <asm/xive.h> 36 #include <asm/opal.h> 37 #include <asm/kexec.h> 38 #include <asm/smp.h> 39 #include <asm/tm.h> 40 #include <asm/setup.h> 41 #include <asm/security_features.h> 42 43 #include "powernv.h" 44 45 46 static bool fw_feature_is(const char *state, const char *name, 47 struct device_node *fw_features) 48 { 49 struct device_node *np; 50 bool rc = false; 51 52 np = of_get_child_by_name(fw_features, name); 53 if (np) { 54 rc = of_property_read_bool(np, state); 55 of_node_put(np); 56 } 57 58 return rc; 59 } 60 61 static void init_fw_feat_flags(struct device_node *np) 62 { 63 if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np)) 64 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 65 66 if (fw_feature_is("enabled", "fw-bcctrl-serialized", np)) 67 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 68 69 if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np)) 70 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 71 72 if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np)) 73 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 74 75 if (fw_feature_is("enabled", "fw-l1d-thread-split", np)) 76 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 77 78 if (fw_feature_is("enabled", "fw-count-cache-disabled", np)) 79 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 80 81 /* 82 * The features below are enabled by default, so we instead look to see 83 * if firmware has *disabled* them, and clear them if so. 84 */ 85 if (fw_feature_is("disabled", "speculation-policy-favor-security", np)) 86 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 87 88 if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np)) 89 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 90 91 if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np)) 92 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 93 94 if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np)) 95 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 96 } 97 98 static void pnv_setup_rfi_flush(void) 99 { 100 struct device_node *np, *fw_features; 101 enum l1d_flush_type type; 102 bool enable; 103 104 /* Default to fallback in case fw-features are not available */ 105 type = L1D_FLUSH_FALLBACK; 106 107 np = of_find_node_by_name(NULL, "ibm,opal"); 108 fw_features = of_get_child_by_name(np, "fw-features"); 109 of_node_put(np); 110 111 if (fw_features) { 112 init_fw_feat_flags(fw_features); 113 of_node_put(fw_features); 114 115 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 116 type = L1D_FLUSH_MTTRIG; 117 118 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 119 type = L1D_FLUSH_ORI; 120 } 121 122 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 123 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) || \ 124 security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV)); 125 126 setup_rfi_flush(type, enable); 127 setup_barrier_nospec(); 128 } 129 130 static void __init pnv_setup_arch(void) 131 { 132 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 133 134 pnv_setup_rfi_flush(); 135 setup_stf_barrier(); 136 137 /* Initialize SMP */ 138 pnv_smp_init(); 139 140 /* Setup PCI */ 141 pnv_pci_init(); 142 143 /* Setup RTC and NVRAM callbacks */ 144 if (firmware_has_feature(FW_FEATURE_OPAL)) 145 opal_nvram_init(); 146 147 /* Enable NAP mode */ 148 powersave_nap = 1; 149 150 /* XXX PMCS */ 151 } 152 153 static void __init pnv_init(void) 154 { 155 /* 156 * Initialize the LPC bus now so that legacy serial 157 * ports can be found on it 158 */ 159 opal_lpc_init(); 160 161 #ifdef CONFIG_HVC_OPAL 162 if (firmware_has_feature(FW_FEATURE_OPAL)) 163 hvc_opal_init_early(); 164 else 165 #endif 166 add_preferred_console("hvc", 0, NULL); 167 } 168 169 static void __init pnv_init_IRQ(void) 170 { 171 /* Try using a XIVE if available, otherwise use a XICS */ 172 if (!xive_native_init()) 173 xics_init(); 174 175 WARN_ON(!ppc_md.get_irq); 176 } 177 178 static void pnv_show_cpuinfo(struct seq_file *m) 179 { 180 struct device_node *root; 181 const char *model = ""; 182 183 root = of_find_node_by_path("/"); 184 if (root) 185 model = of_get_property(root, "model", NULL); 186 seq_printf(m, "machine\t\t: PowerNV %s\n", model); 187 if (firmware_has_feature(FW_FEATURE_OPAL)) 188 seq_printf(m, "firmware\t: OPAL\n"); 189 else 190 seq_printf(m, "firmware\t: BML\n"); 191 of_node_put(root); 192 if (radix_enabled()) 193 seq_printf(m, "MMU\t\t: Radix\n"); 194 else 195 seq_printf(m, "MMU\t\t: Hash\n"); 196 } 197 198 static void pnv_prepare_going_down(void) 199 { 200 /* 201 * Disable all notifiers from OPAL, we can't 202 * service interrupts anymore anyway 203 */ 204 opal_event_shutdown(); 205 206 /* Print flash update message if one is scheduled. */ 207 opal_flash_update_print_message(); 208 209 smp_send_stop(); 210 211 hard_irq_disable(); 212 } 213 214 static void __noreturn pnv_restart(char *cmd) 215 { 216 long rc = OPAL_BUSY; 217 218 pnv_prepare_going_down(); 219 220 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 221 rc = opal_cec_reboot(); 222 if (rc == OPAL_BUSY_EVENT) 223 opal_poll_events(NULL); 224 else 225 mdelay(10); 226 } 227 for (;;) 228 opal_poll_events(NULL); 229 } 230 231 static void __noreturn pnv_power_off(void) 232 { 233 long rc = OPAL_BUSY; 234 235 pnv_prepare_going_down(); 236 237 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 238 rc = opal_cec_power_down(0); 239 if (rc == OPAL_BUSY_EVENT) 240 opal_poll_events(NULL); 241 else 242 mdelay(10); 243 } 244 for (;;) 245 opal_poll_events(NULL); 246 } 247 248 static void __noreturn pnv_halt(void) 249 { 250 pnv_power_off(); 251 } 252 253 static void pnv_progress(char *s, unsigned short hex) 254 { 255 } 256 257 static void pnv_shutdown(void) 258 { 259 /* Let the PCI code clear up IODA tables */ 260 pnv_pci_shutdown(); 261 262 /* 263 * Stop OPAL activity: Unregister all OPAL interrupts so they 264 * don't fire up while we kexec and make sure all potentially 265 * DMA'ing ops are complete (such as dump retrieval). 266 */ 267 opal_shutdown(); 268 } 269 270 #ifdef CONFIG_KEXEC_CORE 271 static void pnv_kexec_wait_secondaries_down(void) 272 { 273 int my_cpu, i, notified = -1; 274 275 my_cpu = get_cpu(); 276 277 for_each_online_cpu(i) { 278 uint8_t status; 279 int64_t rc, timeout = 1000; 280 281 if (i == my_cpu) 282 continue; 283 284 for (;;) { 285 rc = opal_query_cpu_status(get_hard_smp_processor_id(i), 286 &status); 287 if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED) 288 break; 289 barrier(); 290 if (i != notified) { 291 printk(KERN_INFO "kexec: waiting for cpu %d " 292 "(physical %d) to enter OPAL\n", 293 i, paca_ptrs[i]->hw_cpu_id); 294 notified = i; 295 } 296 297 /* 298 * On crash secondaries might be unreachable or hung, 299 * so timeout if we've waited too long 300 * */ 301 mdelay(1); 302 if (timeout-- == 0) { 303 printk(KERN_ERR "kexec: timed out waiting for " 304 "cpu %d (physical %d) to enter OPAL\n", 305 i, paca_ptrs[i]->hw_cpu_id); 306 break; 307 } 308 } 309 } 310 } 311 312 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) 313 { 314 u64 reinit_flags; 315 316 if (xive_enabled()) 317 xive_kexec_teardown_cpu(secondary); 318 else 319 xics_kexec_teardown_cpu(secondary); 320 321 /* On OPAL, we return all CPUs to firmware */ 322 if (!firmware_has_feature(FW_FEATURE_OPAL)) 323 return; 324 325 if (secondary) { 326 /* Return secondary CPUs to firmware on OPAL v3 */ 327 mb(); 328 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; 329 mb(); 330 331 /* Return the CPU to OPAL */ 332 opal_return_cpu(); 333 } else { 334 /* Primary waits for the secondaries to have reached OPAL */ 335 pnv_kexec_wait_secondaries_down(); 336 337 /* Switch XIVE back to emulation mode */ 338 if (xive_enabled()) 339 xive_shutdown(); 340 341 /* 342 * We might be running as little-endian - now that interrupts 343 * are disabled, reset the HILE bit to big-endian so we don't 344 * take interrupts in the wrong endian later 345 * 346 * We reinit to enable both radix and hash on P9 to ensure 347 * the mode used by the next kernel is always supported. 348 */ 349 reinit_flags = OPAL_REINIT_CPUS_HILE_BE; 350 if (cpu_has_feature(CPU_FTR_ARCH_300)) 351 reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX | 352 OPAL_REINIT_CPUS_MMU_HASH; 353 opal_reinit_cpus(reinit_flags); 354 } 355 } 356 #endif /* CONFIG_KEXEC_CORE */ 357 358 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 359 static unsigned long pnv_memory_block_size(void) 360 { 361 return 256UL * 1024 * 1024; 362 } 363 #endif 364 365 static void __init pnv_setup_machdep_opal(void) 366 { 367 ppc_md.get_boot_time = opal_get_boot_time; 368 ppc_md.restart = pnv_restart; 369 pm_power_off = pnv_power_off; 370 ppc_md.halt = pnv_halt; 371 /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */ 372 ppc_md.machine_check_exception = opal_machine_check; 373 ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; 374 ppc_md.hmi_exception_early = opal_hmi_exception_early; 375 ppc_md.handle_hmi_exception = opal_handle_hmi_exception; 376 } 377 378 static int __init pnv_probe(void) 379 { 380 if (!of_machine_is_compatible("ibm,powernv")) 381 return 0; 382 383 if (firmware_has_feature(FW_FEATURE_OPAL)) 384 pnv_setup_machdep_opal(); 385 386 pr_debug("PowerNV detected !\n"); 387 388 pnv_init(); 389 390 return 1; 391 } 392 393 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 394 void __init pnv_tm_init(void) 395 { 396 if (!firmware_has_feature(FW_FEATURE_OPAL) || 397 !pvr_version_is(PVR_POWER9) || 398 early_cpu_has_feature(CPU_FTR_TM)) 399 return; 400 401 if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS) 402 return; 403 404 pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n"); 405 cur_cpu_spec->cpu_features |= CPU_FTR_TM; 406 /* Make sure "normal" HTM is off (it should be) */ 407 cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM; 408 /* Turn on no suspend mode, and HTM no SC */ 409 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \ 410 PPC_FEATURE2_HTM_NOSC; 411 tm_suspend_disabled = true; 412 } 413 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 414 415 /* 416 * Returns the cpu frequency for 'cpu' in Hz. This is used by 417 * /proc/cpuinfo 418 */ 419 static unsigned long pnv_get_proc_freq(unsigned int cpu) 420 { 421 unsigned long ret_freq; 422 423 ret_freq = cpufreq_get(cpu) * 1000ul; 424 425 /* 426 * If the backend cpufreq driver does not exist, 427 * then fallback to old way of reporting the clockrate. 428 */ 429 if (!ret_freq) 430 ret_freq = ppc_proc_freq; 431 return ret_freq; 432 } 433 434 define_machine(powernv) { 435 .name = "PowerNV", 436 .probe = pnv_probe, 437 .setup_arch = pnv_setup_arch, 438 .init_IRQ = pnv_init_IRQ, 439 .show_cpuinfo = pnv_show_cpuinfo, 440 .get_proc_freq = pnv_get_proc_freq, 441 .progress = pnv_progress, 442 .machine_shutdown = pnv_shutdown, 443 .power_save = NULL, 444 .calibrate_decr = generic_calibrate_decr, 445 #ifdef CONFIG_KEXEC_CORE 446 .kexec_cpu_down = pnv_kexec_cpu_down, 447 #endif 448 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 449 .memory_block_size = pnv_memory_block_size, 450 #endif 451 }; 452