1 /*
2  * PowerNV setup code.
3  *
4  * Copyright 2011 IBM Corp.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 
12 #undef DEBUG
13 
14 #include <linux/cpu.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/kernel.h>
18 #include <linux/tty.h>
19 #include <linux/reboot.h>
20 #include <linux/init.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/irq.h>
24 #include <linux/seq_file.h>
25 #include <linux/of.h>
26 #include <linux/of_fdt.h>
27 #include <linux/interrupt.h>
28 #include <linux/bug.h>
29 #include <linux/pci.h>
30 #include <linux/cpufreq.h>
31 
32 #include <asm/machdep.h>
33 #include <asm/firmware.h>
34 #include <asm/xics.h>
35 #include <asm/xive.h>
36 #include <asm/opal.h>
37 #include <asm/kexec.h>
38 #include <asm/smp.h>
39 #include <asm/tm.h>
40 #include <asm/setup.h>
41 
42 #include "powernv.h"
43 
44 static void pnv_setup_rfi_flush(void)
45 {
46 	struct device_node *np, *fw_features;
47 	enum l1d_flush_type type;
48 	int enable;
49 
50 	/* Default to fallback in case fw-features are not available */
51 	type = L1D_FLUSH_FALLBACK;
52 	enable = 1;
53 
54 	np = of_find_node_by_name(NULL, "ibm,opal");
55 	fw_features = of_get_child_by_name(np, "fw-features");
56 	of_node_put(np);
57 
58 	if (fw_features) {
59 		np = of_get_child_by_name(fw_features, "inst-l1d-flush-trig2");
60 		if (np && of_property_read_bool(np, "enabled"))
61 			type = L1D_FLUSH_MTTRIG;
62 
63 		of_node_put(np);
64 
65 		np = of_get_child_by_name(fw_features, "inst-l1d-flush-ori30,30,0");
66 		if (np && of_property_read_bool(np, "enabled"))
67 			type = L1D_FLUSH_ORI;
68 
69 		of_node_put(np);
70 
71 		/* Enable unless firmware says NOT to */
72 		enable = 2;
73 		np = of_get_child_by_name(fw_features, "needs-l1d-flush-msr-hv-1-to-0");
74 		if (np && of_property_read_bool(np, "disabled"))
75 			enable--;
76 
77 		of_node_put(np);
78 
79 		np = of_get_child_by_name(fw_features, "needs-l1d-flush-msr-pr-0-to-1");
80 		if (np && of_property_read_bool(np, "disabled"))
81 			enable--;
82 
83 		of_node_put(np);
84 		of_node_put(fw_features);
85 	}
86 
87 	setup_rfi_flush(type, enable > 0);
88 }
89 
90 static void __init pnv_setup_arch(void)
91 {
92 	set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
93 
94 	pnv_setup_rfi_flush();
95 
96 	/* Initialize SMP */
97 	pnv_smp_init();
98 
99 	/* Setup PCI */
100 	pnv_pci_init();
101 
102 	/* Setup RTC and NVRAM callbacks */
103 	if (firmware_has_feature(FW_FEATURE_OPAL))
104 		opal_nvram_init();
105 
106 	/* Enable NAP mode */
107 	powersave_nap = 1;
108 
109 	/* XXX PMCS */
110 }
111 
112 static void __init pnv_init(void)
113 {
114 	/*
115 	 * Initialize the LPC bus now so that legacy serial
116 	 * ports can be found on it
117 	 */
118 	opal_lpc_init();
119 
120 #ifdef CONFIG_HVC_OPAL
121 	if (firmware_has_feature(FW_FEATURE_OPAL))
122 		hvc_opal_init_early();
123 	else
124 #endif
125 		add_preferred_console("hvc", 0, NULL);
126 }
127 
128 static void __init pnv_init_IRQ(void)
129 {
130 	/* Try using a XIVE if available, otherwise use a XICS */
131 	if (!xive_native_init())
132 		xics_init();
133 
134 	WARN_ON(!ppc_md.get_irq);
135 }
136 
137 static void pnv_show_cpuinfo(struct seq_file *m)
138 {
139 	struct device_node *root;
140 	const char *model = "";
141 
142 	root = of_find_node_by_path("/");
143 	if (root)
144 		model = of_get_property(root, "model", NULL);
145 	seq_printf(m, "machine\t\t: PowerNV %s\n", model);
146 	if (firmware_has_feature(FW_FEATURE_OPAL))
147 		seq_printf(m, "firmware\t: OPAL\n");
148 	else
149 		seq_printf(m, "firmware\t: BML\n");
150 	of_node_put(root);
151 	if (radix_enabled())
152 		seq_printf(m, "MMU\t\t: Radix\n");
153 	else
154 		seq_printf(m, "MMU\t\t: Hash\n");
155 }
156 
157 static void pnv_prepare_going_down(void)
158 {
159 	/*
160 	 * Disable all notifiers from OPAL, we can't
161 	 * service interrupts anymore anyway
162 	 */
163 	opal_event_shutdown();
164 
165 	/* Soft disable interrupts */
166 	local_irq_disable();
167 
168 	/*
169 	 * Return secondary CPUs to firwmare if a flash update
170 	 * is pending otherwise we will get all sort of error
171 	 * messages about CPU being stuck etc.. This will also
172 	 * have the side effect of hard disabling interrupts so
173 	 * past this point, the kernel is effectively dead.
174 	 */
175 	opal_flash_term_callback();
176 }
177 
178 static void  __noreturn pnv_restart(char *cmd)
179 {
180 	long rc = OPAL_BUSY;
181 
182 	pnv_prepare_going_down();
183 
184 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
185 		rc = opal_cec_reboot();
186 		if (rc == OPAL_BUSY_EVENT)
187 			opal_poll_events(NULL);
188 		else
189 			mdelay(10);
190 	}
191 	for (;;)
192 		opal_poll_events(NULL);
193 }
194 
195 static void __noreturn pnv_power_off(void)
196 {
197 	long rc = OPAL_BUSY;
198 
199 	pnv_prepare_going_down();
200 
201 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
202 		rc = opal_cec_power_down(0);
203 		if (rc == OPAL_BUSY_EVENT)
204 			opal_poll_events(NULL);
205 		else
206 			mdelay(10);
207 	}
208 	for (;;)
209 		opal_poll_events(NULL);
210 }
211 
212 static void __noreturn pnv_halt(void)
213 {
214 	pnv_power_off();
215 }
216 
217 static void pnv_progress(char *s, unsigned short hex)
218 {
219 }
220 
221 static void pnv_shutdown(void)
222 {
223 	/* Let the PCI code clear up IODA tables */
224 	pnv_pci_shutdown();
225 
226 	/*
227 	 * Stop OPAL activity: Unregister all OPAL interrupts so they
228 	 * don't fire up while we kexec and make sure all potentially
229 	 * DMA'ing ops are complete (such as dump retrieval).
230 	 */
231 	opal_shutdown();
232 }
233 
234 #ifdef CONFIG_KEXEC_CORE
235 static void pnv_kexec_wait_secondaries_down(void)
236 {
237 	int my_cpu, i, notified = -1;
238 
239 	my_cpu = get_cpu();
240 
241 	for_each_online_cpu(i) {
242 		uint8_t status;
243 		int64_t rc, timeout = 1000;
244 
245 		if (i == my_cpu)
246 			continue;
247 
248 		for (;;) {
249 			rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
250 						   &status);
251 			if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
252 				break;
253 			barrier();
254 			if (i != notified) {
255 				printk(KERN_INFO "kexec: waiting for cpu %d "
256 				       "(physical %d) to enter OPAL\n",
257 				       i, paca[i].hw_cpu_id);
258 				notified = i;
259 			}
260 
261 			/*
262 			 * On crash secondaries might be unreachable or hung,
263 			 * so timeout if we've waited too long
264 			 * */
265 			mdelay(1);
266 			if (timeout-- == 0) {
267 				printk(KERN_ERR "kexec: timed out waiting for "
268 				       "cpu %d (physical %d) to enter OPAL\n",
269 				       i, paca[i].hw_cpu_id);
270 				break;
271 			}
272 		}
273 	}
274 }
275 
276 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
277 {
278 	u64 reinit_flags;
279 
280 	if (xive_enabled())
281 		xive_kexec_teardown_cpu(secondary);
282 	else
283 		xics_kexec_teardown_cpu(secondary);
284 
285 	/* On OPAL, we return all CPUs to firmware */
286 	if (!firmware_has_feature(FW_FEATURE_OPAL))
287 		return;
288 
289 	if (secondary) {
290 		/* Return secondary CPUs to firmware on OPAL v3 */
291 		mb();
292 		get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
293 		mb();
294 
295 		/* Return the CPU to OPAL */
296 		opal_return_cpu();
297 	} else {
298 		/* Primary waits for the secondaries to have reached OPAL */
299 		pnv_kexec_wait_secondaries_down();
300 
301 		/* Switch XIVE back to emulation mode */
302 		if (xive_enabled())
303 			xive_shutdown();
304 
305 		/*
306 		 * We might be running as little-endian - now that interrupts
307 		 * are disabled, reset the HILE bit to big-endian so we don't
308 		 * take interrupts in the wrong endian later
309 		 *
310 		 * We reinit to enable both radix and hash on P9 to ensure
311 		 * the mode used by the next kernel is always supported.
312 		 */
313 		reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
314 		if (cpu_has_feature(CPU_FTR_ARCH_300))
315 			reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
316 				OPAL_REINIT_CPUS_MMU_HASH;
317 		opal_reinit_cpus(reinit_flags);
318 	}
319 }
320 #endif /* CONFIG_KEXEC_CORE */
321 
322 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
323 static unsigned long pnv_memory_block_size(void)
324 {
325 	/*
326 	 * We map the kernel linear region with 1GB large pages on radix. For
327 	 * memory hot unplug to work our memory block size must be at least
328 	 * this size.
329 	 */
330 	if (radix_enabled())
331 		return 1UL * 1024 * 1024 * 1024;
332 	else
333 		return 256UL * 1024 * 1024;
334 }
335 #endif
336 
337 static void __init pnv_setup_machdep_opal(void)
338 {
339 	ppc_md.get_boot_time = opal_get_boot_time;
340 	ppc_md.restart = pnv_restart;
341 	pm_power_off = pnv_power_off;
342 	ppc_md.halt = pnv_halt;
343 	/* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
344 	ppc_md.machine_check_exception = opal_machine_check;
345 	ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
346 	ppc_md.hmi_exception_early = opal_hmi_exception_early;
347 	ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
348 }
349 
350 static int __init pnv_probe(void)
351 {
352 	if (!of_machine_is_compatible("ibm,powernv"))
353 		return 0;
354 
355 	if (firmware_has_feature(FW_FEATURE_OPAL))
356 		pnv_setup_machdep_opal();
357 
358 	pr_debug("PowerNV detected !\n");
359 
360 	pnv_init();
361 
362 	return 1;
363 }
364 
365 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
366 void __init pnv_tm_init(void)
367 {
368 	if (!firmware_has_feature(FW_FEATURE_OPAL) ||
369 	    !pvr_version_is(PVR_POWER9) ||
370 	    early_cpu_has_feature(CPU_FTR_TM))
371 		return;
372 
373 	if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
374 		return;
375 
376 	pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
377 	cur_cpu_spec->cpu_features |= CPU_FTR_TM;
378 	/* Make sure "normal" HTM is off (it should be) */
379 	cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
380 	/* Turn on no suspend mode, and HTM no SC */
381 	cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
382 					    PPC_FEATURE2_HTM_NOSC;
383 	tm_suspend_disabled = true;
384 }
385 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
386 
387 /*
388  * Returns the cpu frequency for 'cpu' in Hz. This is used by
389  * /proc/cpuinfo
390  */
391 static unsigned long pnv_get_proc_freq(unsigned int cpu)
392 {
393 	unsigned long ret_freq;
394 
395 	ret_freq = cpufreq_get(cpu) * 1000ul;
396 
397 	/*
398 	 * If the backend cpufreq driver does not exist,
399          * then fallback to old way of reporting the clockrate.
400 	 */
401 	if (!ret_freq)
402 		ret_freq = ppc_proc_freq;
403 	return ret_freq;
404 }
405 
406 define_machine(powernv) {
407 	.name			= "PowerNV",
408 	.probe			= pnv_probe,
409 	.setup_arch		= pnv_setup_arch,
410 	.init_IRQ		= pnv_init_IRQ,
411 	.show_cpuinfo		= pnv_show_cpuinfo,
412 	.get_proc_freq          = pnv_get_proc_freq,
413 	.progress		= pnv_progress,
414 	.machine_shutdown	= pnv_shutdown,
415 	.power_save             = NULL,
416 	.calibrate_decr		= generic_calibrate_decr,
417 #ifdef CONFIG_KEXEC_CORE
418 	.kexec_cpu_down		= pnv_kexec_cpu_down,
419 #endif
420 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
421 	.memory_block_size	= pnv_memory_block_size,
422 #endif
423 };
424