1 /*
2  * PowerNV setup code.
3  *
4  * Copyright 2011 IBM Corp.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 
12 #undef DEBUG
13 
14 #include <linux/cpu.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/kernel.h>
18 #include <linux/tty.h>
19 #include <linux/reboot.h>
20 #include <linux/init.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/irq.h>
24 #include <linux/seq_file.h>
25 #include <linux/of.h>
26 #include <linux/of_fdt.h>
27 #include <linux/interrupt.h>
28 #include <linux/bug.h>
29 #include <linux/pci.h>
30 #include <linux/cpufreq.h>
31 
32 #include <asm/machdep.h>
33 #include <asm/firmware.h>
34 #include <asm/xics.h>
35 #include <asm/rtas.h>
36 #include <asm/opal.h>
37 #include <asm/kexec.h>
38 #include <asm/smp.h>
39 
40 #include "powernv.h"
41 
42 static void __init pnv_setup_arch(void)
43 {
44 	set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
45 
46 	/* Initialize SMP */
47 	pnv_smp_init();
48 
49 	/* Setup PCI */
50 	pnv_pci_init();
51 
52 	/* Setup RTC and NVRAM callbacks */
53 	if (firmware_has_feature(FW_FEATURE_OPAL))
54 		opal_nvram_init();
55 
56 	/* Enable NAP mode */
57 	powersave_nap = 1;
58 
59 	/* XXX PMCS */
60 }
61 
62 static void __init pnv_init_early(void)
63 {
64 	/*
65 	 * Initialize the LPC bus now so that legacy serial
66 	 * ports can be found on it
67 	 */
68 	opal_lpc_init();
69 
70 #ifdef CONFIG_HVC_OPAL
71 	if (firmware_has_feature(FW_FEATURE_OPAL))
72 		hvc_opal_init_early();
73 	else
74 #endif
75 		add_preferred_console("hvc", 0, NULL);
76 }
77 
78 static void __init pnv_init_IRQ(void)
79 {
80 	xics_init();
81 
82 	WARN_ON(!ppc_md.get_irq);
83 }
84 
85 static void pnv_show_cpuinfo(struct seq_file *m)
86 {
87 	struct device_node *root;
88 	const char *model = "";
89 
90 	root = of_find_node_by_path("/");
91 	if (root)
92 		model = of_get_property(root, "model", NULL);
93 	seq_printf(m, "machine\t\t: PowerNV %s\n", model);
94 	if (firmware_has_feature(FW_FEATURE_OPALv3))
95 		seq_printf(m, "firmware\t: OPAL v3\n");
96 	else if (firmware_has_feature(FW_FEATURE_OPALv2))
97 		seq_printf(m, "firmware\t: OPAL v2\n");
98 	else if (firmware_has_feature(FW_FEATURE_OPAL))
99 		seq_printf(m, "firmware\t: OPAL v1\n");
100 	else
101 		seq_printf(m, "firmware\t: BML\n");
102 	of_node_put(root);
103 }
104 
105 static void pnv_prepare_going_down(void)
106 {
107 	/*
108 	 * Disable all notifiers from OPAL, we can't
109 	 * service interrupts anymore anyway
110 	 */
111 	opal_notifier_disable();
112 
113 	/* Soft disable interrupts */
114 	local_irq_disable();
115 
116 	/*
117 	 * Return secondary CPUs to firwmare if a flash update
118 	 * is pending otherwise we will get all sort of error
119 	 * messages about CPU being stuck etc.. This will also
120 	 * have the side effect of hard disabling interrupts so
121 	 * past this point, the kernel is effectively dead.
122 	 */
123 	opal_flash_term_callback();
124 }
125 
126 static void  __noreturn pnv_restart(char *cmd)
127 {
128 	long rc = OPAL_BUSY;
129 
130 	pnv_prepare_going_down();
131 
132 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
133 		rc = opal_cec_reboot();
134 		if (rc == OPAL_BUSY_EVENT)
135 			opal_poll_events(NULL);
136 		else
137 			mdelay(10);
138 	}
139 	for (;;)
140 		opal_poll_events(NULL);
141 }
142 
143 static void __noreturn pnv_power_off(void)
144 {
145 	long rc = OPAL_BUSY;
146 
147 	pnv_prepare_going_down();
148 
149 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
150 		rc = opal_cec_power_down(0);
151 		if (rc == OPAL_BUSY_EVENT)
152 			opal_poll_events(NULL);
153 		else
154 			mdelay(10);
155 	}
156 	for (;;)
157 		opal_poll_events(NULL);
158 }
159 
160 static void __noreturn pnv_halt(void)
161 {
162 	pnv_power_off();
163 }
164 
165 static void pnv_progress(char *s, unsigned short hex)
166 {
167 }
168 
169 static int pnv_dma_set_mask(struct device *dev, u64 dma_mask)
170 {
171 	if (dev_is_pci(dev))
172 		return pnv_pci_dma_set_mask(to_pci_dev(dev), dma_mask);
173 	return __dma_set_mask(dev, dma_mask);
174 }
175 
176 static u64 pnv_dma_get_required_mask(struct device *dev)
177 {
178 	if (dev_is_pci(dev))
179 		return pnv_pci_dma_get_required_mask(to_pci_dev(dev));
180 
181 	return __dma_get_required_mask(dev);
182 }
183 
184 static void pnv_shutdown(void)
185 {
186 	/* Let the PCI code clear up IODA tables */
187 	pnv_pci_shutdown();
188 
189 	/*
190 	 * Stop OPAL activity: Unregister all OPAL interrupts so they
191 	 * don't fire up while we kexec and make sure all potentially
192 	 * DMA'ing ops are complete (such as dump retrieval).
193 	 */
194 	opal_shutdown();
195 }
196 
197 #ifdef CONFIG_KEXEC
198 static void pnv_kexec_wait_secondaries_down(void)
199 {
200 	int my_cpu, i, notified = -1;
201 
202 	my_cpu = get_cpu();
203 
204 	for_each_online_cpu(i) {
205 		uint8_t status;
206 		int64_t rc;
207 
208 		if (i == my_cpu)
209 			continue;
210 
211 		for (;;) {
212 			rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
213 						   &status);
214 			if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
215 				break;
216 			barrier();
217 			if (i != notified) {
218 				printk(KERN_INFO "kexec: waiting for cpu %d "
219 				       "(physical %d) to enter OPAL\n",
220 				       i, paca[i].hw_cpu_id);
221 				notified = i;
222 			}
223 		}
224 	}
225 }
226 
227 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
228 {
229 	xics_kexec_teardown_cpu(secondary);
230 
231 	/* On OPAL v3, we return all CPUs to firmware */
232 
233 	if (!firmware_has_feature(FW_FEATURE_OPALv3))
234 		return;
235 
236 	if (secondary) {
237 		/* Return secondary CPUs to firmware on OPAL v3 */
238 		mb();
239 		get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
240 		mb();
241 
242 		/* Return the CPU to OPAL */
243 		opal_return_cpu();
244 	} else if (crash_shutdown) {
245 		/*
246 		 * On crash, we don't wait for secondaries to go
247 		 * down as they might be unreachable or hung, so
248 		 * instead we just wait a bit and move on.
249 		 */
250 		mdelay(1);
251 	} else {
252 		/* Primary waits for the secondaries to have reached OPAL */
253 		pnv_kexec_wait_secondaries_down();
254 	}
255 }
256 #endif /* CONFIG_KEXEC */
257 
258 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
259 static unsigned long pnv_memory_block_size(void)
260 {
261 	return 256UL * 1024 * 1024;
262 }
263 #endif
264 
265 static void __init pnv_setup_machdep_opal(void)
266 {
267 	ppc_md.get_boot_time = opal_get_boot_time;
268 	ppc_md.get_rtc_time = opal_get_rtc_time;
269 	ppc_md.set_rtc_time = opal_set_rtc_time;
270 	ppc_md.restart = pnv_restart;
271 	ppc_md.power_off = pnv_power_off;
272 	ppc_md.halt = pnv_halt;
273 	ppc_md.machine_check_exception = opal_machine_check;
274 	ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
275 	ppc_md.hmi_exception_early = opal_hmi_exception_early;
276 	ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
277 }
278 
279 #ifdef CONFIG_PPC_POWERNV_RTAS
280 static void __init pnv_setup_machdep_rtas(void)
281 {
282 	if (rtas_token("get-time-of-day") != RTAS_UNKNOWN_SERVICE) {
283 		ppc_md.get_boot_time = rtas_get_boot_time;
284 		ppc_md.get_rtc_time = rtas_get_rtc_time;
285 		ppc_md.set_rtc_time = rtas_set_rtc_time;
286 	}
287 	ppc_md.restart = rtas_restart;
288 	ppc_md.power_off = rtas_power_off;
289 	ppc_md.halt = rtas_halt;
290 }
291 #endif /* CONFIG_PPC_POWERNV_RTAS */
292 
293 static int __init pnv_probe(void)
294 {
295 	unsigned long root = of_get_flat_dt_root();
296 
297 	if (!of_flat_dt_is_compatible(root, "ibm,powernv"))
298 		return 0;
299 
300 	hpte_init_native();
301 
302 	if (firmware_has_feature(FW_FEATURE_OPAL))
303 		pnv_setup_machdep_opal();
304 #ifdef CONFIG_PPC_POWERNV_RTAS
305 	else if (rtas.base)
306 		pnv_setup_machdep_rtas();
307 #endif /* CONFIG_PPC_POWERNV_RTAS */
308 
309 	pr_debug("PowerNV detected !\n");
310 
311 	return 1;
312 }
313 
314 /*
315  * Returns the cpu frequency for 'cpu' in Hz. This is used by
316  * /proc/cpuinfo
317  */
318 static unsigned long pnv_get_proc_freq(unsigned int cpu)
319 {
320 	unsigned long ret_freq;
321 
322 	ret_freq = cpufreq_quick_get(cpu) * 1000ul;
323 
324 	/*
325 	 * If the backend cpufreq driver does not exist,
326          * then fallback to old way of reporting the clockrate.
327 	 */
328 	if (!ret_freq)
329 		ret_freq = ppc_proc_freq;
330 	return ret_freq;
331 }
332 
333 define_machine(powernv) {
334 	.name			= "PowerNV",
335 	.probe			= pnv_probe,
336 	.init_early		= pnv_init_early,
337 	.setup_arch		= pnv_setup_arch,
338 	.init_IRQ		= pnv_init_IRQ,
339 	.show_cpuinfo		= pnv_show_cpuinfo,
340 	.get_proc_freq          = pnv_get_proc_freq,
341 	.progress		= pnv_progress,
342 	.machine_shutdown	= pnv_shutdown,
343 	.power_save             = power7_idle,
344 	.calibrate_decr		= generic_calibrate_decr,
345 	.dma_set_mask		= pnv_dma_set_mask,
346 	.dma_get_required_mask	= pnv_dma_get_required_mask,
347 #ifdef CONFIG_KEXEC
348 	.kexec_cpu_down		= pnv_kexec_cpu_down,
349 #endif
350 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
351 	.memory_block_size	= pnv_memory_block_size,
352 #endif
353 };
354