1 /* 2 * PowerNV setup code. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12 #undef DEBUG 13 14 #include <linux/cpu.h> 15 #include <linux/errno.h> 16 #include <linux/sched.h> 17 #include <linux/kernel.h> 18 #include <linux/tty.h> 19 #include <linux/reboot.h> 20 #include <linux/init.h> 21 #include <linux/console.h> 22 #include <linux/delay.h> 23 #include <linux/irq.h> 24 #include <linux/seq_file.h> 25 #include <linux/of.h> 26 #include <linux/of_fdt.h> 27 #include <linux/interrupt.h> 28 #include <linux/bug.h> 29 #include <linux/pci.h> 30 #include <linux/cpufreq.h> 31 32 #include <asm/machdep.h> 33 #include <asm/firmware.h> 34 #include <asm/xics.h> 35 #include <asm/opal.h> 36 #include <asm/kexec.h> 37 #include <asm/smp.h> 38 39 #include "powernv.h" 40 41 static void __init pnv_setup_arch(void) 42 { 43 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 44 45 /* Initialize SMP */ 46 pnv_smp_init(); 47 48 /* Setup PCI */ 49 pnv_pci_init(); 50 51 /* Setup RTC and NVRAM callbacks */ 52 if (firmware_has_feature(FW_FEATURE_OPAL)) 53 opal_nvram_init(); 54 55 /* Enable NAP mode */ 56 powersave_nap = 1; 57 58 /* XXX PMCS */ 59 } 60 61 static void __init pnv_init_early(void) 62 { 63 /* 64 * Initialize the LPC bus now so that legacy serial 65 * ports can be found on it 66 */ 67 opal_lpc_init(); 68 69 #ifdef CONFIG_HVC_OPAL 70 if (firmware_has_feature(FW_FEATURE_OPAL)) 71 hvc_opal_init_early(); 72 else 73 #endif 74 add_preferred_console("hvc", 0, NULL); 75 } 76 77 static void __init pnv_init_IRQ(void) 78 { 79 xics_init(); 80 81 WARN_ON(!ppc_md.get_irq); 82 } 83 84 static void pnv_show_cpuinfo(struct seq_file *m) 85 { 86 struct device_node *root; 87 const char *model = ""; 88 89 root = of_find_node_by_path("/"); 90 if (root) 91 model = of_get_property(root, "model", NULL); 92 seq_printf(m, "machine\t\t: PowerNV %s\n", model); 93 if (firmware_has_feature(FW_FEATURE_OPAL)) 94 seq_printf(m, "firmware\t: OPAL\n"); 95 else 96 seq_printf(m, "firmware\t: BML\n"); 97 of_node_put(root); 98 } 99 100 static void pnv_prepare_going_down(void) 101 { 102 /* 103 * Disable all notifiers from OPAL, we can't 104 * service interrupts anymore anyway 105 */ 106 opal_event_shutdown(); 107 108 /* Soft disable interrupts */ 109 local_irq_disable(); 110 111 /* 112 * Return secondary CPUs to firwmare if a flash update 113 * is pending otherwise we will get all sort of error 114 * messages about CPU being stuck etc.. This will also 115 * have the side effect of hard disabling interrupts so 116 * past this point, the kernel is effectively dead. 117 */ 118 opal_flash_term_callback(); 119 } 120 121 static void __noreturn pnv_restart(char *cmd) 122 { 123 long rc = OPAL_BUSY; 124 125 pnv_prepare_going_down(); 126 127 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 128 rc = opal_cec_reboot(); 129 if (rc == OPAL_BUSY_EVENT) 130 opal_poll_events(NULL); 131 else 132 mdelay(10); 133 } 134 for (;;) 135 opal_poll_events(NULL); 136 } 137 138 static void __noreturn pnv_power_off(void) 139 { 140 long rc = OPAL_BUSY; 141 142 pnv_prepare_going_down(); 143 144 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 145 rc = opal_cec_power_down(0); 146 if (rc == OPAL_BUSY_EVENT) 147 opal_poll_events(NULL); 148 else 149 mdelay(10); 150 } 151 for (;;) 152 opal_poll_events(NULL); 153 } 154 155 static void __noreturn pnv_halt(void) 156 { 157 pnv_power_off(); 158 } 159 160 static void pnv_progress(char *s, unsigned short hex) 161 { 162 } 163 164 static void pnv_shutdown(void) 165 { 166 /* Let the PCI code clear up IODA tables */ 167 pnv_pci_shutdown(); 168 169 /* 170 * Stop OPAL activity: Unregister all OPAL interrupts so they 171 * don't fire up while we kexec and make sure all potentially 172 * DMA'ing ops are complete (such as dump retrieval). 173 */ 174 opal_shutdown(); 175 } 176 177 #ifdef CONFIG_KEXEC 178 static void pnv_kexec_wait_secondaries_down(void) 179 { 180 int my_cpu, i, notified = -1; 181 182 my_cpu = get_cpu(); 183 184 for_each_online_cpu(i) { 185 uint8_t status; 186 int64_t rc, timeout = 1000; 187 188 if (i == my_cpu) 189 continue; 190 191 for (;;) { 192 rc = opal_query_cpu_status(get_hard_smp_processor_id(i), 193 &status); 194 if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED) 195 break; 196 barrier(); 197 if (i != notified) { 198 printk(KERN_INFO "kexec: waiting for cpu %d " 199 "(physical %d) to enter OPAL\n", 200 i, paca[i].hw_cpu_id); 201 notified = i; 202 } 203 204 /* 205 * On crash secondaries might be unreachable or hung, 206 * so timeout if we've waited too long 207 * */ 208 mdelay(1); 209 if (timeout-- == 0) { 210 printk(KERN_ERR "kexec: timed out waiting for " 211 "cpu %d (physical %d) to enter OPAL\n", 212 i, paca[i].hw_cpu_id); 213 break; 214 } 215 } 216 } 217 } 218 219 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) 220 { 221 xics_kexec_teardown_cpu(secondary); 222 223 /* On OPAL, we return all CPUs to firmware */ 224 225 if (!firmware_has_feature(FW_FEATURE_OPAL)) 226 return; 227 228 if (secondary) { 229 /* Return secondary CPUs to firmware on OPAL v3 */ 230 mb(); 231 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; 232 mb(); 233 234 /* Return the CPU to OPAL */ 235 opal_return_cpu(); 236 } else { 237 /* Primary waits for the secondaries to have reached OPAL */ 238 pnv_kexec_wait_secondaries_down(); 239 240 /* 241 * We might be running as little-endian - now that interrupts 242 * are disabled, reset the HILE bit to big-endian so we don't 243 * take interrupts in the wrong endian later 244 */ 245 opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE); 246 } 247 } 248 #endif /* CONFIG_KEXEC */ 249 250 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 251 static unsigned long pnv_memory_block_size(void) 252 { 253 return 256UL * 1024 * 1024; 254 } 255 #endif 256 257 static void __init pnv_setup_machdep_opal(void) 258 { 259 ppc_md.get_boot_time = opal_get_boot_time; 260 ppc_md.restart = pnv_restart; 261 pm_power_off = pnv_power_off; 262 ppc_md.halt = pnv_halt; 263 ppc_md.machine_check_exception = opal_machine_check; 264 ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; 265 ppc_md.hmi_exception_early = opal_hmi_exception_early; 266 ppc_md.handle_hmi_exception = opal_handle_hmi_exception; 267 } 268 269 static int __init pnv_probe(void) 270 { 271 unsigned long root = of_get_flat_dt_root(); 272 273 if (!of_flat_dt_is_compatible(root, "ibm,powernv")) 274 return 0; 275 276 if (IS_ENABLED(CONFIG_PPC_RADIX_MMU) && radix_enabled()) 277 radix_init_native(); 278 else if (IS_ENABLED(CONFIG_PPC_STD_MMU_64)) 279 hpte_init_native(); 280 281 if (firmware_has_feature(FW_FEATURE_OPAL)) 282 pnv_setup_machdep_opal(); 283 284 pr_debug("PowerNV detected !\n"); 285 286 return 1; 287 } 288 289 /* 290 * Returns the cpu frequency for 'cpu' in Hz. This is used by 291 * /proc/cpuinfo 292 */ 293 static unsigned long pnv_get_proc_freq(unsigned int cpu) 294 { 295 unsigned long ret_freq; 296 297 ret_freq = cpufreq_quick_get(cpu) * 1000ul; 298 299 /* 300 * If the backend cpufreq driver does not exist, 301 * then fallback to old way of reporting the clockrate. 302 */ 303 if (!ret_freq) 304 ret_freq = ppc_proc_freq; 305 return ret_freq; 306 } 307 308 define_machine(powernv) { 309 .name = "PowerNV", 310 .probe = pnv_probe, 311 .init_early = pnv_init_early, 312 .setup_arch = pnv_setup_arch, 313 .init_IRQ = pnv_init_IRQ, 314 .show_cpuinfo = pnv_show_cpuinfo, 315 .get_proc_freq = pnv_get_proc_freq, 316 .progress = pnv_progress, 317 .machine_shutdown = pnv_shutdown, 318 .power_save = power7_idle, 319 .calibrate_decr = generic_calibrate_decr, 320 #ifdef CONFIG_KEXEC 321 .kexec_cpu_down = pnv_kexec_cpu_down, 322 #endif 323 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 324 .memory_block_size = pnv_memory_block_size, 325 #endif 326 }; 327